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List: trawlers@lists.trawlering.com
From: Rich Gano
 
Email portability
Tue, Dec 12, 2006 6:57 PM
Replying via the BellSouth website was not so great because the copy was not maintained there, and I had to copy stuff back to the website to respond. I could have set the OutLook to leave a copy on the website, but for various reasons, I did not.
List: trawlers@lists.trawlering.com
From: zhyachts@pub.zhuhai.gd.cn
 
Re: GLASS MATT BATTERIES
Fri, Oct 30, 1998 6:42 PM
With top pickups you will have to periodically fill the operations tank using a pump and adjusting the valves to pull from the proper tank. If you forget or the pump doesn't work, and these pumps are notorious unreliable because fuel is hard on impellers - the engine stops.
List: trawlers@lists.trawlering.com
From: tbehan6468@aol.com
 
Help in identifying strainer
Tue, Oct 9, 2007 3:27 AM
The top of the canister is smooth, solid bronze (except for the hole down the middle)?and flush with the top exterior sides of the strainer.?There is no lifting strap and there are no holes on the top or indentations that a tool could fit into to remove it.
List: discuss@lists.openscad.org
From: stressless
 
Re: [OpenSCAD] My first print, my first desappointment
Mon, Mar 14, 2016 12:38 PM
. <top of the base plate/ >> - Absolutely. Impemented !
List: discuss@lists.openscad.org
From: adrianv
 
Re: [OpenSCAD] Rounded Polygon
Sun, Mar 8, 2020 4:28 PM
If I translate the top pentagon I get a result that is clearly bad: And likewise if I skew the top pentagonal face in the z direction it seems something is also wrong: But it seems like all of these
List: usrp-users@lists.ettus.com
From: chuck reed
 
Re: [USRP-users] Getting Started
Fri, Aug 1, 2014 6:28 PM
=16 >>> EXTRA_DEFS="ETH10G_PORT1=1 BUILD_1G=1 BUILD_10G=1 NO_DRAM_FIFOS=1 >>> SRAM_FIFO_SIZE=16 " >>> make[1]: Entering directory `C:/Users/creed/Documents/ >>> kintex7/working/uhd/fpga/usrp3/top/x300' >>> make[1]: *** No rule to make target `C:/Users/creed/Documents/ >>> kintex7/working/uhd/fpga/usrp3/top/x300/C:/Users/creed/Documents/kinte >>> x7/working/uhd
List: usrp-users@lists.ettus.com
From: James Wagner
 
Re: [USRP-users] Unable to create Vivado projekt or to build clean repo
Mon, Apr 25, 2016 9:36 PM
Releasing IP location: /home/sdr-dev/repo/uhd/fpga-src/usrp3/top/x300/build-ip/xc7k410tffg900-2/ten_gig_eth_pcs_pma make[1]: *** [/home/sdr-dev/repo/uhd/fpga-src/usrp3/top/x300/build-ip/xc7k410tffg900-2/ten_gig_eth_pcs_pma/ten_gig_eth_pcs_pma.xci.out] Error 1 make[1]: Leaving directory `/home/sdr-dev/repo/uhd/fpga-src/usrp3/top/x300' make: *** [X310_RFNOC_HGS
List: usrp-users@lists.ettus.com
From: Jonathon Pendlum
 
Re: [USRP-users] Unable to create Vivado projekt or to build clean repo
Tue, Apr 26, 2016 4:14 PM
Apr 25 14:31:25 2016... > Releasing IP location: > /home/sdr-dev/repo/uhd/fpga-src/usrp3/top/x300/build-ip/xc7k410tffg900-2/ten_gig_eth_pcs_pma > make[1]: *** > [/home/sdr-dev/repo/uhd/fpga-src/usrp3/top/x300/build-ip/xc7k410tffg900-2/ten_gig_eth_pcs_pma/ten_gig_eth_pcs_pma.xci.out] > Error 1 > make[1]: Leaving directory `/home/sdr-dev/repo/uhd/fpga-src/usrp3
List: usrp-users@lists.ettus.com
From: Yeo Jin Kuang Alvin (IA)
 
Re: [USRP-users] Ettus Code (FPGA) for USRP B210
Mon, Apr 9, 2018 4:17 AM
command not found ISE Version: make -f Makefile.b200.inc proj NAME=B200 DEVICE=XC6SLX75 EXTRA_DEFS=" " make[1]: Entering directory '/cygdrive/c/Users/WORK/Desktop/fpga-7c6bf35ce8f14ff 6f1f9ae966edd531dc4b611d7/usrp3/top
List: time-nuts@lists.febo.com
From: Pete Lancashire
 
Re: [time-nuts] OT - HP 5183A Waveform Recorder - is it worth playing with?
Wed, Jun 2, 2010 9:12 PM
The digitizer proper and a "top box" > containing a display.  There was a "private" HPIB between the > top and bottom boxes, as well as a "public" HPIB on the top box. > Due to pressure from customers, we eventually allowed them to > connect to the "private" HPIB connector on the bottom box > and not use the top box at all.