16 MHz VCO divided by 16 to 1 MHz; 10 MHz divided by 10; Phase detector and
loop filter to control the 16 MHz VCO.

Regards,
Tom

----- Original Message -----
From: "Tom Van Baak" tvb@LeapSecond.com
To: "Discussion of precise time and frequency measurement"
time-nuts@lists.febo.com
Sent: Saturday, September 29, 2018 11:57 PM
Subject: [time-nuts] 10 MHz -> 16 MHz

How about an ICS525 or ICS527. IDT’s calculator allows a 0 ppm frequency error. You would need a sine-square converter for input.

People have only as much liberty as they have the intelligence to want and the courage to take.

Emma Goldman

Full wave rectify the sinewave input, extract the 8th Harmonic with a passive filter.
Drive the input of a divide by 5 circuit via a suitable impedance converter network.
Could even use a CMOS 74XX74 flipflop plus a few passive components as the divider.

Bruce

Simple 100 kHz ref frequency PLL  (like old cmos series) with 16 MHz VCXO (
very simple 16MHz xtal with varicap arrangement).
All parts in the ordinary spare generic stuff drawer......

Il domenica 30 settembre 2018, Bruce Griffiths bruce.griffiths@xtra.co.nz
ha scritto:

On Sun, Sep 30, 2018 at 5:58 AM Tom Van Baak tvb@leapsecond.com wrote:

I would square the sine (like HP single BJT or double BJT squarers),
divide by 5 with any 74XX290 or xx390, then multiply by two three
times using 74XX86 XORs with one input delayed by two inverters. You
would need to play with the last inverters delay if your
microcontroller needs a symmetric clock

Frank

Tom,

Divide the 10 MHz down to 2 MHz in the usual way, then multiply by 8
with a cascade of three analog freq doublers separated by fairly narrow
bandpass filters.  Caveats:  Would need four filters total along the path
to get rid of unwanted frequency components, gain distributed along
the path to keep the signal level high enough to satisfy the doublers,
and might suffer excessive phase drift due to temperature changes of
the filters (and probably to a lesser extent) the doublers themselves.
You didn't mention phase stability requirements...

Freq doublers based on mixers or on full-wave rectification have the
pleasant property of having most of their output power in the proper
harmonic order, but require sinusoidal drives to work.  An unfiltered
digital drive signal won't suffice here.

Dana

On Sat, Sep 29, 2018 at 10:58 PM Tom Van Baak tvb@leapsecond.com wrote:

On 09/30/2018 05:57 AM, Tom Van Baak wrote:

When I have needed this, it has been for microcontrollers. I have let
the microcontroller do the locking, with 10MHz applied directly to an
input pin:

I run a reasonably fast* interrupt. Once inside the interrupt, I read
the current timer value, and read the port 8 times into registers.

This gives me 8 samples spaced 45 degrees apart on the 10MHz input,
which are then converted to a 8-bit field.

That 8-bit value is then used in a lookup table, which outputs a phase
value. This is compensated by what was read from the timer (how late we
got into the interrupt).

The phase error is then accumulated, and drives a PWM DAC, connected to
a varactor on the crystal.

It adds 3 external components in total, and for an annoying case like
8/5, it may well wobble 90 degrees.

It started with this Christmas-vacation experiment I never really finished:

https://n1.taur.dk/permanent/synth_v2.pdf

/Kasper Pedersen

*) oscillator_frequency * max_xtal_deviation * 4, typically 16kHz or so.

The clockblock could do that, or probably any of the newer synth chips.  Phase noise and jitter are lousy of course.

On Sep 29, 2018, 11:58 PM, at 11:58 PM, Tom Van Baak tvb@leapsecond.com wrote:

Same question 10 to 12:-)

On Sat, Sep 29, 2018, 8:58 PM Tom Van Baak tvb@leapsecond.com wrote:

Am 30.09.2018 um 15:44 schrieb Pete Lancashire:

Same Answer.

Select pins = (1, 1, 0) for 12 instead of (1, 1, 1) for 16.

\Gerhard

Almost same answer as I gave Tom. Double to 20, divide by 10, and then mix
the 2 with the original 10, You could also just divide by 5 and then mix
that 2 with the original 10. Again, filtering required. 73 - Mike

Mike B. Feher, N4FS

89 Arnold Blvd.

Howell NJ 07731

848-245-9115

-----Original Message-----
From: time-nuts time-nuts-bounces@lists.febo.com On Behalf Of Pete
Lancashire
Sent: Sunday, September 30, 2018 9:45 AM
To: Tom Van Baak tvb@leapsecond.com; Discussion of precise time and
frequency measurement time-nuts@lists.febo.com
Subject: Re: [time-nuts] 10 MHz -> 16 MHz

Same question 10 to 12:-)

On Sat, Sep 29, 2018, 8:58 PM Tom Van Baak < mailto:tvb@leapsecond.com
tvb@leapsecond.com> wrote:

accuracy.

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and follow the instructions there.

It surprises me how the SDR designers in 90% of the cases don't even allow
for an external clock. It's like accuracy never came into thought.

On Sat, Sep 29, 2018, 8:58 PM Tom Van Baak tvb@leapsecond.com wrote:

On Sat, 29 Sep 2018 20:57:14 -0700
"Tom Van Baak" tvb@LeapSecond.com wrote:

The simplest way I can think of is the following:
Use a 74LV8154 to divide the 10MHz down to 152.587890625Hz.
Use the capture timer unit of the uC to measure the phase of the
pulse. Use any kind of DAC (internal, external, PWM,...) to steer
the 16MHz VCO. Depending on how fast the timer unit runs, this
will give you something in the order of 10-200ns dead-band.
By choosing the right frequency for the timer unit, one can
get it to "dither" a bit and then use averaging.

For lower jitter, use one half of a Nutt interpolator
to get the timing difference between the 152Hz signal
and the 16MHz (ie similar to what the SRS FS740 does).
Use something akin Nick Sayer's time-to-amplitude converter
for the fine measurement.

Same works equally well for 12MHz.

		Attila Kinali

--
<JaberWorky> The bad part of Zurich is where the degenerates
throw DARK chocolate at you.

On 9/29/18 8:57 PM, Tom Van Baak wrote:

cycle counts over what interval?  5 and 8 cycles respectively? or over,
say,  1 second?

Multiply by 8 divide by 5 seems a bit tricky (although any number of off
the shelf DDS will do it at fairly high power dissipation)

You might be able to injection lock an 80MHz oscillator by coupling the
10 MHz in on the Vcc or output.

Then a divide by 5 down to 16.

If the requirement is over 1 second, then you can play a game with
counting the first half of the second, and adjusting in the second by
dropping/adding cycles to make it come out right. THat sounds pretty icky.

Am 30.09.2018 um 16:49 schrieb Attila Kinali:

Wow. That's truly a Rube Goldberg design.

There is a simpler way.  IDT ICS570. Digikey 800-1073-5-ND

Solder time less than 10 minutes.
I had the 3V3-Version in the parts drawers, officially it takes the 5V
version to generate the 160 MHz, but the 3V3 version happened to work, too.
The difference between 120 and 160 MHz is just a GND wire on pin 6 (vs.
open)

Divide by 10 is left as an exercise.

regards,
Gerhard

(But then, some like to build and tune multiplier chains and mixers.)

My 2 cents. Attached image is a little board with OCXO that 

outputs 16MHz locked automatically to either 5 or 10MHz. I have
several that will be part of the oscillator giveaway.

I bet someone can figure out how it works from the picture!

Best,

Bob Martin

On 9/29/2018 9:57 PM, Tom Van Baak wrote:

and what wold happen if you divide the 10MHz by 10 -- with any simple
counter chip -- and injection lock a 16MHz crystal oscillator with that
1MHz, since the jitter is not critical .... of course it does not hurt
if you make the 1MHz pulses narrow, you could use the micro-controller's
own oscillator circuit, plus that counter [freq divider chip ] it is
simple and cheap enough?

73

KJ6UHN

Alex

On 9/30/2018 7:54 AM, jimlux wrote: