Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
Failing that, can the crystal that determines time for the DVR be adjusted?
What sort of crystals do you find inside? My guess is there are two of them,
one at 32KHz used for timekeeping, and one at ?? MHz for the CPU.
I think I've seen comments about making 32 KHz from 10 MHz in a PIC or AVR.
tvb has this web page, but I don't see a 32 KHz option:
http://www.leapsecond.com/pic/picdiv.htm
Anyway, the idea would be to find the 32 KHz crystal inside your DVR and
replace it with 32 KHz derived from your TBolt. Most of the clock chips have
an internal amplifier connected across 2 pins, often labeled something like
X-out and X-in. The idea is to put a signal on X-in and ignore X-out.
I'd probably take a look with a scope, and then see if I can make something
with a few resistors to get the right level and a 1-meg to connect that
signal to X-in.
--
These are my opinions, not necessarily my employer's. I hate spam.
I think I've seen comments about making 32 KHz from 10 MHz in a PIC or AVR.
tvb has this web page, but I don't see a 32 KHz option:
http://www.leapsecond.com/pic/picdiv.htm
Hal,
Yes, I have a PIC divider that takes 5 or 10 MHz input and
outputs a 32.768 kHz square wave with minimal jitter and
no long-term phase offset. Contact me off-line if interested.
/tvb
Hi Tom,
I'm interested in that divider. Actually, insterested in knowing how it
works, not in the .HEX file.
Breseham's algorith works but has inherent jitter and I've found no other
solutions for situations like that.
I'd live to know how it is done.
Thank you,
Roberto EB4EQA
http://www.rbarrios.com
-----Mensaje original-----
From: Tom Van Baak
Sent: Thursday, February 02, 2012 10:34 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
I think I've seen comments about making 32 KHz from 10 MHz in a PIC or
AVR.
tvb has this web page, but I don't see a 32 KHz option:
http://www.leapsecond.com/pic/picdiv.htm
Hal,
Yes, I have a PIC divider that takes 5 or 10 MHz input and
outputs a 32.768 kHz square wave with minimal jitter and
no long-term phase offset. Contact me off-line if interested.
/tvb
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Hi Roberto,
The motivation for this, I assume most list members know, is to
drive cheap quartz stepper motor clocks with precise 32 kHz
frequency, one derived from an atomic or GPS 10 MHz.
The 10 MHz to 32 kHz PIC divider I wrote uses a sort of binary
"leap year" algorithm to adjust the digital output phase to be as
close as possible to the ideal 32.768 kHz phase on each cycle
and also to have zero long-term error.
I'm not sure how well a multi-level leap year algorithm relates
Breseham's algorithm. I tracked down his 1965 plotter article.
There might be common ground there.
With non-integral ratios like this case, or without external analog
components (e.g., PLL), it seems some level of jitter is always
unavoidable. So the goal was to make it as mathematically small
as possible, and furthermore, to be able to do the math within a
half cycle, which is only 15 microseconds.
I'll send you an early draft of the PIC code; the version that was
most clear before I had to pinch too many cycles and added too
many features. Let me know what you think.
I also simulated the algorithm on a PC and measured the ADEV
and phase noise. That simulation code is file 10m32k.c under:
http://www.leapsecond.com/tools/
/tvb
----- Original Message -----
From: "Roberto Barrios" rbarrioss@msn.com
To: "Tom Van Baak" tvb@leapsecond.com; "Discussion of precise time and frequency measurement" time-nuts@febo.com
Sent: Thursday, February 02, 2012 5:09 AM
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
Hi Tom,
I'm interested in that divider. Actually, insterested in knowing how it
works, not in the .HEX file.
Breseham's algorith works but has inherent jitter and I've found no other
solutions for situations like that.
I'd live to know how it is done.
Thank you,
Roberto EB4EQA
http://www.rbarrios.com
-----Mensaje original-----
From: Tom Van Baak
Sent: Thursday, February 02, 2012 10:34 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
I think I've seen comments about making 32 KHz from 10 MHz in a PIC or
AVR.
tvb has this web page, but I don't see a 32 KHz option:
http://www.leapsecond.com/pic/picdiv.htm
Hal,
Yes, I have a PIC divider that takes 5 or 10 MHz input and
outputs a 32.768 kHz square wave with minimal jitter and
no long-term phase offset. Contact me off-line if interested.
/tvb
Amazing... there is always something to learn from TVB. Now I'll try to
derive a 2.048MHz G.703-13 clock from a 10MHz clock. I suspect that the
procedure is similar, even if 2048KHz is not quite a power of 2.
On Thu, Feb 2, 2012 at 4:35 PM, Tom Van Baak tvb@leapsecond.com wrote:
Hi Roberto,
The motivation for this, I assume most list members know, is to
drive cheap quartz stepper motor clocks with precise 32 kHz
frequency, one derived from an atomic or GPS 10 MHz.
The 10 MHz to 32 kHz PIC divider I wrote uses a sort of binary
"leap year" algorithm to adjust the digital output phase to be as
close as possible to the ideal 32.768 kHz phase on each cycle
and also to have zero long-term error.
I'm not sure how well a multi-level leap year algorithm relates
Breseham's algorithm. I tracked down his 1965 plotter article.
There might be common ground there.
With non-integral ratios like this case, or without external analog
components (e.g., PLL), it seems some level of jitter is always
unavoidable. So the goal was to make it as mathematically small
as possible, and furthermore, to be able to do the math within a
half cycle, which is only 15 microseconds.
I'll send you an early draft of the PIC code; the version that was
most clear before I had to pinch too many cycles and added too
many features. Let me know what you think.
I also simulated the algorithm on a PC and measured the ADEV
and phase noise. That simulation code is file 10m32k.c under:
http://www.leapsecond.com/tools/
/tvb
----- Original Message ----- From: "Roberto Barrios" rbarrioss@msn.com
To: "Tom Van Baak" tvb@leapsecond.com; "Discussion of precise time and
frequency measurement" time-nuts@febo.com
Sent: Thursday, February 02, 2012 5:09 AM
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video
recorders
Hi Tom,
I'm interested in that divider. Actually, insterested in knowing how it
works, not in the .HEX file.
Breseham's algorith works but has inherent jitter and I've found no other
solutions for situations like that.
I'd live to know how it is done.
Thank you,
Roberto EB4EQA
http://www.rbarrios.com
-----Mensaje original----- From: Tom Van Baak
Sent: Thursday, February 02, 2012 10:34 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video
recorders
I think I've seen comments about making 32 KHz from 10 MHz in a PIC or
AVR.
tvb has this web page, but I don't see a 32 KHz option:
http://www.leapsecond.com/pic/picdiv.htm
Hal,
Yes, I have a PIC divider that takes 5 or 10 MHz input and
outputs a 32.768 kHz square wave with minimal jitter and
no long-term phase offset. Contact me off-line if interested.
/tvb
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Azelio,
2.048 MHz has a cycle period of just 488.28125 ns so a PIC/AVR is (far) too slow to use the same trick I did on the low frequency 32 kHz.
I think you'll have to use a PLL for that one. How about a 16 kHz compare rate: 10 MHz / 625 = 16000 Hz = 2.048 MHz / 128
/tvb
----- Original Message -----
From: Azelio Boriani
To: Tom Van Baak ; Discussion of precise time and frequency measurement
Sent: Thursday, February 02, 2012 8:18 AM
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
Amazing... there is always something to learn from TVB. Now I'll try to derive a 2.048MHz G.703-13 clock from a 10MHz clock. I suspect that the procedure is similar, even if 2048KHz is not quite a power of 2.
On Thu, Feb 2, 2012 at 4:35 PM, Tom Van Baak tvb@leapsecond.com wrote:
Hi Roberto,
The motivation for this, I assume most list members know, is to
drive cheap quartz stepper motor clocks with precise 32 kHz
frequency, one derived from an atomic or GPS 10 MHz.
The 10 MHz to 32 kHz PIC divider I wrote uses a sort of binary
"leap year" algorithm to adjust the digital output phase to be as
close as possible to the ideal 32.768 kHz phase on each cycle
and also to have zero long-term error.
I'm not sure how well a multi-level leap year algorithm relates
Breseham's algorithm. I tracked down his 1965 plotter article.
There might be common ground there.
With non-integral ratios like this case, or without external analog
components (e.g., PLL), it seems some level of jitter is always
unavoidable. So the goal was to make it as mathematically small
as possible, and furthermore, to be able to do the math within a
half cycle, which is only 15 microseconds.
I'll send you an early draft of the PIC code; the version that was
most clear before I had to pinch too many cycles and added too
many features. Let me know what you think.
I also simulated the algorithm on a PC and measured the ADEV
and phase noise. That simulation code is file 10m32k.c under:
http://www.leapsecond.com/tools/
/tvb
----- Original Message ----- From: "Roberto Barrios" <rbarrioss@msn.com>
To: "Tom Van Baak" <tvb@leapsecond.com>; "Discussion of precise time and frequency measurement" <time-nuts@febo.com>
Sent: Thursday, February 02, 2012 5:09 AM
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
Hi Tom,
I'm interested in that divider. Actually, insterested in knowing how it works, not in the .HEX file.
Breseham's algorith works but has inherent jitter and I've found no other solutions for situations like that.
I'd live to know how it is done.
Thank you,
Roberto EB4EQA
http://www.rbarrios.com
-----Mensaje original----- From: Tom Van Baak
Sent: Thursday, February 02, 2012 10:34 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
I think I've seen comments about making 32 KHz from 10 MHz in a PIC or AVR.
tvb has this web page, but I don't see a 32 KHz option:
http://www.leapsecond.com/pic/picdiv.htm
Hal,
Yes, I have a PIC divider that takes 5 or 10 MHz input and
outputs a 32.768 kHz square wave with minimal jitter and
no long-term phase offset. Contact me off-line if interested.
/tvb
_______________________________________________
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Yes, shortly after having sent out the message I realized that I was, as
usual, too fast. I'm aware that a simple microprocessor can't be used but a
Spartan3 can be involved. Then another problem: the 2.048MHz is about 1/5
of the 10MHz so it is not possible. Sofar the way out is: dividing the
10MHz by 625 and then multiplying by 128 using the DCM in the Spartan3...
but nothing clever in this method. Sorry, not a valid contribution.
On Thu, Feb 2, 2012 at 6:07 PM, Tom Van Baak tvb@leapsecond.com wrote:
Azelio,
2.048 MHz has a cycle period of just 488.28125 ns so a PIC/AVR is (far)
too slow to use the same trick I did on the low frequency 32 kHz.
I think you'll have to use a PLL for that one. How about a 16 kHz compare
rate: 10 MHz / 625 = 16000 Hz = 2.048 MHz / 128
/tvb
----- Original Message -----
From: Azelio Boriani
To: Tom Van Baak ; Discussion of precise time and frequency measurement
Sent: Thursday, February 02, 2012 8:18 AM
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video
recorders
Amazing... there is always something to learn from TVB. Now I'll try to
derive a 2.048MHz G.703-13 clock from a 10MHz clock. I suspect that the
procedure is similar, even if 2048KHz is not quite a power of 2.
On Thu, Feb 2, 2012 at 4:35 PM, Tom Van Baak tvb@leapsecond.com wrote:
Hi Roberto,
The motivation for this, I assume most list members know, is to
drive cheap quartz stepper motor clocks with precise 32 kHz
frequency, one derived from an atomic or GPS 10 MHz.
The 10 MHz to 32 kHz PIC divider I wrote uses a sort of binary
"leap year" algorithm to adjust the digital output phase to be as
close as possible to the ideal 32.768 kHz phase on each cycle
and also to have zero long-term error.
I'm not sure how well a multi-level leap year algorithm relates
Breseham's algorithm. I tracked down his 1965 plotter article.
There might be common ground there.
With non-integral ratios like this case, or without external analog
components (e.g., PLL), it seems some level of jitter is always
unavoidable. So the goal was to make it as mathematically small
as possible, and furthermore, to be able to do the math within a
half cycle, which is only 15 microseconds.
I'll send you an early draft of the PIC code; the version that was
most clear before I had to pinch too many cycles and added too
many features. Let me know what you think.
I also simulated the algorithm on a PC and measured the ADEV
and phase noise. That simulation code is file 10m32k.c under:
http://www.leapsecond.com/tools/
/tvb
----- Original Message ----- From: "Roberto Barrios" <rbarrioss@msn.com
To: "Tom Van Baak" <tvb@leapsecond.com>; "Discussion of precise time
and frequency measurement" time-nuts@febo.com
Sent: Thursday, February 02, 2012 5:09 AM
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video
recorders
Hi Tom,
I'm interested in that divider. Actually, insterested in knowing how
it works, not in the .HEX file.
Breseham's algorith works but has inherent jitter and I've found no
other solutions for situations like that.
I'd live to know how it is done.
Thank you,
Roberto EB4EQA
http://www.rbarrios.com
-----Mensaje original----- From: Tom Van Baak
Sent: Thursday, February 02, 2012 10:34 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video
recorders
I think I've seen comments about making 32 KHz from 10 MHz in a PIC
or AVR.
tvb has this web page, but I don't see a 32 KHz option:
http://www.leapsecond.com/pic/picdiv.htm
Hal,
Yes, I have a PIC divider that takes 5 or 10 MHz input and
outputs a 32.768 kHz square wave with minimal jitter and
no long-term phase offset. Contact me off-line if interested.
/tvb
_______________________________________________
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Hi Roberto:
By changing the timer count dynamically it's possible to lower the jitter to one timer count. See:
http://www.prc68.com/I/PClock.shtml#BA
Have Fun,
Brooke Clarke
http://www.PRC68.com
http://www.end2partygovernment.com/Brooke4Congress.html
Roberto Barrios wrote:
Hi Tom,
I'm interested in that divider. Actually, insterested in knowing how it works, not in the .HEX file.
Breseham's algorith works but has inherent jitter and I've found no other solutions for situations like that.
I'd live to know how it is done.
Thank you,
Roberto EB4EQA
http://www.rbarrios.com
-----Mensaje original----- From: Tom Van Baak
Sent: Thursday, February 02, 2012 10:34 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
I think I've seen comments about making 32 KHz from 10 MHz in a PIC or AVR.
tvb has this web page, but I don't see a 32 KHz option:
http://www.leapsecond.com/pic/picdiv.htm
Hal,
Yes, I have a PIC divider that takes 5 or 10 MHz input and
outputs a 32.768 kHz square wave with minimal jitter and
no long-term phase offset. Contact me off-line if interested.
/tvb
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
One can do many things with a small micro having programmable logic cells, such
as the Cypress PSOC. For grins I worked out (via spreadsheet) how to use the
PSOC digital divider blocks and the built-in clock PLL to get from 10MHz to
2.048MHz in a fairly precise manner. The scheme uses a divider switched between
adjacent moduli (ala the TVB method?) to produce a low frequency that, upon
multiplication by the clock PLL, gives an integer multiple of 2.048MHz. Not
having actually done it there are 2 questions: 1) Can the 24MHz VCO be pulled to
24.576MHz? and 2) Can the PLL track periodic jitter of about 0.7%. Since there
are trimming bits for the VCO I suspect yes to #1, and some sort of passive low
pass filter (PI or ladder network?) would reduce the jitter if #2 is a problem.
Here's the approach:
Feed 10.000000 MHz to an 8 bit digital divider block
divide by 149 for 237 of 256 times
divide by 148 for 19 of 256 times
net divide of 148.92578125 to 1 results
divide result by 2 in an 8 bit digital divider block
(in order to get a good square wave)
net divide of 297.85156250 to 1 results at output pin
get 33573.77049 Hz, feed over to Ext Osc Input pin
PLL of 732x is part of PSOC
thus sysclk 24.576000 MHz results
and sysclkx2 49.152000 MHz results
divide sysclkx2 by 12 in an 8 bit digital divider block
divide result by 2 in an 8 bit digital divider block
(in order to get a good square wave)
Final frequency of 2.0480000 MHz results to output pin
FWIW the result is spot on, at least to the limits of my calculation tools.
Bob L.
From: Azelio Boriani azelio.boriani@screen.it
To: Tom Van Baak tvb@leapsecond.com; Discussion of precise time and frequency
measurement time-nuts@febo.com
Sent: Thu, February 2, 2012 12:22:44 PM
Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders
Yes, shortly after having sent out the message I realized that I was, as
usual, too fast. I'm aware that a simple microprocessor can't be used but a
Spartan3 can be involved. Then another problem: the 2.048MHz is about 1/5
of the 10MHz so it is not possible. Sofar the way out is: dividing the
10MHz by 625 and then multiplying by 128 using the DCM in the Spartan3...
but nothing clever in this method. Sorry, not a valid contribution.
Hi Roberto:
By changing the timer count dynamically it's possible to lower the jitter to one timer count. See:
http://www.prc68.com/I/PClock.shtml#BA
Have Fun,
Brooke Clarke
Hi Brooke,
You're a fellow PIC guy; let me explain.
Correct, that method works with a modest interrupt rate to count
integer seconds without long-term rounding error; but to generate
a total of 32,768 as-consistent-as-possible pulses per second
is quite different.
It's possible to use Bresenham with two integers 10,000,000 and
32,768 but I found no way to perform all the 24-bit calculations
on an 8-bit PIC quick enough. Removing the GCD often helps
but in this case the accumulator remains 3-bytes wide.
To generate 32 kHz you have to toggle a pin and calculate if
the next toggle must be 38 or 39 instructions in the future; all
the math must occur within 37 instructions. That's why I came
up with the binary leap year kind of algorithm; it's as close to
math-less as you can get.
By comparison, all the decimal dividers (1 Hz, 10 Hz, etc.) that
you and I do are trivial because of the common factors with the
10 MHz clock. It's just that 32,768 has no factors of 5. Read the
comments in the file 10m32k.c for more details.
I'm curious how a 10 MHz-driven high-end DDS would generate
32 kHz with the lowest possible jitter?
/tvb