I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.
Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz <-90dBc
10Hz <-110dBc
100Hz <-120dBc
1k-100k <-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.
Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.
The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.
On 12/8/2010 10:31 AM, jimlux wrote:
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.
Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz <-90dBc
10Hz <-110dBc
100Hz <-120dBc
1k-100k <-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
John Ackermann N8UR wrote:
Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.
The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.
Doh... I was thinking that there was some vendor with ap notes on stuff
like this, and I couldn't recall who it was, and I'm actually looking at
a Wenzel OCXO sitting here on the desk.
On a somewhat related note, does any one have any information as to the likely
performance impact of using a single logic gate to convert a sine wave to a
pseudo square wave ? (I discovered one of my scopes doesn't consistently
accept a sine wave time base input, thru trial and error and rummaging thru my
junk box I ended up using a 74ALS00 Nand gate to convert a 10 mhz sine wave into
a somewhat square wave (: which the scope will reliably use as a reference
input.) Extreme accuracy is not really needed in this application but I am
curious how much jitter I may have introduced.
I'll likely try one of the circuts in the attached link at some point.
Best regards
Mark
----- Original Message ----
From: John Ackermann N8UR jra@febo.com
To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Wed, December 8, 2010 7:46:12 AM
Subject: Re: [time-nuts] reference oscillator input circuit
Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.
The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.
On 12/8/2010 10:31 AM, jimlux wrote:
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.
Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz <-90dBc
10Hz <-110dBc
100Hz <-120dBc
1k-100k <-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
jimlux wrote:
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
In the 5071A at 80 MHz, we capacitively coupled a sine wave into
a 74AC series logic gate, that had DC bias resistors to hold
it at half the supply voltage.
Rick Karlquist
The document cited is full of plausible sounding but misleading
information, if you want really low jitter. This type
of oversimplification of the problem was present when the
HP53131 series counters were designed, with the result that
the Allan deviation of an external 10 MHz reference is degraded
to only a part in 10^11 at 1 second.
Rick Karlquist
jimlux wrote:
John Ackermann N8UR wrote:
Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.
The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.
Doh... I was thinking that there was some vendor with ap notes on stuff
like this, and I couldn't recall who it was, and I'm actually looking at
a Wenzel OCXO sitting here on the desk.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Just an FYI guys, I'm pretty sure the 3rd circuit down on the Wenzel page is
identical to the input circuit for the TAPR TADD-2 frequency divider. The
TADD-2 adds a transformer and load resistor. Schematic is in the manual
here:
http://www.tapr.org/~n8ur/TADD-2_Manual.pdf
-Bob
On Wed, Dec 8, 2010 at 8:46 AM, John Ackermann N8UR jra@febo.com wrote:
Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.
The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.
On 12/8/2010 10:31 AM, jimlux wrote:
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.
Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz <-90dBc
10Hz <-110dBc
100Hz <-120dBc
1k-100k <-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
I can confirm that -- that's where I found it (and my schematic in the
TADD-2 manual gives credit to Wenzel)!
I chose that design mainly because it worked over a wide range of input
levels.
On 12/8/2010 12:48 PM, Robert Darlington wrote:
Just an FYI guys, I'm pretty sure the 3rd circuit down on the Wenzel page is
identical to the input circuit for the TAPR TADD-2 frequency divider. The
TADD-2 adds a transformer and load resistor. Schematic is in the manual
here:
http://www.tapr.org/~n8ur/TADD-2_Manual.pdf
-Bob
On Wed, Dec 8, 2010 at 8:46 AM, John Ackermann N8URjra@febo.com wrote:
Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.
The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.
On 12/8/2010 10:31 AM, jimlux wrote:
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.
Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz<-90dBc
10Hz<-110dBc
100Hz<-120dBc
1k-100k<-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
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and follow the instructions there.
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and follow the instructions there.
Rick Karlquist wrote:
jimlux wrote:
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
In the 5071A at 80 MHz, we capacitively coupled a sine wave into
a 74AC series logic gate, that had DC bias resistors to hold
it at half the supply voltage.
that's similar to what Said recommended last year.. he uses a big
resistor from output to input to set the bias, rather than a divider.
One problem with this circuit is that tolerances in the resistors
produce an offset between the 2 transistor bases in addition to any
transistor mismatch,
It's better to share a single divider and short (eg a transformer
winding. Or at least connect them with a low impedance at low
frequencies) the transistor bases together.
Capacitively coupling the emitters can also be useful.
Bruce
Robert Darlington wrote:
Just an FYI guys, I'm pretty sure the 3rd circuit down on the Wenzel page is
identical to the input circuit for the TAPR TADD-2 frequency divider. The
TADD-2 adds a transformer and load resistor. Schematic is in the manual
here:
http://www.tapr.org/~n8ur/TADD-2_Manual.pdf
-Bob
On Wed, Dec 8, 2010 at 8:46 AM, John Ackermann N8URjra@febo.com wrote:
Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.
The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.
On 12/8/2010 10:31 AM, jimlux wrote:
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.
Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz<-90dBc
10Hz<-110dBc
100Hz<-120dBc
1k-100k<-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Assuming a transformer coupled input (with biasing via a secondary center tap)
why not use a fast differential PECL to CMOS level translator? For example, the
IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V swing on
the output. The chip works down to DC and keeps the duty cycle in the 40%-60%
window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd however.
To increase the noise immunity with a relatively slow 10MHz sine source I'd look
at boosting the amplitude with the transformer, then clipping with balanced
series resistors and back-to-back diodes so the translator sees a higher dV/dT
on its inputs.
Might want to look in some old Motorola ECL appnotes for other possible schemes.
Bob
From: jimlux jimlux@earthlink.net
To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Wed, December 8, 2010 10:31:08 AM
Subject: [time-nuts] reference oscillator input circuit
I'm looking for suggestions on a general circuit that can be used to receive an
external frequency reference (nominally a real clean sine wave at, say, 10 MHz,
although up to 100 MHz is possible) and turn it into a "real clean" square
wave. Galvanic isolation is a plus (a transformer or capacitor would probably
do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but any
other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount of
discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV setup,
not so much on what to do with the 10 MHz. Rick has commented that you don't
want to use a comparator. I have the papers by Dick, et al, and Collins, as well
as all the others.. they tend to be looking at the low frequency problem,
although the analysis is certainly applicable.
I don't know that I'm looking for the whole multiple limiting stages scheme in
any case.
Oh, as far as performance.. Say the need is to not horribly degrade a good
quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz <-90dBc
10Hz <-110dBc
100Hz <-120dBc
1k-100k <-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10 sec, and
back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
One caveat with driving a CMOS gate input is that if it is overdriven so
that the input protection circuit diodes conduct then the output jitter
may increase substantially.
At least this appears to happen when overdriving 74HC04 inverters.
Once the input diodes conduct (5MHz sine wave input) the output jitter
is easily measured with a 5370A/B.
Just below conduction the output jitter appears to be buried in the
5370A/B noise.
Bruce
Rick Karlquist wrote:
The document cited is full of plausible sounding but misleading
information, if you want really low jitter. This type
of oversimplification of the problem was present when the
HP53131 series counters were designed, with the result that
the Allan deviation of an external 10 MHz reference is degraded
to only a part in 10^11 at 1 second.
Rick Karlquist
jimlux wrote:
John Ackermann N8UR wrote:
Wenzel has some discussion and circuits at:
http://www.wenzel.com/documents/waveform.html.
The Shera GPSDO made clever use of the input circuit of a 74HCT4046 PLL
chip for squaring.
Doh... I was thinking that there was some vendor with ap notes on stuff
like this, and I couldn't recall who it was, and I'm actually looking at
a Wenzel OCXO sitting here on the desk.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
One can estimate the resultant jitter from the input slew rate and the
circuit noise and bandwidth.
Too much bandwidth with a slow input slew rate increases the jitter
substantially over that possible with an optimal circuit.
Bruce
Robert LaJeunesse wrote:
Assuming a transformer coupled input (with biasing via a secondary center tap)
why not use a fast differential PECL to CMOS level translator? For example, the
IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V swing on
the output. The chip works down to DC and keeps the duty cycle in the 40%-60%
window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd however.
To increase the noise immunity with a relatively slow 10MHz sine source I'd look
at boosting the amplitude with the transformer, then clipping with balanced
series resistors and back-to-back diodes so the translator sees a higher dV/dT
on its inputs.
Might want to look in some old Motorola ECL appnotes for other possible schemes.
Bob
From: jimluxjimlux@earthlink.net
To: Discussion of precise time and frequency measurementtime-nuts@febo.com
Sent: Wed, December 8, 2010 10:31:08 AM
Subject: [time-nuts] reference oscillator input circuit
I'm looking for suggestions on a general circuit that can be used to receive an
external frequency reference (nominally a real clean sine wave at, say, 10 MHz,
although up to 100 MHz is possible) and turn it into a "real clean" square
wave. Galvanic isolation is a plus (a transformer or capacitor would probably
do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but any
other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount of
discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV setup,
not so much on what to do with the 10 MHz. Rick has commented that you don't
want to use a comparator. I have the papers by Dick, et al, and Collins, as well
as all the others.. they tend to be looking at the low frequency problem,
although the analysis is certainly applicable.
I don't know that I'm looking for the whole multiple limiting stages scheme in
any case.
Oh, as far as performance.. Say the need is to not horribly degrade a good
quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz<-90dBc
10Hz<-110dBc
100Hz<-120dBc
1k-100k<-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10 sec, and
back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
ECL has a high phase noise floor in the -140s.
Other than that, it works fine.
Rick Karlquist
Robert LaJeunesse wrote:
Assuming a transformer coupled input (with biasing via a secondary center
tap)
why not use a fast differential PECL to CMOS level translator? For
example, the
IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V
swing on
the output. The chip works down to DC and keeps the duty cycle in the
40%-60%
window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd however.
To increase the noise immunity with a relatively slow 10MHz sine source
I'd look
at boosting the amplitude with the transformer, then clipping with
balanced
series resistors and back-to-back diodes so the translator sees a higher
dV/dT
on its inputs.
Might want to look in some old Motorola ECL appnotes for other possible
schemes.
Bob
From: jimlux jimlux@earthlink.net
To: Discussion of precise time and frequency measurement
time-nuts@febo.com
Sent: Wed, December 8, 2010 10:31:08 AM
Subject: [time-nuts] reference oscillator input circuit
I'm looking for suggestions on a general circuit that can be used to
receive an
external frequency reference (nominally a real clean sine wave at, say, 10
MHz,
although up to 100 MHz is possible) and turn it into a "real clean" square
wave. Galvanic isolation is a plus (a transformer or capacitor would
probably
do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any
other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount of
discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV
setup,
not so much on what to do with the 10 MHz. Rick has commented that you
don't
want to use a comparator. I have the papers by Dick, et al, and Collins,
as well
as all the others.. they tend to be looking at the low frequency problem,
although the analysis is certainly applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in
any case.
Oh, as far as performance.. Say the need is to not horribly degrade a good
quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz <-90dBc
10Hz <-110dBc
100Hz <-120dBc
1k-100k <-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and
back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Yes, and thus if you are going to use a comparator or line
receiver (not recommended), then you should use the SLOWEST
one that still works, if you want to optimize jitter.
This is because the noise bandwidth is less.
Bruce Griffiths wrote:
One can estimate the resultant jitter from the input slew rate and the
circuit noise and bandwidth.
Too much bandwidth with a slow input slew rate increases the jitter
substantially over that possible with an optimal circuit.
Bruce
Robert LaJeunesse wrote:
Assuming a transformer coupled input (with biasing via a secondary
center tap)
why not use a fast differential PECL to CMOS level translator? For
example, the
IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V
swing on
the output. The chip works down to DC and keeps the duty cycle in the
40%-60%
window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd
however.
To increase the noise immunity with a relatively slow 10MHz sine source
I'd look
at boosting the amplitude with the transformer, then clipping with
balanced
series resistors and back-to-back diodes so the translator sees a higher
dV/dT
on its inputs.
Might want to look in some old Motorola ECL appnotes for other possible
schemes.
Bob
From: jimluxjimlux@earthlink.net
To: Discussion of precise time and frequency
measurementtime-nuts@febo.com
Sent: Wed, December 8, 2010 10:31:08 AM
Subject: [time-nuts] reference oscillator input circuit
I'm looking for suggestions on a general circuit that can be used to
receive an
external frequency reference (nominally a real clean sine wave at, say,
10 MHz,
although up to 100 MHz is possible) and turn it into a "real clean"
square
wave. Galvanic isolation is a plus (a transformer or capacitor would
probably
do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any
other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount
of
discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV
setup,
not so much on what to do with the 10 MHz. Rick has commented that you
don't
want to use a comparator. I have the papers by Dick, et al, and Collins,
as well
as all the others.. they tend to be looking at the low frequency
problem,
although the analysis is certainly applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in
any case.
Oh, as far as performance.. Say the need is to not horribly degrade a
good
quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz<-90dBc
10Hz<-110dBc
100Hz<-120dBc
1k-100k<-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and
back up to 2 E-12 at 1000sec.
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On 12/08/2010 06:28 PM, Rick Karlquist wrote:
jimlux wrote:
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
In the 5071A at 80 MHz, we capacitively coupled a sine wave into
a 74AC series logic gate, that had DC bias resistors to hold
it at half the supply voltage.
A feed-back resistor over an inverter and capacitive feed will self-bias
such that PWM is 50%. The details of the gate being used may however
prove lethal as you may end up with self-biasing into ring-modulation
mode for some "inverters" being effectively three inverters in series.
The use of a long-tailed pair on the input to gain out of the problem,
prior to a gate for final squaring up would be my recommendation. It
would be in the spirit of the Dick and Collins papers. The needed
slew-rate gain will not be that great for 10 MHz to 100 MHz sine.
You should not need to use very exotic setups to get the performance you
need.
Cheers,
Magnus
On 12/08/2010 09:13 PM, Rick Karlquist wrote:
Yes, and thus if you are going to use a comparator or line
receiver (not recommended), then you should use the SLOWEST
one that still works, if you want to optimize jitter.
This is because the noise bandwidth is less.
For optimum result you need to balance the slew-rate gain (essentially
gain of the transition slew-rate) and the amount of added noise. You
need a certain amount of bandwidth for a certain amount of output
slew-rate, but higher bandwidth also gives more noise. A multi-stage
setup use moderate gain and bandwidth in the initial stages, but it
increases down the line.
A few links:
http://www.ko4bb.com/~bruce/CLKSHPR.html
http://www.ko4bb.com/~bruce/ZeroCrossingDetectors.html
As for transformer isolation, for most uses I find it fairly useless,
but an RF-choke to isolate the front-end and the electronics RF-wise in
common mode sense is more useful IMHO.
Cheers,
Magnus
I was thinking about how good or how bad would result the use of an LVDS
line receiver ... but it is only a though :)
Regards,
Javier
El 08/12/2010 19:50, Robert LaJeunesse escribió:
Assuming a transformer coupled input (with biasing via a secondary center tap)
why not use a fast differential PECL to CMOS level translator? For example, the
IDT ICS508 will take 0.3 to 1.0 V p-p input and give 2.5, 3.3, or 5 V swing on
the output. The chip works down to DC and keeps the duty cycle in the 40%-60%
window up to 250MHz (at 3.3V out). Jitter and noise is not spec'd however.
To increase the noise immunity with a relatively slow 10MHz sine source I'd look
at boosting the amplitude with the transformer, then clipping with balanced
series resistors and back-to-back diodes so the translator sees a higher dV/dT
on its inputs.
Might want to look in some old Motorola ECL appnotes for other possible schemes.
Bob
From: jimluxjimlux@earthlink.net
To: Discussion of precise time and frequency measurementtime-nuts@febo.com
Sent: Wed, December 8, 2010 10:31:08 AM
Subject: [time-nuts] reference oscillator input circuit
I'm looking for suggestions on a general circuit that can be used to receive an
external frequency reference (nominally a real clean sine wave at, say, 10 MHz,
although up to 100 MHz is possible) and turn it into a "real clean" square
wave. Galvanic isolation is a plus (a transformer or capacitor would probably
do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but any
other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount of
discussion on how to square up the 1Hz (or 100Hz) in a phase noise/ADEV setup,
not so much on what to do with the 10 MHz. Rick has commented that you don't
want to use a comparator. I have the papers by Dick, et al, and Collins, as well
as all the others.. they tend to be looking at the low frequency problem,
although the analysis is certainly applicable.
I don't know that I'm looking for the whole multiple limiting stages scheme in
any case.
Oh, as far as performance.. Say the need is to not horribly degrade a good
quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz<-90dBc
10Hz<-110dBc
100Hz<-120dBc
1k-100k<-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10 sec, and
back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
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and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
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and follow the instructions there.
Javier Herrero EMAIL: jherrero@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L. PHONE: +34 949 336 806
Los Charcones, 17 FAX: +34 949 336 792
19170 El Casar - Guadalajara - Spain WEB: http://www.hvsistemas.com
Of all the ways to "square" a sine wave I think the best might be to use a PLL.
the raising edge of your output square wave would trigger a sample of the
input sine wave. The distance from zero volts of that sample is the
phase error.
The goal is to have the raising edge of the square wave happen just as the
sine crosses zero. But if it's not dead-on you get an error signal that can be
either positive or negative and this error is low pass filtered and
then applied as
a correction.
But my guess is that if you are using this to feed a 'scope a
reference frequency
the scope will have it's own PLL.
Chris Albertson
Redondo Beach, California
The Wenzel diff-amp circuit is OK but it will run out of steam before 100
MHz unless you use different transistors. On the other hand you really have
to go out of your way to corrupt the signal at the -125 dBc/Hz level. At
that level of play any decent comparator with the necessary slew rate will
be fine.
A 74AC gate looks good in this scenario:
http://www.ke5fx.com/ac.htm
... subject to what other people have said about it being sensitive to input
level.
-- john, KE5FX
-----Original Message-----
From: time-nuts-bounces@febo.com [mailto:time-nuts-bounces@febo.com]On
Behalf Of jimlux
Sent: Wednesday, December 08, 2010 7:31 AM
To: Discussion of precise time and frequency measurement
Subject: [time-nuts] reference oscillator input circuit
I'm looking for suggestions on a general circuit that can be used to
receive an external frequency reference (nominally a real clean sine
wave at, say, 10 MHz, although up to 100 MHz is possible) and turn it
into a "real clean" square wave. Galvanic isolation is a plus (a
transformer or capacitor would probably do that).
I was thinking about rummaging through the schematics for test equipment
reference inputs (since they've already "solved" the problem, eh?), but
any other ideas would be welcome.
I've scanned the archives of time-nuts, and while we have a fair amount
of discussion on how to square up the 1Hz (or 100Hz) in a phase
noise/ADEV setup, not so much on what to do with the 10 MHz. Rick has
commented that you don't want to use a comparator. I have the papers by
Dick, et al, and Collins, as well as all the others.. they tend to be
looking at the low frequency problem, although the analysis is certainly
applicable.
I don't know that I'm looking for the whole multiple limiting stages
scheme in any case.
Oh, as far as performance.. Say the need is to not horribly degrade a
good quality crystal oscillator... here's a typical set of specs:
76 MHz
1Hz <-90dBc
10Hz <-110dBc
100Hz <-120dBc
1k-100k <-125dBc
Adevs of the oscillator run from 5E-12 at 0.1 sec, down to 1E-12 at 10
sec, and back up to 2 E-12 at 1000sec.
time-nuts mailing list -- time-nuts@febo.com
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https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Hello The Net:
I estimate /B MBD to be in DM79lt, in Westminster, CO. Just NW of Denver.
Since I am in FN41sr, my LOB to is: 277.5 degrees ref true North
at a distance of 2,907.5 Km or 1806.4 miles.
I got the LOB and DX info from the BD2004 software at the
www.w1ghz.org site.
It would be a long shot for me to hear it from Cape Cod FN41sr
Stan,W1LE
umm u lost me any help?
On Wed, Dec 8, 2010 at 6:05 PM, Stan, W1LE stanw1le@verizon.net wrote:
Hello The Net:
I estimate /B MBD to be in DM79lt, in Westminster, CO. Just NW of
Denver.
Since I am in FN41sr, my LOB to is: 277.5 degrees ref true North
at a distance of 2,907.5 Km or 1806.4 miles.
I got the LOB and DX info from the BD2004 software at the www.w1ghz.org site.
It would be a long shot for me to hear it from Cape Cod FN41sr
Stan,W1LE
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Hi
I assume we're talking about a NDB (non directional beacon).
This time of year is pretty good for low frequency stuff. The thunderstorms die down and you can really hear a long ways. The path you are talking about is quite possible.
Bob
On Dec 8, 2010, at 6:05 PM, Stan, W1LE wrote:
Hello The Net:
I estimate /B MBD to be in DM79lt, in Westminster, CO. Just NW of Denver.
Since I am in FN41sr, my LOB to is: 277.5 degrees ref true North
at a distance of 2,907.5 Km or 1806.4 miles.
I got the LOB and DX info from the BD2004 software at the www.w1ghz.org site.
It would be a long shot for me to hear it from Cape Cod FN41sr
Stan,W1LE
time-nuts mailing list -- time-nuts@febo.com
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and follow the instructions there.
Sorry for the confusion,
Not a non directional beacon (NDB) , but rather a part 15 beacon on 137 KHz.
some recent posts include :
On 12/8/2010 3:55 PM, C. Turner wrote:
I tried detecting MBD/QRSS30 from Utah - but nothing heard/seen.
Beacon MBD is on now, at 187.517 khz, QRSS30 mode. 0400 - 0700 UTC ( 9pm MST
to 12 am MST )
73
Mark AB0CW
Thanks Stan, W1LE Cape Cod
I figured out what I did wrong. I cross posted from the lowfer reflector.
Please disregard.
I will be more careful in the future. Stan, W1LE Cape Cod
Hi
And take away all the fun of guessing what's going on ....
If you can indeed track a 1W signal from ~ Colorado, there might indeed be some timing use for the system.
Bob
On Dec 8, 2010, at 8:32 PM, Stan, W1LE wrote:
I figured out what I did wrong. I cross posted from the lowfer reflector.
Please disregard.
I will be more careful in the future. Stan, W1LE Cape Cod
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and follow the instructions there.
Darn, I was sure that was a coded message to space saying it was
safe to bring the Mother Ship in because we were all distracted
by tax cuts for the rich.
Bill Hawkins
-----Original Message-----
From: Stan, W1LE
Sent: Wednesday, December 08, 2010 7:32 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] MBD /B
I figured out what I did wrong. I cross posted from the lowfer reflector.
Please disregard.
I will be more careful in the future. Stan, W1LE Cape Cod
** You are assuming that you have a future. **
Javier Herrero wrote:
I was thinking about how good or how bad would result the use of an LVDS
line receiver ... but it is only a though :)
That's what I was using before, and it doesn't work very well..
Small common mode voltage range and large hysteresis.
They're really designed to take square wave(ish) inputs.
Chris Albertson wrote:
Of all the ways to "square" a sine wave I think the best might be to use a PLL.
the raising edge of your output square wave would trigger a sample of the
input sine wave. The distance from zero volts of that sample is the
phase error.
The goal is to have the raising edge of the square wave happen just as the
sine crosses zero. But if it's not dead-on you get an error signal that can be
either positive or negative and this error is low pass filtered and
then applied as
a correction.
But my guess is that if you are using this to feed a 'scope a
reference frequency
the scope will have it's own PLL.
No, actually to feed a bunch of synthesizer chains (for which the sine
wave will work fine) and to drive sampling clocks on ADC/DAC (for which
one wants a low jitter square wave).
A digital radio...
Good to know. Now I see what not to use :) I was supposing that the
hysteresis would not be so high being low voltage signalling, and since
they are used for low-jitter applications. But really I've only used
them for their intended main applications :)
Best regards,
Javier
El 09/12/2010 14:50, jimlux escribió:
Javier Herrero wrote:
I was thinking about how good or how bad would result the use of an
LVDS line receiver ... but it is only a though :)
That's what I was using before, and it doesn't work very well..
Small common mode voltage range and large hysteresis.
They're really designed to take square wave(ish) inputs.
time-nuts mailing list -- time-nuts@febo.com
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https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Javier Herrero EMAIL: jherrero@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L. PHONE: +34 949 336 806
Los Charcones, 17 FAX: +34 949 336 792
19170 El Casar - Guadalajara - Spain WEB: http://www.hvsistemas.com