Erik Kaashoek via time-nuts writes:

At a 1ps level of interest, that is not a well-founded expectation.

In particular look out for power-supply variations, which will transpose the trigger point for your "digital" clock-signals.

PS: Do not ignore mechanics either: At the speed of light 1ps takes you only 0.3mm.

--
Poul-Henning Kamp      | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG        | TCP/IP since RFC 956
FreeBSD committer      | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

The down converted input signals are converted to digital using an ADC. The
rest is DSP. No digital circuit triggering timers. Can the clock of the MCU
still have an impact? For sure the clock of the ADC can have an impact.

The mechanics are very nasty. No touching of the table with the DMTD on it.
Worst are the coax cables. BNC connectors are terribly unstable.

Is 1 to 10 ps to be expected in the electronics? Or should I invest in semi
rigid coax?
Erik

On Sun, Oct 23, 2022, 21:58 Poul-Henning Kamp phk@phk.freebsd.dk wrote:

Erik Kaashoek writes:

I think you are at the level where you have to treat everything as
suspect, and through well designed experiments try to isolate where
to spend money.

Some randomish input:

1. Take photos of the setup of /all/ your experiments, so you
   later can figure out which ones were affected by the magnetized
   screwdriver or whatever.

2. Make your circuit/experiment constant power.  Having separate
   "idle" and "measure" modes, forces you to wait for thermal
   balance every time you start a measurement.  (One of the few
   things HP only got /almost/ right with the HP3458A)

3. Characterize your sensitivities.  Modulate the power-supply,
   see what happens.  Module the temperature, see what happens.
   kick the table, see what happens.  Turn the experiment 90, 180 and
   270 degrees around as many axis as you can/dare, see what happens.
   Run the experiment in full light and darkness, see what happens.
   If you dont know your sensitivities, you dont know if your
   readings are real or noise, even if they reach statistical
   significance.

4. Pre-owned fridges and freezers make good cheap shielded thermal
   chambers, if you do not plug them in.  If the experiment produces
   too much heat, run constant temperature water through the coils.
   If there is space, add a couple of bricks to add thermal impedance.

And good luck :-)

--
Poul-Henning Kamp      | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG        | TCP/IP since RFC 956
FreeBSD committer      | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

Hi

When you blow cold air over this or that, you likely create a temperature
gradient. Sensitivities of various parts are actually higher to gradients
than to temperature offsets. It’s typically a stress / strain relation that relaxes
out in steady state.

In addition to ( as noted above ) suspecting everything in the circuit. You
also have to suspect the measurement technique……

Bob

I realized when completing http://jmfriedt.free.fr/ifcs2021.pdf that the only
clock that matters in Software Defined Radio is the ADC clock which timestamps
each and every sample, from which subsequent digital processing can recover the
acquisition time. The digital processing system can be asynchronous, buffered, pipelined
but the latency between acquisition and processing will not matter in an open
loop analysis of the radiofrequency data. In the cited work we mistakenly believed
initially that the CPU clock had to be steered, before realizing it was only the clock
referencing the ADC (and the FPGA) that mattered.

Best, JM

Hello,

PTFE cables have quite a phase variation vs temperature, with the worse
slope just around 20ºC. Better alternatives are the Huber+Suhner CT
cables. The catalog shows some nice curves on phase variation vs
temperature:
https://literature.hubersuhner.com/Technologies/Radiofrequency/ct-product-family-en/?page=1

Best regards,

Javier

On 10/23/22 22:15, Erik Kaashoek via time-nuts wrote:

Hi Erik,

only the ADC clock should matter and the used ADC should be of the
simultaneous sampling type. If it's not, its multiplexer may have a
detrimental temperature-dependent effect on the phase measurement.

I've implemented a fully digital DMTD using USRP N210 with LFRX
daughterboards [1]. To analyze stability of the system itself, I
compared a split 10 MHz signal. Over the course of 4 days, the measured
standard deviation was 359 fs [1, Fig. 11]. I don't have temperature
measurements available, but the lab wasn't air conditioned, populated,
and diurnal difference between two SRS FS725 was clearly observable
(another measurement not in the paper).

The high stability could be explained by the N210's dual-channel ADC
that directly sampled both 10 MHz signals. I believe, temperature
differences between the preceding analog components (most importantly
the LFRX daughterboard) probably have a very limited effect on account
of the negligible relative bandwidth of the measured 10 MHz signals'
true frequency (a few (dozen) mHz vs. 10 MHz). If the 10 MHz were
down-mixed to a few Hz in the analog domain, the relative bandwidth
would increase substantially. Of course, that's just an educated guess.
I did not investigate temperature stability when I wrote the paper.

Best regards,
Carsten

[1] https://arxiv.org/pdf/1803.01438.pdf

On 24.10.22 07:19, jeanmichel.friedt--- via time-nuts wrote:

I'd say 1 ps / C is fine, but the 10 ps number seems high so you may
want to identify the source of that. For some context look at the specs
of a metrology grade distribution amp:

https://spectradynamics.com/products/hpda-15rmi-high-performance-distribution-amplifier-1-50mhz/

Its tempco spec is 1.5 ps/C, which sounds good enough for a professional
timing lab to me. Even if you had 3 C modulation of temperature that's
under 5e-15 @1000 s so it would be in the noise. And if better
performance was required you can simply keep the room to 0.3 C instead
of 3 C. That way everything in your lab -- cables, connectors, power
supplies, oscillator references, measurement instruments -- improves
accordingly.

Another example is John Miles' TimePod [1] and PhaseStation [2]. Note
these are not spec'd explicitly in ps/C but rather ps/hour. I had not
seen that before.

/tvb

[1] https://www.miles.io/TimePod_5330A_user_manual.pdf

[2]
http://ww1.microchip.com/downloads/en/AppNotes/AN3526-Dual-Reference-Noise-and-Stability-Measurements-with-the-53100A-PNA-DS00003526A.pdf

On 10/23/2022 9:05 AM, Erik Kaashoek via time-nuts wrote:

Hi Javier,
The PTFE cables have been replaced with semi-rigid coax cables and the
stability, both mechanical and temperature, have improved.
Thanks.
Erik.
On 24-10-2022 8:02, Javier Herrero via time-nuts wrote:

Hi Carsten

Thanks for the very interesting article. As my DMTD uses an audio ADC,
the 10MHz inputs first have to be down mixed to the selected audio IF.
This probably will add to long term instability.
Although in the article "Measurement of Phase Difference Using DSP
Algorithms by Non-Coherent Sampling" by Michal Krumpholc and Milos
Sedlacek it is explained that DFT is not an optimal choice for a DMTD, I
decided to use DFT. This because a bit true simulation showed the impact
of the spectral leakage to be below the performance ambition and using
all samples reduced noise. Also a PLL is used to sync the sampling with
the reference input to reduce the worst impact of the non-coherent
sampling.
In your "DSP for Sine Wave Reference Signals " method you only have one
NCO, how do you avoid the non-coherent sampling and spectral leakage
problem with two non coherent inputs?
In my measurements there is a clear difference in noise between using
coherent inputs (e.g. single clock send to both inputs) and non coherent
inputs, even if the frequency difference is in the order of 10 micro
Hertz, but this could be due to the noise from the DDS used to generate
the dual signals with very small frequency differences. As I have no
access to very stable clocks the DDS is the only tool I can use for
stability measurements.
Erik.

On 24-10-2022 10:10, Carsten Andrich wrote:

On 10/23/22 10:19 PM, jeanmichel.friedt--- via time-nuts wrote:

One thing to watch out for, though, is at the transition from ADC clock
to CPU clock domains, you will have some sort of synchronizer, and you
have to watch out for either metastability or an "off by one" kind of thing.

Perhaps an exception is a classic double buffer in hardware, where ADC
loads a dual port memory with its clock, then CPU unloads the buffer,
while ADC fills the other.  But you still have the uncertainty in the
dual port mechanism.

On 10/24/22 1:33 AM, Tom Van Baak via time-nuts wrote:

for what it's worth, we've just measured a bunch of GNSS band pass
filter/LNA combinations and they run about 30-40 picoseconds/C delay tempco

Luckily the results with the semi rigid coax cables is a bit better then
that.
Also mechanical stability improved a lot.
http://athome.kaashoek.com/time-nuts/DMTD/stability.PNG

The big excursions where caused by opening the door to the room.
The second fairly stable half was measured with a closed door and no
people present.
The input signals where 0.01 Hz apart. The leakage between the two
inputs probably caused 1 ps phase oscillations every 100 seconds.
Erik.

On 24-10-2022 16:25, Lux, Jim via time-nuts wrote:

The 1 ps/C figure is typical of most components other than magnetics.  Some
RF transformers clock in at 10 ps/C or more, and some don't seem to have
much of a phase tempco at all.  And as Javier points out, the choice of
cabling can have a big influence as well.

To Eric's earlier point, there is nothing religiously bad about BNC
terminations in general, because you're not going to move the cables around
during the measurement.  Right? :)  If you are, then screw-on connectors
such as N, SMA, and TNC are obviously a better way to go.  But the best
advice remains, "Don't do that."  It's far better to maintain a
mechanically- and thermally-stable environment than to rely on individual
components to hold their (usually unspecified) values for you.

In production test we tend to see residual phase behavior like the attached
screenshots, which came from a 53100A but could also have come from a 5330A
or 3120A.  Here, the unit has warmed up for an hour, but there's still a bit
of initial drift due to slight internal temperature changes associated with
the measurement process.  Once those effects settle, drift is usually on the
order of 1 ps/day in a stable environment, as seen in the other screenshot.

The cited spec of "< 10 ps/hour after 2 hours, typically less than 2
ps/hour" is very conservative, usually by 10x or more.  We're leaving some
wiggle room for less-than-ideal conditions in the field, from temperature to
cabling.  You should see similar sub-picosecond drift figures from your own
DMTD, given similar conditions.  If not, there will be a reason, one that is
probably not too hard to address.

-- john

Miles Design LLC

<https://spectradynamics.com/products/hpda-15rmi-high-performance-distributi
on-amplifier-1-50mhz/>
https://spectradynamics.com/products/hpda-15rmi-high-performance-

<https://spectradynamics.com/products/hpda-15rmi-high-performance-distributi
on-amplifier-1-50mhz/> > distribution-amplifier-1-50mhz/

https://www.miles.io/TimePod_5330A_user_manual.pdf

<http://ww1.microchip.com/downloads/en/AppNotes/AN3526-Dual-Reference-Noise-
and-Stability-Measurements-with-the-53100A-PNA-DS00003526A.pdf>
http://ww1.microchip.com/downloads/en/AppNotes/AN3526-Dual-

<http://ww1.microchip.com/downloads/en/AppNotes/AN3526-Dual-Reference-Noise-
and-Stability-Measurements-with-the-53100A-PNA-DS00003526A.pdf> >
Reference-Noise-and-Stability-Measurements-with-the-53100A-PNA-

<http://ww1.microchip.com/downloads/en/AppNotes/AN3526-Dual-Reference-Noise-
and-Stability-Measurements-with-the-53100A-PNA-DS00003526A.pdf> >
DS00003526A.pdf

On 10/24/22 12:49 PM, John Miles via time-nuts wrote:

We didn't measure it separately for our L-band LNA/BPF system, but I'd
be willing to bet that it's the filter that dominates the time delay
tempco.  Changes in L and C with temperature are well known, and changes
in tuning will change the delay.

In our system we're looking for uncertainties << 1ns, over 0-40C
temperature range, so 30 ps/K is a big number.

Hi

I think you will find that a lot of these GNSS gizmos have ceramic or SAW filters
in them. That’s likely not true for a device that covers from above L1 down to below
L5 in one gulp. It is the likely approach for an L1 or L1 / L2 sort of device. It’s almost
certainly how a “telecom” antenna is done.

Bob

On 10/24/22 4:59 PM, Bob kb8tq wrote:

Our receivers are L1/L2, but yes a discrete LC filter.  But SAW devices
have a noticeable tempco too.  30 years ago I used to assume a 100ppm
box for 100 degree change, with a parabolic curve, but I can't remember
if that was Si or LiNbO3 .

Hi

A couple hundred ppm over 100C would not be out of the question for
ceramic. Since you have a parabola on the SAW, it’s going to depend on
just what range the 100C covers. Even there > 100 ppm is not unusual.

Bob

Hi Erik,

spectral leakage only occurs with the DFT due to its implicit
rectangular window applied to the input samples. The appeal of the
digital down conversion (DDC) implemented with the NCO is that coherence
does not matter and spectral leakage does not occur. It's simply a
perfect, digital implementation of the down mixing you perform in the
analog domain. Its purpose is to shift the frequency of the signal to
enable reduction of the sample rate to reasonable levels (a few kSa/s
instead of >= 25 MSa/s) via decimation. The decimation can also be seen
as averaging, so this approach also uses every available sample.

Additionally, the use of complex down-conversion enables straightforward
phase estimates. Relative to the sampling clock by taking the phase
angle of the complex samples of a single channel. Between two channels
by taking the phase angle of fraction of two channels' complex samples.
If you unwrap the phase angles and apply linear regression, you can
compute the average frequency difference.

Best regards,
Carsten

On 24.10.22 15:35, Erik Kaashoek wrote:

Hi Carsten,
In my DMTD I use a PLL to lock the LO of the analog down mixers to the
reference input. In the digital domain the I/Q mixer has a fixed LO
converting to an fb of zero Hz (kept at zero with the PLL) and the
output of the mixer is averaged as decimation.
This should (I hope) also avoid spectral leakage, just like you did with
the NCO. I've tested this by adding/removing a window function and this
did not make any difference, as long as the fb was kept at zero Hz. The
further processing is done as you describe in the second part of your
reaction.
The problem with my DMTD seems to be not spectral leakage but the
limited isolation between the two inputs (only about 80dB isolation) so
the DUT input leaks into the REF input and because the frequency
difference is small the downconverted DUT leakage is not filtered out by
the averaging. Adding/removing the windowing did not make any difference
for this DUT leakage.
But as the leakage is linear it may be possible to model the leakage and
compensate for it.
Erik.

On 25-10-2022 9:43, Carsten Andrich wrote:

Hi John,
Thanks for the practical advice and the measurements.
After ironing out some problems the measurement noise with two equal
inputs and a tau of 0.1 s is now below 100 fs.
Long term phase stability has also improved and typical slow phase
variations over an hour, when measured on a desktop in a room with
people, are now within 4 ps
The next step may be to replace the current plastic enclosure with a
decommissioned fridge, but that would defeat the idea of having a small
battery powered portable device.
Erik.

On 24-10-2022 21:49, John Miles via time-nuts wrote:

Hi

A beach towel tossed over the device may improve things quite a bit.
Next step up from that would be a die cast metal enclosure. They are
pretty cheap from a number of sources, Hammond is one, but there are
others.

Bob

Good afternoon,

On Sun, 23 Oct 2022 18:05:40 +0200
Erik Kaashoek via time-nuts time-nuts@lists.febo.com wrote:

I would like to add a few things that have not been mentioned already:

Most electronics seem to have a tempco of 1-10ps/K. It is not clear
where this tempco comes from, i.e. nobody fully explained it. It
is remarkable, though, that the range is pretty narrow and quite
stable over various technologies. Of course, analog filters have
a larger variation of tempco.

My guess (read: totally unscientific assumption, not backed by
any data or experiments) is that a major source of tempco are
mechanical stresses due to different linear expansion coefficients.
How exactly mechanical stresses affect delay in electronics is
not quite as simple as it would seem at a first glance. So it's
difficult to come up with a decent model that can be tested in
experiments.

Summa summarum: The few-ps tempco you are seeing is what I would
expect. See also [1] where they measured the tempco of a mixer
setup (the numbers boiled down to 1-2ps/K IIRC) and proposed
a way how to measure and compensate the drift.

I also recommend having a look at [2] for a more general treatment
of the issue of temperature coefficients in time/frequency measurement
systems.

On Mon, 24 Oct 2022 14:43:43 +0200
Erik Kaashoek via time-nuts time-nuts@lists.febo.com wrote:

Please keep in mind that the problem with PTFE is not the external
insulation of the coax cables, but the dielectric between the core
and the screen. A lot of semi-rigid still uses PTFE because it's
reasonably cheap and gives good performance. See [3-5] for more
information on this topic.

On Mon, 24 Oct 2022 10:10:27 +0200
Carsten Andrich via time-nuts time-nuts@lists.febo.com wrote:

It's a bit more complicated than that, unfortunately.
The mixer and their LO already add already some temperature dependence
due to inevitable asymmetries. The ADC themselves have a tempco too.
And it's not just direct temperature effect on the circuitry but also
indirect effect from power supplies. Even if using a dual-channel ADC
there are effects that affect the two channels differently. If you look
at Sherman and Jördens' paper [6], who looked at phase stability in SDR
systems for frequency / stability measurements, then you see that there
is a lower limit of a few 10's of fs in ADC sample timing. My guess is
that at least some of that is due to noise on the power grid in the
chip that causes IR drop [7]. Which is, by its nature, not symmetric.
It is also very likely that even small mechanical stresses due to minute
temperature variations at short time scales already cause timing differences
and phase shifts in the 10s of fs.

Figuring out where all these small temperature coefficients come from
is difficult, to say the least, and very tedious. Once you reach <10ps/K
I would, personally, call it a day and do the rest by proper enclosure
design and keeping everything at a stable temperature. This way it is
easier to reduce the tempco than to hunt for it in the electronics.

		Attila Kinali

[1] "2π Low Drift Phase Detector for High-Precision Measurements"
by Jablonski, Czuba, Ludwik and Schlarb, 2015
https://doi.org/10.1109/TNS.2015.2425733

[2] "Environmental Effects in Mixers and Frequency Distribution Systems",
by Nelson and Walls, 1992

[3] "Current Innovations In Phase Stable Coaxial Cable Design",
by Times Microwave Systems
https://www.timesmicrowave.com/downloads/tech/phasearticle.pdf

[4] "Understanding Phase Versus Temperature Behavior",
by Micro-coax
http://www.micro-coax.com/wp-content/themes/micro_coax/includes/pdf/applications_notes/13-MIC-0012.Phase_vs_Temp_Behavior_FINAL.pdf

[5] "Temperature Stability of Coaxial Cables",
by Czuba and Sikora, 2011
http://przyrbwn.icm.edu.pl/APP/PDF/119/a119z4p17.pdf

[6] "Oscillator metrology with software defined radio",
by Jeff A. Sherman and Robert Jördens, 2016
http://dx.doi.org/10.1063/1.4950898

[7] https://semiengineering.com/knowledge_centers/low-power/architectural-power-issues/ir-drop/

--
In science if you know what you are doing you should not be doing it.
In engineering if you do not know what you are doing you should not be doing it.
-- Richard W. Hamming, The Art of Doing Science and Engineering

Antilla
Using a narrow tube and a soure of cold air the biggest contributor has
been identified as the Gilbert cell active mixers used in the first stage.
In the current HW they are not used in a balanced way so a common mode
change, e.g. temperature change, is very visible.
I will read the the documents you referred to.
Erik

On Mon, Nov 14, 2022, 21:00 Attila Kinali via time-nuts <
time-nuts@lists.febo.com> wrote:

Hi,

Somewhere in the NIST T&F archive, there is reference to how mixers
cause a reflection of energy and temperature coefficients then change
phase and working-point. They use 3 dB damper on the mixer to stabilize
that and reduce the tempco situation. The signal degradation is
compensated for but improvement in stability significant. As I recall
it, they refer to the cable phase stability with regard to temperature
to be part of the culprit.

Now, DBM isn't perfect in terms of balance and nor is the Gilbert cell
mixers that Erik is using, so milage may vary, but one should look at
multiple aspects. Alteration of operating points, alteration of
dielectric with temperature etc. is things to be aware of and then try
to figure out which is the major driver for your setup and measurement
needs and aims.

I am sure someone have attempted to temperature stabilize a mixer at
some time.

When building synths for music, we end up temperature compensating the
expo-converters or even ovenize them to achieve needed stability. That
is not far from what a mixer does. Also, it is what got me into this
time and frequency thing in the first place.

Cheers,
Magnus

On 2022-11-14 17:37, Attila Kinali via time-nuts wrote:

Magnus,
One of the articles referenced by Attila mentioned inserting a second
known calibration input signal into both channels with a frequency
offset big enough so it becomes invisible in the regular DSP phase
measurement channel but by adding a second DSP phase measurement channel
at the offset of the inserted signal they had a real-time measurement of
the drift and where able to compensate for it.
Its rather compute intensive and I'm not sure what the offset has to be
to become invisible but could you imagine this could work in a rather
limited HW?
Maybe I should test it by inserting a calibration signal and see the
impact, but I can not imagine the short "FFT length" I'm using  to be
long enough to give 100dB or more suppression of the calibration signal.

Erik.

On 15-11-2022 22:59, Magnus Danielson via time-nuts wrote:

On Wed, 16 Nov 2022 07:41:30 +0100
Erik Kaashoek via time-nuts time-nuts@lists.febo.com wrote:

Before you go into your digital down mixer or CIC, you will have some form
of anti-aliasing filter. This filter's bandwidth is your first indication
how far you should be away. Later filters in the signal chain then filter
out the remaining components.

If you want to minimize the influence of the probe signal, you can,
and IMHO should, add a notch filter into the signal path. That should
give you some 80-100dB of additional damping and remove the probe signal
for all intents and purposes.

It is still a good idea to check for some kind of modulation in the
(processed) output at the difference frequency and its multiples.

BTW: I recommend having a look at [1], which is a very hands on book
on signal processing. It gives examples of what kind of structures to
use for different signal processing tasks and discusses their advantages
and disadvantages.

		Attila Kinali

[1] "Understanding Digital Signal Processing",
by Richard Lyons, 3rd edition, 2011

--
In science if you know what you are doing you should not be doing it.
In engineering if you do not know what you are doing you should not be doing it.
-- Richard W. Hamming, The Art of Doing Science and Engineering

Erik,

The side-channel to track the side-carrier can be made much simpler. You
do not need to FFT it, but you can do a direct PLL lock setup in
software and with that relate the clocks to each other. It consumes a
few cycles per sample, but really not much.

Cheers,
Magnus

On 2022-11-16 07:41, Erik Kaashoek via time-nuts wrote:

Magnus,
As often with your advice, I'm not smart enough to understand.
The digital down mixing to zero Hz is done with I/Q mixers where sin/cos
of the internal LO is multiplied with the input signals and then average
over some samples to get I and Q of the signal vector as the output
frequency is zero Hz.
I would expect I would need a separate set of I/Q mixers for the side
channel and by summing over many samples the noise would be reduced
sufficiently to get a relevant I and Q signal even if the side channel
has 40dB lower amplitude. I may have used the word FFT to describe the
operation of the I/Q mixers as computationally they look a lot like a
single bucket FFT
Erik.

On 16-11-2022 13:05, Magnus Danielson via time-nuts wrote: