EK
Erik Kaashoek
Wed, Nov 16, 2022 5:28 PM
Magnus, Attila,
I went ahead and did a fairly simple implementation of the side channel.
Both channels show, apart from the noise, the same phase drift in the
order of some ps. This seems to confirm the drift originates in the
mixers. Now I need a 3 channel DSS to test this. Maybe I can use the
10MHz ref out as the 3rd channel. And I have to find a way to inject the
side channel without creating additional leakage between the two main
channels.
Erik.
On 16-11-2022 13:05, Magnus Danielson via time-nuts wrote:
Erik,
The side-channel to track the side-carrier can be made much simpler.
You do not need to FFT it, but you can do a direct PLL lock setup in
software and with that relate the clocks to each other. It consumes a
few cycles per sample, but really not much.
Cheers,
Magnus
On 2022-11-16 07:41, Erik Kaashoek via time-nuts wrote:
Magnus,
One of the articles referenced by Attila mentioned inserting a second
known calibration input signal into both channels with a frequency
offset big enough so it becomes invisible in the regular DSP phase
measurement channel but by adding a second DSP phase measurement
channel at the offset of the inserted signal they had a real-time
measurement of the drift and where able to compensate for it.
Its rather compute intensive and I'm not sure what the offset has to
be to become invisible but could you imagine this could work in a
rather limited HW?
Maybe I should test it by inserting a calibration signal and see the
impact, but I can not imagine the short "FFT length" I'm using to be
long enough to give 100dB or more suppression of the calibration signal.
Erik.
On 15-11-2022 22:59, Magnus Danielson via time-nuts wrote:
Hi,
Somewhere in the NIST T&F archive, there is reference to how mixers
cause a reflection of energy and temperature coefficients then
change phase and working-point. They use 3 dB damper on the mixer to
stabilize that and reduce the tempco situation. The signal
degradation is compensated for but improvement in stability
significant. As I recall it, they refer to the cable phase stability
with regard to temperature to be part of the culprit.
Now, DBM isn't perfect in terms of balance and nor is the Gilbert
cell mixers that Erik is using, so milage may vary, but one should
look at multiple aspects. Alteration of operating points, alteration
of dielectric with temperature etc. is things to be aware of and
then try to figure out which is the major driver for your setup and
measurement needs and aims.
I am sure someone have attempted to temperature stabilize a mixer at
some time.
When building synths for music, we end up temperature compensating
the expo-converters or even ovenize them to achieve needed
stability. That is not far from what a mixer does. Also, it is what
got me into this time and frequency thing in the first place.
Cheers,
Magnus
On 2022-11-14 17:37, Attila Kinali via time-nuts wrote:
During the testing of a DMTD there appears to be a "large"
sensitivity
to temperature variations.
Opening a door in the room with the DMTD causes changes in the phase
difference in the order of 1 ps
Blowing cold air over the encased DMTD causes phase variations up
to 10 ps.
I would like to add a few things that have not been mentioned already:
Most electronics seem to have a tempco of 1-10ps/K. It is not clear
where this tempco comes from, i.e. nobody fully explained it. It
is remarkable, though, that the range is pretty narrow and quite
stable over various technologies. Of course, analog filters have
a larger variation of tempco.
My guess (read: totally unscientific assumption, not backed by
any data or experiments) is that a major source of tempco are
mechanical stresses due to different linear expansion coefficients.
How exactly mechanical stresses affect delay in electronics is
not quite as simple as it would seem at a first glance. So it's
difficult to come up with a decent model that can be tested in
experiments.
Summa summarum: The few-ps tempco you are seeing is what I would
expect. See also [1] where they measured the tempco of a mixer
setup (the numbers boiled down to 1-2ps/K IIRC) and proposed
a way how to measure and compensate the drift.
I also recommend having a look at [2] for a more general treatment
of the issue of temperature coefficients in time/frequency measurement
systems.
On Mon, 24 Oct 2022 14:43:43 +0200
Erik Kaashoek via time-nuts time-nuts@lists.febo.com wrote:
The PTFE cables have been replaced with semi-rigid coax cables and
the
stability, both mechanical and temperature, have improved.
Please keep in mind that the problem with PTFE is not the external
insulation of the coax cables, but the dielectric between the core
and the screen. A lot of semi-rigid still uses PTFE because it's
reasonably cheap and gives good performance. See [3-5] for more
information on this topic.
On Mon, 24 Oct 2022 10:10:27 +0200
Carsten Andrich via time-nuts time-nuts@lists.febo.com wrote:
only the ADC clock should matter and the used ADC should be of the
simultaneous sampling type. If it's not, its multiplexer may have a
detrimental temperature-dependent effect on the phase measurement.
It's a bit more complicated than that, unfortunately.
The mixer and their LO already add already some temperature dependence
due to inevitable asymmetries. The ADC themselves have a tempco too.
And it's not just direct temperature effect on the circuitry but also
indirect effect from power supplies. Even if using a dual-channel ADC
there are effects that affect the two channels differently. If you
look
at Sherman and Jördens' paper [6], who looked at phase stability in
SDR
systems for frequency / stability measurements, then you see that
there
is a lower limit of a few 10's of fs in ADC sample timing. My guess is
that at least some of that is due to noise on the power grid in the
chip that causes IR drop [7]. Which is, by its nature, not symmetric.
It is also very likely that even small mechanical stresses due to
minute
temperature variations at short time scales already cause timing
differences
and phase shifts in the 10s of fs.
Figuring out where all these small temperature coefficients come from
is difficult, to say the least, and very tedious. Once you reach
<10ps/K
I would, personally, call it a day and do the rest by proper enclosure
design and keeping everything at a stable temperature. This way it is
easier to reduce the tempco than to hunt for it in the electronics.
Attila Kinali
[1] "2π Low Drift Phase Detector for High-Precision Measurements"
by Jablonski, Czuba, Ludwik and Schlarb, 2015
https://doi.org/10.1109/TNS.2015.2425733
[2] "Environmental Effects in Mixers and Frequency Distribution
Systems",
by Nelson and Walls, 1992
[3] "Current Innovations In Phase Stable Coaxial Cable Design",
by Times Microwave Systems
https://www.timesmicrowave.com/downloads/tech/phasearticle.pdf
[4] "Understanding Phase Versus Temperature Behavior",
by Micro-coax
http://www.micro-coax.com/wp-content/themes/micro_coax/includes/pdf/applications_notes/13-MIC-0012.Phase_vs_Temp_Behavior_FINAL.pdf
[5] "Temperature Stability of Coaxial Cables",
by Czuba and Sikora, 2011
http://przyrbwn.icm.edu.pl/APP/PDF/119/a119z4p17.pdf
[6] "Oscillator metrology with software defined radio",
by Jeff A. Sherman and Robert Jördens, 2016
http://dx.doi.org/10.1063/1.4950898
[7]
https://semiengineering.com/knowledge_centers/low-power/architectural-power-issues/ir-drop/
Magnus, Attila,
I went ahead and did a fairly simple implementation of the side channel.
Both channels show, apart from the noise, the same phase drift in the
order of some ps. This seems to confirm the drift originates in the
mixers. Now I need a 3 channel DSS to test this. Maybe I can use the
10MHz ref out as the 3rd channel. And I have to find a way to inject the
side channel without creating additional leakage between the two main
channels.
Erik.
On 16-11-2022 13:05, Magnus Danielson via time-nuts wrote:
> Erik,
>
> The side-channel to track the side-carrier can be made much simpler.
> You do not need to FFT it, but you can do a direct PLL lock setup in
> software and with that relate the clocks to each other. It consumes a
> few cycles per sample, but really not much.
>
> Cheers,
> Magnus
>
> On 2022-11-16 07:41, Erik Kaashoek via time-nuts wrote:
>> Magnus,
>> One of the articles referenced by Attila mentioned inserting a second
>> known calibration input signal into both channels with a frequency
>> offset big enough so it becomes invisible in the regular DSP phase
>> measurement channel but by adding a second DSP phase measurement
>> channel at the offset of the inserted signal they had a real-time
>> measurement of the drift and where able to compensate for it.
>> Its rather compute intensive and I'm not sure what the offset has to
>> be to become invisible but could you imagine this could work in a
>> rather limited HW?
>> Maybe I should test it by inserting a calibration signal and see the
>> impact, but I can not imagine the short "FFT length" I'm using to be
>> long enough to give 100dB or more suppression of the calibration signal.
>>
>> Erik.
>>
>>
>> On 15-11-2022 22:59, Magnus Danielson via time-nuts wrote:
>>> Hi,
>>>
>>> Somewhere in the NIST T&F archive, there is reference to how mixers
>>> cause a reflection of energy and temperature coefficients then
>>> change phase and working-point. They use 3 dB damper on the mixer to
>>> stabilize that and reduce the tempco situation. The signal
>>> degradation is compensated for but improvement in stability
>>> significant. As I recall it, they refer to the cable phase stability
>>> with regard to temperature to be part of the culprit.
>>>
>>> Now, DBM isn't perfect in terms of balance and nor is the Gilbert
>>> cell mixers that Erik is using, so milage may vary, but one should
>>> look at multiple aspects. Alteration of operating points, alteration
>>> of dielectric with temperature etc. is things to be aware of and
>>> then try to figure out which is the major driver for your setup and
>>> measurement needs and aims.
>>>
>>> I am sure someone have attempted to temperature stabilize a mixer at
>>> some time.
>>>
>>> When building synths for music, we end up temperature compensating
>>> the expo-converters or even ovenize them to achieve needed
>>> stability. That is not far from what a mixer does. Also, it is what
>>> got me into this time and frequency thing in the first place.
>>>
>>> Cheers,
>>> Magnus
>>>
>>> On 2022-11-14 17:37, Attila Kinali via time-nuts wrote:
>>>> Good afternoon,
>>>>
>>>> On Sun, 23 Oct 2022 18:05:40 +0200
>>>> Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote:
>>>>
>>>>> During the testing of a DMTD there appears to be a "large"
>>>>> sensitivity
>>>>> to temperature variations.
>>>>> Opening a door in the room with the DMTD causes changes in the phase
>>>>> difference in the order of 1 ps
>>>>> Blowing cold air over the encased DMTD causes phase variations up
>>>>> to 10 ps.
>>>> I would like to add a few things that have not been mentioned already:
>>>>
>>>> Most electronics seem to have a tempco of 1-10ps/K. It is not clear
>>>> where this tempco comes from, i.e. nobody fully explained it. It
>>>> is remarkable, though, that the range is pretty narrow and quite
>>>> stable over various technologies. Of course, analog filters have
>>>> a larger variation of tempco.
>>>>
>>>> My guess (read: totally unscientific assumption, not backed by
>>>> any data or experiments) is that a major source of tempco are
>>>> mechanical stresses due to different linear expansion coefficients.
>>>> How exactly mechanical stresses affect delay in electronics is
>>>> not quite as simple as it would seem at a first glance. So it's
>>>> difficult to come up with a decent model that can be tested in
>>>> experiments.
>>>>
>>>> Summa summarum: The few-ps tempco you are seeing is what I would
>>>> expect. See also [1] where they measured the tempco of a mixer
>>>> setup (the numbers boiled down to 1-2ps/K IIRC) and proposed
>>>> a way how to measure and compensate the drift.
>>>>
>>>> I also recommend having a look at [2] for a more general treatment
>>>> of the issue of temperature coefficients in time/frequency measurement
>>>> systems.
>>>>
>>>> On Mon, 24 Oct 2022 14:43:43 +0200
>>>> Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote:
>>>>
>>>>> The PTFE cables have been replaced with semi-rigid coax cables and
>>>>> the
>>>>> stability, both mechanical and temperature, have improved.
>>>> Please keep in mind that the problem with PTFE is not the external
>>>> insulation of the coax cables, but the dielectric between the core
>>>> and the screen. A lot of semi-rigid still uses PTFE because it's
>>>> reasonably cheap and gives good performance. See [3-5] for more
>>>> information on this topic.
>>>>
>>>> On Mon, 24 Oct 2022 10:10:27 +0200
>>>> Carsten Andrich via time-nuts <time-nuts@lists.febo.com> wrote:
>>>>
>>>>> only the ADC clock should matter and the used ADC should be of the
>>>>> simultaneous sampling type. If it's not, its multiplexer may have a
>>>>> detrimental temperature-dependent effect on the phase measurement.
>>>> It's a bit more complicated than that, unfortunately.
>>>> The mixer and their LO already add already some temperature dependence
>>>> due to inevitable asymmetries. The ADC themselves have a tempco too.
>>>> And it's not just direct temperature effect on the circuitry but also
>>>> indirect effect from power supplies. Even if using a dual-channel ADC
>>>> there are effects that affect the two channels differently. If you
>>>> look
>>>> at Sherman and Jördens' paper [6], who looked at phase stability in
>>>> SDR
>>>> systems for frequency / stability measurements, then you see that
>>>> there
>>>> is a lower limit of a few 10's of fs in ADC sample timing. My guess is
>>>> that at least some of that is due to noise on the power grid in the
>>>> chip that causes IR drop [7]. Which is, by its nature, not symmetric.
>>>> It is also very likely that even small mechanical stresses due to
>>>> minute
>>>> temperature variations at short time scales already cause timing
>>>> differences
>>>> and phase shifts in the 10s of fs.
>>>>
>>>> Figuring out where all these small temperature coefficients come from
>>>> is difficult, to say the least, and very tedious. Once you reach
>>>> <10ps/K
>>>> I would, personally, call it a day and do the rest by proper enclosure
>>>> design and keeping everything at a stable temperature. This way it is
>>>> easier to reduce the tempco than to hunt for it in the electronics.
>>>>
>>>> Attila Kinali
>>>>
>>>>
>>>> [1] "2π Low Drift Phase Detector for High-Precision Measurements"
>>>> by Jablonski, Czuba, Ludwik and Schlarb, 2015
>>>> https://doi.org/10.1109/TNS.2015.2425733
>>>>
>>>> [2] "Environmental Effects in Mixers and Frequency Distribution
>>>> Systems",
>>>> by Nelson and Walls, 1992
>>>>
>>>> [3] "Current Innovations In Phase Stable Coaxial Cable Design",
>>>> by Times Microwave Systems
>>>> https://www.timesmicrowave.com/downloads/tech/phasearticle.pdf
>>>>
>>>> [4] "Understanding Phase Versus Temperature Behavior",
>>>> by Micro-coax
>>>> http://www.micro-coax.com/wp-content/themes/micro_coax/includes/pdf/applications_notes/13-MIC-0012.Phase_vs_Temp_Behavior_FINAL.pdf
>>>>
>>>>
>>>> [5] "Temperature Stability of Coaxial Cables",
>>>> by Czuba and Sikora, 2011
>>>> http://przyrbwn.icm.edu.pl/APP/PDF/119/a119z4p17.pdf
>>>>
>>>> [6] "Oscillator metrology with software defined radio",
>>>> by Jeff A. Sherman and Robert Jördens, 2016
>>>> http://dx.doi.org/10.1063/1.4950898
>>>>
>>>> [7]
>>>> https://semiengineering.com/knowledge_centers/low-power/architectural-power-issues/ir-drop/
>>>>
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AK
Attila Kinali
Tue, Nov 22, 2022 10:37 AM
As often with your advice, I'm not smart enough to understand.
The digital down mixing to zero Hz is done with I/Q mixers where sin/cos
of the internal LO is multiplied with the input signals and then average
over some samples to get I and Q of the signal vector as the output
frequency is zero Hz.
Exactly. Going to zero Hz means that the LO frequency is the same as the
RF frequency. Which means the (complex) output gives you a vector that points
into the direction of the phase difference between the RF and LO signal.
I would expect I would need a separate set of I/Q mixers for the side
channel and by summing over many samples the noise would be reduced
sufficiently to get a relevant I and Q signal even if the side channel
has 40dB lower amplitude.
Yes. You are looking for changes due to temperature fluctuation, which are slow.
A time constant in the milli-second range is sufficient.
I may have used the word FFT to describe the
operation of the I/Q mixers as computationally they look a lot like a
single bucket FFT
Yes, there are many ways how to implement an FFT in hardware. One of them
is using narrow band filters made out of (damped) oscillator structures.
And that is, in its working principle, quite close to what the down-mixing
approach does.
On Wed, 16 Nov 2022 18:28:33 +0100
Erik Kaashoek via time-nuts time-nuts@lists.febo.com wrote:
I went ahead and did a fairly simple implementation of the side channel.
Both channels show, apart from the noise, the same phase drift in the
order of some ps.
So you got a result that is close to what we expected to see.
This seems to confirm the drift originates in the mixers.
Be careful with this conclusion. The drift can originate anywhere
where the signals travel different paths. It could be equally well the
clock of your two ADCs that's the culprit, because they too take different
paths after the splitter. Figuring out which part is the dominant source
of delay takes a lot of care and experimental skill.
Now I need a 3 channel DSS to test this. Maybe I can use the
10MHz ref out as the 3rd channel. And I have to find a way to inject the
side channel without creating additional leakage between the two main
channels.
Be also careful with signals that are correlated to your clock or LO signals.
These can show higher or lower noise than the actually measured signals.
The injection needs to be done in a way that isolates the two paths. You can
either use some isolation amplifier that are closely matched, or start with
a strong signal and add some 30dB damping in the two paths after the splitter.
Attila Kinali
--
In science if you know what you are doing you should not be doing it.
In engineering if you do not know what you are doing you should not be doing it.
-- Richard W. Hamming, The Art of Doing Science and Engineering
Moi Erik,
On Wed, 16 Nov 2022 16:57:59 +0100
Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote:
> As often with your advice, I'm not smart enough to understand.
> The digital down mixing to zero Hz is done with I/Q mixers where sin/cos
> of the internal LO is multiplied with the input signals and then average
> over some samples to get I and Q of the signal vector as the output
> frequency is zero Hz.
Exactly. Going to zero Hz means that the LO frequency is the same as the
RF frequency. Which means the (complex) output gives you a vector that points
into the direction of the phase difference between the RF and LO signal.
> I would expect I would need a separate set of I/Q mixers for the side
> channel and by summing over many samples the noise would be reduced
> sufficiently to get a relevant I and Q signal even if the side channel
> has 40dB lower amplitude.
Yes. You are looking for changes due to temperature fluctuation, which are slow.
A time constant in the milli-second range is sufficient.
> I may have used the word FFT to describe the
> operation of the I/Q mixers as computationally they look a lot like a
> single bucket FFT
Yes, there are many ways how to implement an FFT in hardware. One of them
is using narrow band filters made out of (damped) oscillator structures.
And that is, in its working principle, quite close to what the down-mixing
approach does.
On Wed, 16 Nov 2022 18:28:33 +0100
Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote:
> I went ahead and did a fairly simple implementation of the side channel.
> Both channels show, apart from the noise, the same phase drift in the
> order of some ps.
So you got a result that is close to what we expected to see.
> This seems to confirm the drift originates in the mixers.
Be careful with this conclusion. The drift can originate anywhere
where the signals travel different paths. It could be equally well the
clock of your two ADCs that's the culprit, because they too take different
paths after the splitter. Figuring out which part is the dominant source
of delay takes a lot of care and experimental skill.
> Now I need a 3 channel DSS to test this. Maybe I can use the
> 10MHz ref out as the 3rd channel. And I have to find a way to inject the
> side channel without creating additional leakage between the two main
> channels.
Be also careful with signals that are correlated to your clock or LO signals.
These can show higher or lower noise than the actually measured signals.
The injection needs to be done in a way that isolates the two paths. You can
either use some isolation amplifier that are closely matched, or start with
a strong signal and add some 30dB damping in the two paths after the splitter.
Attila Kinali
--
In science if you know what you are doing you should not be doing it.
In engineering if you do not know what you are doing you should not be doing it.
-- Richard W. Hamming, The Art of Doing Science and Engineering
EK
Erik Kaashoek
Tue, Nov 22, 2022 12:28 PM
Hi Attilla
I checked the source of the temperature drift with some cold air. The
ADC is not sensitive, the mixers are.
The side channel based phase stabilization is working well. Kurt
Paulson did some 24 hours tests
With some degrees temperature difference over a 24 hour period the ADEV
floor hits 2e-17 at 10000 s and the ADEV follows 1/Tau till 1e-16 from
1e-13 @ 1s
Here is the resulting ADEV floor:
http://athome.kaashoek.com/time-nuts/DMTD/ADEV_floor.png
Blue is some degrees temperature variation, pink with very stable
temperature
And here is the phase deviation over the same period:
http://athome.kaashoek.com/time-nuts/DMTD/ADEV_floor_phase.png
Much more testing using real use cases is needed before I dare to rely
on these results.
We have started a separate email group to discuss the DMTD to avoid too
much traffic on the time-nuts mailing list, some more testers are
expected to join soon.
If you are interested , let me know and I will send you an invite.
Erik.
On 22-11-2022 11:37, Attila Kinali via time-nuts wrote:
As often with your advice, I'm not smart enough to understand.
The digital down mixing to zero Hz is done with I/Q mixers where sin/cos
of the internal LO is multiplied with the input signals and then average
over some samples to get I and Q of the signal vector as the output
frequency is zero Hz.
Exactly. Going to zero Hz means that the LO frequency is the same as the
RF frequency. Which means the (complex) output gives you a vector that points
into the direction of the phase difference between the RF and LO signal.
I would expect I would need a separate set of I/Q mixers for the side
channel and by summing over many samples the noise would be reduced
sufficiently to get a relevant I and Q signal even if the side channel
has 40dB lower amplitude.
Yes. You are looking for changes due to temperature fluctuation, which are slow.
A time constant in the milli-second range is sufficient.
I may have used the word FFT to describe the
operation of the I/Q mixers as computationally they look a lot like a
single bucket FFT
Yes, there are many ways how to implement an FFT in hardware. One of them
is using narrow band filters made out of (damped) oscillator structures.
And that is, in its working principle, quite close to what the down-mixing
approach does.
On Wed, 16 Nov 2022 18:28:33 +0100
Erik Kaashoek via time-nuts time-nuts@lists.febo.com wrote:
I went ahead and did a fairly simple implementation of the side channel.
Both channels show, apart from the noise, the same phase drift in the
order of some ps.
So you got a result that is close to what we expected to see.
This seems to confirm the drift originates in the mixers.
Be careful with this conclusion. The drift can originate anywhere
where the signals travel different paths. It could be equally well the
clock of your two ADCs that's the culprit, because they too take different
paths after the splitter. Figuring out which part is the dominant source
of delay takes a lot of care and experimental skill.
Now I need a 3 channel DSS to test this. Maybe I can use the
10MHz ref out as the 3rd channel. And I have to find a way to inject the
side channel without creating additional leakage between the two main
channels.
Be also careful with signals that are correlated to your clock or LO signals.
These can show higher or lower noise than the actually measured signals.
The injection needs to be done in a way that isolates the two paths. You can
either use some isolation amplifier that are closely matched, or start with
a strong signal and add some 30dB damping in the two paths after the splitter.
Attila Kinali
Hi Attilla
I checked the source of the temperature drift with some cold air. The
ADC is not sensitive, the mixers are.
The side channel based phase stabilization is working well. Kurt
Paulson did some 24 hours tests
With some degrees temperature difference over a 24 hour period the ADEV
floor hits 2e-17 at 10000 s and the ADEV follows 1/Tau till 1e-16 from
1e-13 @ 1s
Here is the resulting ADEV floor:
http://athome.kaashoek.com/time-nuts/DMTD/ADEV_floor.png
Blue is some degrees temperature variation, pink with very stable
temperature
And here is the phase deviation over the same period:
http://athome.kaashoek.com/time-nuts/DMTD/ADEV_floor_phase.png
Much more testing using real use cases is needed before I dare to rely
on these results.
We have started a separate email group to discuss the DMTD to avoid too
much traffic on the time-nuts mailing list, some more testers are
expected to join soon.
If you are interested , let me know and I will send you an invite.
Erik.
On 22-11-2022 11:37, Attila Kinali via time-nuts wrote:
> Moi Erik,
>
> On Wed, 16 Nov 2022 16:57:59 +0100
> Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote:
>
>> As often with your advice, I'm not smart enough to understand.
>> The digital down mixing to zero Hz is done with I/Q mixers where sin/cos
>> of the internal LO is multiplied with the input signals and then average
>> over some samples to get I and Q of the signal vector as the output
>> frequency is zero Hz.
> Exactly. Going to zero Hz means that the LO frequency is the same as the
> RF frequency. Which means the (complex) output gives you a vector that points
> into the direction of the phase difference between the RF and LO signal.
>
>> I would expect I would need a separate set of I/Q mixers for the side
>> channel and by summing over many samples the noise would be reduced
>> sufficiently to get a relevant I and Q signal even if the side channel
>> has 40dB lower amplitude.
> Yes. You are looking for changes due to temperature fluctuation, which are slow.
> A time constant in the milli-second range is sufficient.
>
>> I may have used the word FFT to describe the
>> operation of the I/Q mixers as computationally they look a lot like a
>> single bucket FFT
> Yes, there are many ways how to implement an FFT in hardware. One of them
> is using narrow band filters made out of (damped) oscillator structures.
> And that is, in its working principle, quite close to what the down-mixing
> approach does.
>
> On Wed, 16 Nov 2022 18:28:33 +0100
> Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote:
>
>> I went ahead and did a fairly simple implementation of the side channel.
>> Both channels show, apart from the noise, the same phase drift in the
>> order of some ps.
> So you got a result that is close to what we expected to see.
>
>> This seems to confirm the drift originates in the mixers.
> Be careful with this conclusion. The drift can originate anywhere
> where the signals travel different paths. It could be equally well the
> clock of your two ADCs that's the culprit, because they too take different
> paths after the splitter. Figuring out which part is the dominant source
> of delay takes a lot of care and experimental skill.
>
>
>> Now I need a 3 channel DSS to test this. Maybe I can use the
>> 10MHz ref out as the 3rd channel. And I have to find a way to inject the
>> side channel without creating additional leakage between the two main
>> channels.
> Be also careful with signals that are correlated to your clock or LO signals.
> These can show higher or lower noise than the actually measured signals.
>
> The injection needs to be done in a way that isolates the two paths. You can
> either use some isolation amplifier that are closely matched, or start with
> a strong signal and add some 30dB damping in the two paths after the splitter.
>
> Attila Kinali
>
MD
Magnus Danielson
Tue, Nov 22, 2022 7:41 PM
Hi,
On 2022-11-22 11:37, Attila Kinali via time-nuts wrote:
As often with your advice, I'm not smart enough to understand.
The digital down mixing to zero Hz is done with I/Q mixers where sin/cos
of the internal LO is multiplied with the input signals and then average
over some samples to get I and Q of the signal vector as the output
frequency is zero Hz.
Exactly. Going to zero Hz means that the LO frequency is the same as the
RF frequency. Which means the (complex) output gives you a vector that points
into the direction of the phase difference between the RF and LO signal.
BTW. To be technically correct, use cos for I and sin for Q.
I would expect I would need a separate set of I/Q mixers for the side
channel and by summing over many samples the noise would be reduced
sufficiently to get a relevant I and Q signal even if the side channel
has 40dB lower amplitude.
Yes. You are looking for changes due to temperature fluctuation, which are slow.
A time constant in the milli-second range is sufficient.
I may have used the word FFT to describe the
operation of the I/Q mixers as computationally they look a lot like a
single bucket FFT
Yes, there are many ways how to implement an FFT in hardware. One of them
is using narrow band filters made out of (damped) oscillator structures.
And that is, in its working principle, quite close to what the down-mixing
approach does.
DFT is the single-bin method. It's essentially just mixing down the
frequency to DC and integrate over all the products. As you have
multiple frequency bins, that's when the combined method for Fast
Fourier Transform can reduce computational processing. Single-bin is
just a Discrete Fourier Transform. However, you rarely talk about a
single-bin DFT as being a DFT, it's just an I/Q-lock.
Cheers,
Magnus
On Wed, 16 Nov 2022 18:28:33 +0100
Erik Kaashoek via time-nuts time-nuts@lists.febo.com wrote:
I went ahead and did a fairly simple implementation of the side channel.
Both channels show, apart from the noise, the same phase drift in the
order of some ps.
So you got a result that is close to what we expected to see.
This seems to confirm the drift originates in the mixers.
Be careful with this conclusion. The drift can originate anywhere
where the signals travel different paths. It could be equally well the
clock of your two ADCs that's the culprit, because they too take different
paths after the splitter. Figuring out which part is the dominant source
of delay takes a lot of care and experimental skill.
Now I need a 3 channel DSS to test this. Maybe I can use the
10MHz ref out as the 3rd channel. And I have to find a way to inject the
side channel without creating additional leakage between the two main
channels.
Be also careful with signals that are correlated to your clock or LO signals.
These can show higher or lower noise than the actually measured signals.
The injection needs to be done in a way that isolates the two paths. You can
either use some isolation amplifier that are closely matched, or start with
a strong signal and add some 30dB damping in the two paths after the splitter.
Attila Kinali
Hi,
On 2022-11-22 11:37, Attila Kinali via time-nuts wrote:
> Moi Erik,
>
> On Wed, 16 Nov 2022 16:57:59 +0100
> Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote:
>
>> As often with your advice, I'm not smart enough to understand.
>> The digital down mixing to zero Hz is done with I/Q mixers where sin/cos
>> of the internal LO is multiplied with the input signals and then average
>> over some samples to get I and Q of the signal vector as the output
>> frequency is zero Hz.
> Exactly. Going to zero Hz means that the LO frequency is the same as the
> RF frequency. Which means the (complex) output gives you a vector that points
> into the direction of the phase difference between the RF and LO signal.
>
BTW. To be technically correct, use cos for I and sin for Q.
>> I would expect I would need a separate set of I/Q mixers for the side
>> channel and by summing over many samples the noise would be reduced
>> sufficiently to get a relevant I and Q signal even if the side channel
>> has 40dB lower amplitude.
> Yes. You are looking for changes due to temperature fluctuation, which are slow.
> A time constant in the milli-second range is sufficient.
>
>> I may have used the word FFT to describe the
>> operation of the I/Q mixers as computationally they look a lot like a
>> single bucket FFT
> Yes, there are many ways how to implement an FFT in hardware. One of them
> is using narrow band filters made out of (damped) oscillator structures.
> And that is, in its working principle, quite close to what the down-mixing
> approach does.
DFT is the single-bin method. It's essentially just mixing down the
frequency to DC and integrate over all the products. As you have
multiple frequency bins, that's when the combined method for Fast
Fourier Transform can reduce computational processing. Single-bin is
just a Discrete Fourier Transform. However, you rarely talk about a
single-bin DFT as being a DFT, it's just an I/Q-lock.
Cheers,
Magnus
>
> On Wed, 16 Nov 2022 18:28:33 +0100
> Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote:
>
>> I went ahead and did a fairly simple implementation of the side channel.
>> Both channels show, apart from the noise, the same phase drift in the
>> order of some ps.
> So you got a result that is close to what we expected to see.
>
>> This seems to confirm the drift originates in the mixers.
> Be careful with this conclusion. The drift can originate anywhere
> where the signals travel different paths. It could be equally well the
> clock of your two ADCs that's the culprit, because they too take different
> paths after the splitter. Figuring out which part is the dominant source
> of delay takes a lot of care and experimental skill.
>
>
>> Now I need a 3 channel DSS to test this. Maybe I can use the
>> 10MHz ref out as the 3rd channel. And I have to find a way to inject the
>> side channel without creating additional leakage between the two main
>> channels.
> Be also careful with signals that are correlated to your clock or LO signals.
> These can show higher or lower noise than the actually measured signals.
>
> The injection needs to be done in a way that isolates the two paths. You can
> either use some isolation amplifier that are closely matched, or start with
> a strong signal and add some 30dB damping in the two paths after the splitter.
>
> Attila Kinali
>