LS
life speed
Thu, Feb 11, 2010 3:03 AM
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
Clay (AKA Lifespeed)
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
Clay (AKA Lifespeed)
BC
Bob Camp
Thu, Feb 11, 2010 3:10 AM
Hi
Is your OCXO vibration isolated?
If not and it's got "typical" g sensitivity, your phase noise in an aircraft
may be much worse than the static numbers.
If you are sending the signal a distance to your systems, a balanced feed
may be the only way you will deliver a clean signal at the far end.
Bob
From: "life speed" life_speed@yahoo.com
Sent: Wednesday, February 10, 2010 10:03 PM
To: time-nuts@febo.com
Subject: Re: [time-nuts] Advice on 10 MHz isolation/distribution amplifier
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO
crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz
at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or
cesium clock, living in the world of practical realities here. Of course
I would like to be 3 - 6 dB better than the OCXO numbers.
Reverse isolation is my primary interest in the distribution amplifier
approach, although the OCXO is good enough that a sloppy approach could
contaminate the phase noise also. I would like to accomplish at least 100
dB reverse isolation at frequencies below 20 MHz, but more is better in
this case. The 10 MHz is running all over a noisy aircraft, to
potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain is
the bane of close-in phase noise. Given that flicker noise is such a
headache for we frequency synthesizer designers, I guess this should come
as no surprise.
Clay (AKA Lifespeed)
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Hi
Is your OCXO vibration isolated?
If not and it's got "typical" g sensitivity, your phase noise in an aircraft
may be much worse than the static numbers.
If you are sending the signal a distance to your systems, a balanced feed
may be the only way you will deliver a clean signal at the far end.
Bob
--------------------------------------------------
From: "life speed" <life_speed@yahoo.com>
Sent: Wednesday, February 10, 2010 10:03 PM
To: <time-nuts@febo.com>
Subject: Re: [time-nuts] Advice on 10 MHz isolation/distribution amplifier
> Avoiding transformers and inductors will make it virtually impossible to
> achieve very low phase noise as the dc gain from say the base of any
> transistor in the chain to the output will degrade the flicker phase
> noise. Using transformers or using an inductor to shunt any collector
> resistors reduces the flicker phase modulation to low levels.
>
> JPL in the past has built capacitively coupled complementary symmetry
> isolation amplifiers that avoid transformers but suffer from dc loop
> gains of around 3 or so.
>
> Using complementary symmetry can be a good way of keeping the dc current
> down.
>
> How much reverse isolation do you need?
> How low does the phase noise floor need to be?
> What about flicker phase noise, how low does that need to be?
>
> Bruce
>
> Right, what do I really need? I only have a really good 10 MHz OCXO
> crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz
> at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or
> cesium clock, living in the world of practical realities here. Of course
> I would like to be 3 - 6 dB better than the OCXO numbers.
>
> Reverse isolation is my primary interest in the distribution amplifier
> approach, although the OCXO is good enough that a sloppy approach could
> contaminate the phase noise also. I would like to accomplish at least 100
> dB reverse isolation at frequencies below 20 MHz, but more is better in
> this case. The 10 MHz is running all over a noisy aircraft, to
> potentially noisy receivers.
>
> In reading up on the subject, I have come to understand that DC gain is
> the bane of close-in phase noise. Given that flicker noise is such a
> headache for we frequency synthesizer designers, I guess this should come
> as no surprise.
>
> Clay (AKA Lifespeed)
>
>
>
>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>
>
BG
Bruce Griffiths
Thu, Feb 11, 2010 3:36 AM
Clay
You could try something like the attached circuit schematic.
Austron used buffer amplifiers like this albeit without the
complementary symmetry output stage.
There are no transformers and the dc gain is low.
Simulated reverse isolation at 10MHz is around 120dB.
Simulated crosstalk between the 2 outputs is around -100dB at 10MHz.
The transistor models used usually predict reverse isolation reasonably
accurately at 10MHz.
The phase noise floor should be around -170dBc/Hz or less at 100kHz offset.
V1 is the input signal.
The 50 ohm sources V6, V7 shown at the outputs are used for simulation
purposes (reverse isolation and crosstalk).
Off course, more elaborate power supply decoupling will be necessary to
avoid degrading reverse isolation and crosstalk.
If you are really desperate to reduce the dc current the output
transistors could be operated in class B.
However the distortion will increase a little.
Bruce
life speed wrote:
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
Clay (AKA Lifespeed)
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Clay
You could try something like the attached circuit schematic.
Austron used buffer amplifiers like this albeit without the
complementary symmetry output stage.
There are no transformers and the dc gain is low.
Simulated reverse isolation at 10MHz is around 120dB.
Simulated crosstalk between the 2 outputs is around -100dB at 10MHz.
The transistor models used usually predict reverse isolation reasonably
accurately at 10MHz.
The phase noise floor should be around -170dBc/Hz or less at 100kHz offset.
V1 is the input signal.
The 50 ohm sources V6, V7 shown at the outputs are used for simulation
purposes (reverse isolation and crosstalk).
Off course, more elaborate power supply decoupling will be necessary to
avoid degrading reverse isolation and crosstalk.
If you are really desperate to reduce the dc current the output
transistors could be operated in class B.
However the distortion will increase a little.
Bruce
life speed wrote:
> Avoiding transformers and inductors will make it virtually impossible to
> achieve very low phase noise as the dc gain from say the base of any
> transistor in the chain to the output will degrade the flicker phase
> noise. Using transformers or using an inductor to shunt any collector
> resistors reduces the flicker phase modulation to low levels.
>
> JPL in the past has built capacitively coupled complementary symmetry
> isolation amplifiers that avoid transformers but suffer from dc loop
> gains of around 3 or so.
>
> Using complementary symmetry can be a good way of keeping the dc current
> down.
>
> How much reverse isolation do you need?
> How low does the phase noise floor need to be?
> What about flicker phase noise, how low does that need to be?
>
> Bruce
>
> Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
>
> Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
>
> In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
>
> Clay (AKA Lifespeed)
>
>
>
>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>
>
BG
Bruce Griffiths
Thu, Feb 11, 2010 4:14 AM
Clay
Circuit schematic for one of the JPL isolation amplifiers is attached.
Unfortunately (apart from the few I and others may have) these
transistors are difficult to obtain.
However modern equivalents could be substituted.
Bruce
life speed wrote:
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
Clay (AKA Lifespeed)
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Clay
Circuit schematic for one of the JPL isolation amplifiers is attached.
Unfortunately (apart from the few I and others may have) these
transistors are difficult to obtain.
However modern equivalents could be substituted.
Bruce
life speed wrote:
> Avoiding transformers and inductors will make it virtually impossible to
> achieve very low phase noise as the dc gain from say the base of any
> transistor in the chain to the output will degrade the flicker phase
> noise. Using transformers or using an inductor to shunt any collector
> resistors reduces the flicker phase modulation to low levels.
>
> JPL in the past has built capacitively coupled complementary symmetry
> isolation amplifiers that avoid transformers but suffer from dc loop
> gains of around 3 or so.
>
> Using complementary symmetry can be a good way of keeping the dc current
> down.
>
> How much reverse isolation do you need?
> How low does the phase noise floor need to be?
> What about flicker phase noise, how low does that need to be?
>
> Bruce
>
> Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
>
> Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
>
> In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
>
> Clay (AKA Lifespeed)
>
>
>
>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>
>
BG
Bruce Griffiths
Thu, Feb 11, 2010 4:30 AM
Clay
Circuit schematic for a more recent JPL isolation amplifier design is
attached.
Bruce
life speed wrote:
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
Clay (AKA Lifespeed)
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Clay
Circuit schematic for a more recent JPL isolation amplifier design is
attached.
Bruce
life speed wrote:
> Avoiding transformers and inductors will make it virtually impossible to
> achieve very low phase noise as the dc gain from say the base of any
> transistor in the chain to the output will degrade the flicker phase
> noise. Using transformers or using an inductor to shunt any collector
> resistors reduces the flicker phase modulation to low levels.
>
> JPL in the past has built capacitively coupled complementary symmetry
> isolation amplifiers that avoid transformers but suffer from dc loop
> gains of around 3 or so.
>
> Using complementary symmetry can be a good way of keeping the dc current
> down.
>
> How much reverse isolation do you need?
> How low does the phase noise floor need to be?
> What about flicker phase noise, how low does that need to be?
>
> Bruce
>
> Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
>
> Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
>
> In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
>
> Clay (AKA Lifespeed)
>
>
>
>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>
>
BG
Bruce Griffiths
Thu, Feb 11, 2010 4:57 AM
Attn: John Ackermann
Not sure what happened to produce 2 identical posts but as far as I can
tell I only posted this once.
Bruce
Bruce Griffiths wrote:
Clay
Circuit schematic for a more recent JPL isolation amplifier design is
attached.
Bruce
Attn: John Ackermann
Not sure what happened to produce 2 identical posts but as far as I can
tell I only posted this once.
Bruce
Bruce Griffiths wrote:
> Clay
>
> Circuit schematic for a more recent JPL isolation amplifier design is
> attached.
>
> Bruce
>
BG
Bruce Griffiths
Thu, Feb 11, 2010 8:39 AM
Clay
If the first stage has a voltage gain of 2x then the total dc current
can be reduced as the output stages no longer need to drive the feedback
100 ohm resistor connected to ground at RF. The attached circuit
schematic also includes faster input transistors in each 3 transistor
feedback circuit to improve stability and increase the reverse isolation
slightly.
Bruce
Bruce Griffiths wrote:
Clay
You could try something like the attached circuit schematic.
Austron used buffer amplifiers like this albeit without the
complementary symmetry output stage.
There are no transformers and the dc gain is low.
Simulated reverse isolation at 10MHz is around 120dB.
Simulated crosstalk between the 2 outputs is around -100dB at 10MHz.
The transistor models used usually predict reverse isolation
reasonably accurately at 10MHz.
The phase noise floor should be around -170dBc/Hz or less at 100kHz
offset.
V1 is the input signal.
The 50 ohm sources V6, V7 shown at the outputs are used for
simulation purposes (reverse isolation and crosstalk).
Off course, more elaborate power supply decoupling will be necessary
to avoid degrading reverse isolation and crosstalk.
If you are really desperate to reduce the dc current the output
transistors could be operated in class B.
However the distortion will increase a little.
Bruce
life speed wrote:
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO
crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140
dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor.
No maser or cesium clock, living in the world of practical realities
here. Of course I would like to be 3 - 6 dB better than the OCXO
numbers.
Reverse isolation is my primary interest in the distribution
amplifier approach, although the OCXO is good enough that a sloppy
approach could contaminate the phase noise also. I would like to
accomplish at least 100 dB reverse isolation at frequencies below 20
MHz, but more is better in this case. The 10 MHz is running all over
a noisy aircraft, to potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain
is the bane of close-in phase noise. Given that flicker noise is
such a headache for we frequency synthesizer designers, I guess this
should come as no surprise.
Clay (AKA Lifespeed)
Clay
If the first stage has a voltage gain of 2x then the total dc current
can be reduced as the output stages no longer need to drive the feedback
100 ohm resistor connected to ground at RF. The attached circuit
schematic also includes faster input transistors in each 3 transistor
feedback circuit to improve stability and increase the reverse isolation
slightly.
Bruce
Bruce Griffiths wrote:
> Clay
>
> You could try something like the attached circuit schematic.
> Austron used buffer amplifiers like this albeit without the
> complementary symmetry output stage.
> There are no transformers and the dc gain is low.
> Simulated reverse isolation at 10MHz is around 120dB.
> Simulated crosstalk between the 2 outputs is around -100dB at 10MHz.
> The transistor models used usually predict reverse isolation
> reasonably accurately at 10MHz.
> The phase noise floor should be around -170dBc/Hz or less at 100kHz
> offset.
>
> V1 is the input signal.
>
> The 50 ohm sources V6, V7 shown at the outputs are used for
> simulation purposes (reverse isolation and crosstalk).
>
> Off course, more elaborate power supply decoupling will be necessary
> to avoid degrading reverse isolation and crosstalk.
>
> If you are really desperate to reduce the dc current the output
> transistors could be operated in class B.
> However the distortion will increase a little.
>
> Bruce
>
> life speed wrote:
>> Avoiding transformers and inductors will make it virtually impossible to
>> achieve very low phase noise as the dc gain from say the base of any
>> transistor in the chain to the output will degrade the flicker phase
>> noise. Using transformers or using an inductor to shunt any collector
>> resistors reduces the flicker phase modulation to low levels.
>>
>> JPL in the past has built capacitively coupled complementary symmetry
>> isolation amplifiers that avoid transformers but suffer from dc loop
>> gains of around 3 or so.
>>
>> Using complementary symmetry can be a good way of keeping the dc current
>> down.
>>
>> How much reverse isolation do you need?
>> How low does the phase noise floor need to be?
>> What about flicker phase noise, how low does that need to be?
>>
>> Bruce
>>
>> Right, what do I really need? I only have a really good 10 MHz OCXO
>> crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140
>> dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor.
>> No maser or cesium clock, living in the world of practical realities
>> here. Of course I would like to be 3 - 6 dB better than the OCXO
>> numbers.
>>
>> Reverse isolation is my primary interest in the distribution
>> amplifier approach, although the OCXO is good enough that a sloppy
>> approach could contaminate the phase noise also. I would like to
>> accomplish at least 100 dB reverse isolation at frequencies below 20
>> MHz, but more is better in this case. The 10 MHz is running all over
>> a noisy aircraft, to potentially noisy receivers.
>>
>> In reading up on the subject, I have come to understand that DC gain
>> is the bane of close-in phase noise. Given that flicker noise is
>> such a headache for we frequency synthesizer designers, I guess this
>> should come as no surprise.
>>
>> Clay (AKA Lifespeed)
BC
Bob Camp
Thu, Feb 11, 2010 12:54 PM
Hi
Implementing that circuit without using a hybrid would be a bit of a challenge.
Bob
On Feb 10, 2010, at 11:30 PM, Bruce Griffiths wrote:
Clay
Circuit schematic for a more recent JPL isolation amplifier design is attached.
Bruce
life speed wrote:
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
Clay (AKA Lifespeed)
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Hi
Implementing that circuit without using a hybrid would be a bit of a challenge.
Bob
On Feb 10, 2010, at 11:30 PM, Bruce Griffiths wrote:
> Clay
>
> Circuit schematic for a more recent JPL isolation amplifier design is attached.
>
> Bruce
>
> life speed wrote:
>> Avoiding transformers and inductors will make it virtually impossible to
>> achieve very low phase noise as the dc gain from say the base of any
>> transistor in the chain to the output will degrade the flicker phase
>> noise. Using transformers or using an inductor to shunt any collector
>> resistors reduces the flicker phase modulation to low levels.
>>
>> JPL in the past has built capacitively coupled complementary symmetry
>> isolation amplifiers that avoid transformers but suffer from dc loop
>> gains of around 3 or so.
>>
>> Using complementary symmetry can be a good way of keeping the dc current
>> down.
>>
>> How much reverse isolation do you need?
>> How low does the phase noise floor need to be?
>> What about flicker phase noise, how low does that need to be?
>>
>> Bruce
>>
>> Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
>>
>> Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
>>
>> In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
>>
>> Clay (AKA Lifespeed)
>>
>>
>>
>>
>> _______________________________________________
>> time-nuts mailing list -- time-nuts@febo.com
>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
>> and follow the instructions there.
>>
>>
>
> <JPL_Iso_Amp_2A.png>_______________________________________________
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BG
Bruce Griffiths
Thu, Feb 11, 2010 3:09 PM
Yes implementing an exact copy without using a hybrid would be difficult.
However for 10MHz use, its probably not too difficult since that
isolation amplifier is intended for a 100MHz signal and the requirement
is for 10MHz operation.
If the transistor ft's are reduced by a factor of 10 or so it shouldn't
be too much of a problem.
At 10MHz 2N3906 and 2N3904 transistors should suffice.
Bruce
Bob Camp wrote:
Hi
Implementing that circuit without using a hybrid would be a bit of a challenge.
Bob
On Feb 10, 2010, at 11:30 PM, Bruce Griffiths wrote:
Clay
Circuit schematic for a more recent JPL isolation amplifier design is attached.
Bruce
life speed wrote:
Avoiding transformers and inductors will make it virtually impossible to
achieve very low phase noise as the dc gain from say the base of any
transistor in the chain to the output will degrade the flicker phase
noise. Using transformers or using an inductor to shunt any collector
resistors reduces the flicker phase modulation to low levels.
JPL in the past has built capacitively coupled complementary symmetry
isolation amplifiers that avoid transformers but suffer from dc loop
gains of around 3 or so.
Using complementary symmetry can be a good way of keeping the dc current
down.
How much reverse isolation do you need?
How low does the phase noise floor need to be?
What about flicker phase noise, how low does that need to be?
Bruce
Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
Clay (AKA Lifespeed)
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
Yes implementing an exact copy without using a hybrid would be difficult.
However for 10MHz use, its probably not too difficult since that
isolation amplifier is intended for a 100MHz signal and the requirement
is for 10MHz operation.
If the transistor ft's are reduced by a factor of 10 or so it shouldn't
be too much of a problem.
At 10MHz 2N3906 and 2N3904 transistors should suffice.
Bruce
Bob Camp wrote:
> Hi
>
> Implementing that circuit without using a hybrid would be a bit of a challenge.
>
> Bob
>
>
> On Feb 10, 2010, at 11:30 PM, Bruce Griffiths wrote:
>
>
>> Clay
>>
>> Circuit schematic for a more recent JPL isolation amplifier design is attached.
>>
>> Bruce
>>
>> life speed wrote:
>>
>>> Avoiding transformers and inductors will make it virtually impossible to
>>> achieve very low phase noise as the dc gain from say the base of any
>>> transistor in the chain to the output will degrade the flicker phase
>>> noise. Using transformers or using an inductor to shunt any collector
>>> resistors reduces the flicker phase modulation to low levels.
>>>
>>> JPL in the past has built capacitively coupled complementary symmetry
>>> isolation amplifiers that avoid transformers but suffer from dc loop
>>> gains of around 3 or so.
>>>
>>> Using complementary symmetry can be a good way of keeping the dc current
>>> down.
>>>
>>> How much reverse isolation do you need?
>>> How low does the phase noise floor need to be?
>>> What about flicker phase noise, how low does that need to be?
>>>
>>> Bruce
>>>
>>> Right, what do I really need? I only have a really good 10 MHz OCXO crystal oscillator to distribute, so about -120 dBc at 10 Hz, -140 dBc/Hz at 100 Hz, - 150 dBc/Hz at 1KHz, and -155 dBc/Hz noise floor. No maser or cesium clock, living in the world of practical realities here. Of course I would like to be 3 - 6 dB better than the OCXO numbers.
>>>
>>> Reverse isolation is my primary interest in the distribution amplifier approach, although the OCXO is good enough that a sloppy approach could contaminate the phase noise also. I would like to accomplish at least 100 dB reverse isolation at frequencies below 20 MHz, but more is better in this case. The 10 MHz is running all over a noisy aircraft, to potentially noisy receivers.
>>>
>>> In reading up on the subject, I have come to understand that DC gain is the bane of close-in phase noise. Given that flicker noise is such a headache for we frequency synthesizer designers, I guess this should come as no surprise.
>>>
>>> Clay (AKA Lifespeed)
>>>
>>>
>>>
>>>
>>> _______________________________________________
>>> time-nuts mailing list -- time-nuts@febo.com
>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
>>> and follow the instructions there.
>>>
>>>
>>>
>> <JPL_Iso_Amp_2A.png>_______________________________________________
>> time-nuts mailing list -- time-nuts@febo.com
>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
>> and follow the instructions there.
>>
>
> _______________________________________________
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> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>
>
