Hello, I'm looking at the datasheet for the LMK04816 clock chip on the X300, to try and determine if I can lock to other frequencies besides 10MHz (either 80MHz or 100MHz). It looks like you need to either use the internal VCO or an external VCXO, and an input to the OSCin pin of the chip. From the source code online, it looks like your using an (internal?) VCO of 2400MHz when the device runs at a 200MHz rate. Can you tell me what frequency your running on the OSCin pins of the device? Thanks, Rob -- Robert A Palumbo palumr@gmail.com

Robert, The short answer is that yes, you can lock the master clock to other reference frequencies, and you can also choose a different master clock rate. You will, of course, need to provide that reference clock on the reference clock input SMA connector, since the onboard references are all 10 MHz. As you can tell from the datasheet on that part, the design is quite complex. Rather than have you choose individual settings for the chip, we allow you to choose clocking "scenarios". The scenarios currently in the code are: Reference clock = 10 MHz, RF clock = 200 MHz (both with and without zero-delay mode) Reference clock = 10 MHz, RF clock = 184.32 MHz (useful for LTE) Reference clock = 30.72 MHz, RF clock = 184.32 MHz (useful for LTE) with external reference Reference clock = 10 MHz, RF clock = 120 MHz If you need any others, let me know and we will add them. Alternative reference clock rates are quite easy to add. Matt On Wed, Feb 26, 2014 at 6:36 AM, Robert Palumbo <palumr@gmail.com> wrote: > Hello, > > I'm looking at the datasheet for the LMK04816 clock chip on the X300, to > try and determine if I can lock to other frequencies besides 10MHz (either > 80MHz or 100MHz). > > It looks like you need to either use the internal VCO or an external VCXO, > and an input to the OSCin pin of the chip. From the source code online, it > looks like your using an (internal?) VCO of 2400MHz when the device runs at > a 200MHz rate. Can you tell me what frequency your running on the OSCin > pins of the device? > > Thanks, > > Rob > > -- > Robert A Palumbo > palumr@gmail.com > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > >

Thanks for the info. Yes, the LMK04816 does seem a bit more complicated than the AD9510 on the N210 (which is what prompted my email). I'm trying to set it up to lock to a 100MHz reference input for a 200MHz system clock - we get better phase noise performance with a higher clock rate. I think that this would just change the PLL1_R_27 in the 10MHz/200MHz/Zero-Delay case from 5 to 50. But, it also looks like you can divide the input reference lock first (by 2, 4, or 8), so I'm not sure of the benefits of splitting up the divide. Rob On Wed, Feb 26, 2014 at 12:21 PM, Matt Ettus <matt@ettus.com> wrote: > > Robert, > > The short answer is that yes, you can lock the master clock to other > reference frequencies, and you can also choose a different master clock > rate. You will, of course, need to provide that reference clock on the > reference clock input SMA connector, since the onboard references are all > 10 MHz. > > As you can tell from the datasheet on that part, the design is quite > complex. Rather than have you choose individual settings for the chip, we > allow you to choose clocking "scenarios". The scenarios currently in the > code are: > > Reference clock = 10 MHz, RF clock = 200 MHz (both with and without > zero-delay mode) > Reference clock = 10 MHz, RF clock = 184.32 MHz (useful for LTE) > Reference clock = 30.72 MHz, RF clock = 184.32 MHz (useful for LTE) with > external reference > Reference clock = 10 MHz, RF clock = 120 MHz > > If you need any others, let me know and we will add them. Alternative > reference clock rates are quite easy to add. > > Matt > > > > On Wed, Feb 26, 2014 at 6:36 AM, Robert Palumbo <palumr@gmail.com> wrote: > >> Hello, >> >> I'm looking at the datasheet for the LMK04816 clock chip on the X300, to >> try and determine if I can lock to other frequencies besides 10MHz (either >> 80MHz or 100MHz). >> >> It looks like you need to either use the internal VCO or an external >> VCXO, and an input to the OSCin pin of the chip. From the source code >> online, it looks like your using an (internal?) VCO of 2400MHz when the >> device runs at a 200MHz rate. Can you tell me what frequency your running >> on the OSCin pins of the device? >> >> Thanks, >> >> Rob >> >> -- >> Robert A Palumbo >> palumr@gmail.com >> >> _______________________________________________ >> USRP-users mailing list >> USRP-users@lists.ettus.com >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >> >> > -- Robert A Palumbo palumr@gmail.com

Yes, in your case, changing PLL1_R_27 to 50 would give you what you want. Note this is unlikely to noticeably affect phase noise due to the dual-loop architecture. Because of the very high quality VCXO we use, input phase noise on the reference really doesn't degrade overall phase noise. Matt On Wed, Feb 26, 2014 at 12:36 PM, Robert Palumbo <palumr@gmail.com> wrote: > Thanks for the info. > > Yes, the LMK04816 does seem a bit more complicated than the AD9510 on the > N210 (which is what prompted my email). I'm trying to set it up to lock to > a 100MHz reference input for a 200MHz system clock - we get better phase > noise performance with a higher clock rate. I think that this would just > change the PLL1_R_27 in the 10MHz/200MHz/Zero-Delay case from 5 to 50. But, > it also looks like you can divide the input reference lock first (by 2, 4, > or 8), so I'm not sure of the benefits of splitting up the divide. > > Rob > > > On Wed, Feb 26, 2014 at 12:21 PM, Matt Ettus <matt@ettus.com> wrote: > >> >> Robert, >> >> The short answer is that yes, you can lock the master clock to other >> reference frequencies, and you can also choose a different master clock >> rate. You will, of course, need to provide that reference clock on the >> reference clock input SMA connector, since the onboard references are all >> 10 MHz. >> >> As you can tell from the datasheet on that part, the design is quite >> complex. Rather than have you choose individual settings for the chip, we >> allow you to choose clocking "scenarios". The scenarios currently in the >> code are: >> >> Reference clock = 10 MHz, RF clock = 200 MHz (both with and without >> zero-delay mode) >> Reference clock = 10 MHz, RF clock = 184.32 MHz (useful for LTE) >> Reference clock = 30.72 MHz, RF clock = 184.32 MHz (useful for LTE) with >> external reference >> Reference clock = 10 MHz, RF clock = 120 MHz >> >> If you need any others, let me know and we will add them. Alternative >> reference clock rates are quite easy to add. >> >> Matt >> >> >> >> On Wed, Feb 26, 2014 at 6:36 AM, Robert Palumbo <palumr@gmail.com> wrote: >> >>> Hello, >>> >>> I'm looking at the datasheet for the LMK04816 clock chip on the X300, to >>> try and determine if I can lock to other frequencies besides 10MHz (either >>> 80MHz or 100MHz). >>> >>> It looks like you need to either use the internal VCO or an external >>> VCXO, and an input to the OSCin pin of the chip. From the source code >>> online, it looks like your using an (internal?) VCO of 2400MHz when the >>> device runs at a 200MHz rate. Can you tell me what frequency your running >>> on the OSCin pins of the device? >>> >>> Thanks, >>> >>> Rob >>> >>> -- >>> Robert A Palumbo >>> palumr@gmail.com >>> >>> _______________________________________________ >>> USRP-users mailing list >>> USRP-users@lists.ettus.com >>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>> >>> >> > > > -- > Robert A Palumbo > palumr@gmail.com >