I am looking for some e310 yaml examples to build custom fpga images, for an e310, to use python in uhd and gnu radio support for rfnoc.

Specifically Im looking for :

1x DDC, 1x DUC

usrp_e310_fpga_sg3.bit,

usrp_e310_fpga_sg3.yaml

and

usrp_e310_fpga_RFNOC_sg3.bit,

usrp_e310_fpga_RFNOC_sg3.yaml

fosphor, window, fft, 2x AXI FIFOs, FIR

I have a full devlopment system built up and can build the FPGA images (.bit) but am not sure

how to configure the YAML file block, staic and crossbar links.

Thank you in advance!!

Thank you Martin for always providing a quick response!

The two files I noted above, are pointed to in this Ettus docuement:

https://kb.ettus.com/Getting_Started_with_RFNoC_Development, and are specific to the e310.

and do exactly what I need, and since they were ettus provided, Im assuming they fit (?)…. and have the memory settings to fit on the device.

I have now modifed the e310_rfnoc_image_core.yml, and am compiling it.

The original ettus provided files would show me how the memory was allocated which is key on the 310 FPGA for size.

We are currently using the UHD 3.14 based fosphor application witn an additional block to identify and characterize noise in a power ditribution system. I had intended to update the system to UHD 4.0 and the new RFNOC architecture.

I just realized that this docuement, https://kb.ettus.com/Getting_Started_with_RFNoC_Development, and are specific to the e310. is Obsolete,

and reference to the old architecture.

I will continue to create a custome image.

Thank you Ettus Team!!