Discussion and technical support related to USRP, UHD, RFNoC
View all threadsJonathon,
It guess I have not tried simulating using Modelsim or Vivado on the RFNoC Moving Average with my latest git. I get the following error:
/lib/rfnoc/noc_block_moving_avg_tb: make vsim GUI=1
Makefile:55: uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc: No such file or directory
make: *** No rule to make target 'uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc'. Stop
Craig
Craig F. Swanson
Research Engineer II
Information and Communications Laboratory
Communications, Systems, and Spectrum Division
Georgia Tech Research Institute
Room 560
250 14th St NW
Atlanta, GA 30318
Cell: 770.298.9156
http://www.gtri.gatech.eduhttps://mail.gtri.gatech.edu/owa/redir.aspx?C=c20925f2f0af4dd29329ddf0701ecfff&URL=http%3a%2f%2fwww.gtri.gatech.edu%2f
Craig,
I cannot reproduce this issue, are you using the lastest rfnoc-devel commit?
Jonathon
On Tue, Nov 17, 2015 at 9:17 AM, Swanson, Craig <
Craig.Swanson@gtri.gatech.edu> wrote:
Jonathon,
It guess I have not tried simulating using Modelsim or Vivado on the RFNoC
Moving Average with my latest git. I get the following error:
/lib/rfnoc/noc_block_moving_avg_tb: make vsim GUI=1
Makefile:55:
uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc: No such
file or directory
make: *** No rule to make target
'uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc'. Stop
Craig
Craig F. Swanson
*Research Engineer II *
Information and Communications Laboratory
Communications, Systems, and Spectrum Division
Georgia Tech Research Institute
*Room 560 250 14th St NW *
Atlanta, GA 30318
Cell: 770.298.9156 <770.298.9156>
http://www.gtri.gatech.edu
https://mail.gtri.gatech.edu/owa/redir.aspx?C=c20925f2f0af4dd29329ddf0701ecfff&URL=http%3a%2f%2fwww.gtri.gatech.edu%2f
Craig,
I just noticed that if you are using fpga-src from uhd you could run into
this problem. I updated fpga-src to point to the latest rfnoc-devel commit
which has this fix.
Jonathon
On Tue, Nov 17, 2015 at 9:40 AM, Jonathon Pendlum <
jonathon.pendlum@ettus.com> wrote:
Craig,
I cannot reproduce this issue, are you using the lastest rfnoc-devel
commit?
Jonathon
On Tue, Nov 17, 2015 at 9:17 AM, Swanson, Craig <
Craig.Swanson@gtri.gatech.edu> wrote:
Jonathon,
It guess I have not tried simulating using Modelsim or Vivado on
the RFNoC Moving Average with my latest git. I get the following error:
/lib/rfnoc/noc_block_moving_avg_tb: make vsim GUI=1
Makefile:55:
uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc: No such
file or directory
make: *** No rule to make target
'uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc'. Stop
Craig
Craig F. Swanson
*Research Engineer II *
Information and Communications Laboratory
Communications, Systems, and Spectrum Division
Georgia Tech Research Institute
*Room 560 250 14th St NW *
Atlanta, GA 30318
Cell: 770.298.9156 <770.298.9156>
http://www.gtri.gatech.edu
https://mail.gtri.gatech.edu/owa/redir.aspx?C=c20925f2f0af4dd29329ddf0701ecfff&URL=http%3a%2f%2fwww.gtri.gatech.edu%2f
Jonathon,
I know there are several ways to do this, but I wanted to make sure I am doing this right:
Craig
Craig F. Swanson
Research Engineer II
Information and Communications Laboratory
Communications, Systems, and Spectrum Division
Georgia Tech Research Institute
Room 560
250 14th St NW
Atlanta, GA 30318
Cell: 770.298.9156
http://www.gtri.gatech.eduhttps://mail.gtri.gatech.edu/owa/redir.aspx?C=c20925f2f0af4dd29329ddf0701ecfff&URL=http%3a%2f%2fwww.gtri.gatech.edu%2f
From: Jonathon Pendlum jonathon.pendlum@ettus.com
Sent: Tuesday, November 17, 2015 12:52 PM
To: Swanson, Craig
Cc: usrp-users@lists.ettus.com
Subject: Re: Simulating moving_average with modelsim and recieving a Makefile error related to /lib/ip/divide_int16_int32
Craig,
I just noticed that if you are using fpga-src from uhd you could run into this problem. I updated fpga-src to point to the latest rfnoc-devel commit which has this fix.
Jonathon
On Tue, Nov 17, 2015 at 9:40 AM, Jonathon Pendlum <jonathon.pendlum@ettus.commailto:jonathon.pendlum@ettus.com> wrote:
Craig,
I cannot reproduce this issue, are you using the lastest rfnoc-devel commit?
Jonathon
On Tue, Nov 17, 2015 at 9:17 AM, Swanson, Craig <Craig.Swanson@gtri.gatech.edumailto:Craig.Swanson@gtri.gatech.edu> wrote:
Jonathon,
It guess I have not tried simulating using Modelsim or Vivado on the RFNoC Moving Average with my latest git. I get the following error:
/lib/rfnoc/noc_block_moving_avg_tb: make vsim GUI=1
Makefile:55: uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc: No such file or directory
make: *** No rule to make target 'uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc'. Stop
Craig
Craig F. Swanson
Research Engineer II
Information and Communications Laboratory
Communications, Systems, and Spectrum Division
Georgia Tech Research Institute
Room 560
250 14th St NW
Atlanta, GA 30318
Cell: 770.298.9156tel:770.298.9156
http://www.gtri.gatech.eduhttps://mail.gtri.gatech.edu/owa/redir.aspx?C=c20925f2f0af4dd29329ddf0701ecfff&URL=http%3a%2f%2fwww.gtri.gatech.edu%2f
Hi Craig,
That looks correct to me.
Jonathon
On Tue, Nov 17, 2015 at 10:53 AM, Swanson, Craig <
Craig.Swanson@gtri.gatech.edu> wrote:
Jonathon,
I know there are several ways to do this, but I wanted to make sure I am
doing this right:
1. I archive off the entire uhd directory to another location and
then delete it from ~/uhd.
2. git clone https://github.com/EttusResearch/uhd
3. cd uhd
4. git checkout rfnoc-devel
5. cd /uhd/host
6. mkdir build
7. cd build
8. cmake -DENABLE_E300=ON ../
9. make -j4
10. sudo make -j4 install
11. cd ~/uhd
12. git submodule init
13. git submodule update
Craig
Craig F. Swanson
*Research Engineer II *
Information and Communications Laboratory
Communications, Systems, and Spectrum Division
Georgia Tech Research Institute
*Room 560 250 14th St NW *
Atlanta, GA 30318
Cell: 770.298.9156 <770.298.9156>
http://www.gtri.gatech.edu
https://mail.gtri.gatech.edu/owa/redir.aspx?C=c20925f2f0af4dd29329ddf0701ecfff&URL=http%3a%2f%2fwww.gtri.gatech.edu%2f
From: Jonathon Pendlum jonathon.pendlum@ettus.com
Sent: Tuesday, November 17, 2015 12:52 PM
To: Swanson, Craig
Cc: usrp-users@lists.ettus.com
Subject: Re: Simulating moving_average with modelsim and recieving a
Makefile error related to /lib/ip/divide_int16_int32
Craig,
I just noticed that if you are using fpga-src from uhd you could run into
this problem. I updated fpga-src to point to the latest rfnoc-devel commit
which has this fix.
Jonathon
On Tue, Nov 17, 2015 at 9:40 AM, Jonathon Pendlum <
jonathon.pendlum@ettus.com> wrote:
Craig,
I cannot reproduce this issue, are you using the lastest rfnoc-devel
commit?
Jonathon
On Tue, Nov 17, 2015 at 9:17 AM, Swanson, Craig <
Craig.Swanson@gtri.gatech.edu> wrote:
Jonathon,
It guess I have not tried simulating using Modelsim or Vivado on
the RFNoC Moving Average with my latest git. I get the following error:
/lib/rfnoc/noc_block_moving_avg_tb: make vsim GUI=1
Makefile:55:
uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc: No such
file or directory
make: *** No rule to make target
'uhd/fpga-src/usrp3/top/../lib/ip/divide_int16_int32/Makefile.inc'. Stop
Craig
Craig F. Swanson
*Research Engineer II *
Information and Communications Laboratory
Communications, Systems, and Spectrum Division
Georgia Tech Research Institute
*Room 560 250 14th St NW *
Atlanta, GA 30318
Cell: 770.298.9156 <770.298.9156>
http://www.gtri.gatech.edu
https://mail.gtri.gatech.edu/owa/redir.aspx?C=c20925f2f0af4dd29329ddf0701ecfff&URL=http%3a%2f%2fwww.gtri.gatech.edu%2f