Has anyone measured the details of the spread spectrum clocks used to help meet emission limits (like FCC Part 15)? It seems, superficially, that they do this with some sort of deterministic process (like a linear feedback shift register), and so, one might be able to "back out" the (Pseudo)randomization to get better timing performance. https://www.maximintegrated.com/en/app-notes/index.mvp/id/3503 seems to indicate that they use a up/down sweep approach. https://www.maximintegrated.com/en/products/all-products/archive/MAX9492.html https://www.idt.com/products/clocks-timing/application-specific-clocks/spread-spectrum-clocks/180-01-low-emi-clock-generator "IDT's proprietary blend of analog and digital PLL technology" https://www.idt.com/document/dst/idt5p50911-2-3-4-datasheet seems to show a triangle wave frequency modulation

Hi I think the gotcha is that the PLL (where one is involved) may be in a dynamic state a good percentage of the time. Eventually it gets close to setting and then it’s time to hop yet again. That would make the “back out” process pretty involved. Bob > On May 15, 2019, at 1:15 PM, jimlux <jimlux@earthlink.net> wrote: > > Has anyone measured the details of the spread spectrum clocks used to help meet emission limits (like FCC Part 15)? > > It seems, superficially, that they do this with some sort of deterministic process (like a linear feedback shift register), and so, one might be able to "back out" the (Pseudo)randomization to get better timing performance. > > > https://www.maximintegrated.com/en/app-notes/index.mvp/id/3503 > seems to indicate that they use a up/down sweep approach. > > https://www.maximintegrated.com/en/products/all-products/archive/MAX9492.html > > https://www.idt.com/products/clocks-timing/application-specific-clocks/spread-spectrum-clocks/180-01-low-emi-clock-generator > "IDT's proprietary blend of analog and digital PLL technology" > > https://www.idt.com/document/dst/idt5p50911-2-3-4-datasheet > > seems to show a triangle wave frequency modulation > > > _______________________________________________ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > and follow the instructions there.

-------- In message <80833925-1229-45a3-18ad-3395793c09b2@earthlink.net>, jimlux writes: >Has anyone measured the details of the spread spectrum clocks used to >help meet emission limits (like FCC Part 15)? Most of the ones I've seen just FM modulate with a triangle. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk@FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence.

SSC (spread spectrum clocking) is widely used in both commercial (servers etc.) and consumer products. The big advantage is at harmonics of the spread clock, where the higher frequency energy can more easily escape the product case, shielding, and cables. CISPR (EU) standards in general specify a receiver bandwidth of 120 kHz for signals below 1 GHz and a receiver bandwidth of 1 MHz for signals above 1 GHz. Commonly the SSC clock is generated at 100 MHz with a 1% down-spread at a rate of typically 30-35 kHz. The FM modulation shape is typically a triangle or a “Hershey kiss” shape (think about the profile of those candies). At a 1% spread this means the frequency of the clock is changing between 99 MHz and 100 MHz with a period of roughly 30 us. At the 9th harmonic of the 100 MHz clock, the 900 MHz spurious radiation is spread over a 9 MHz bandwidth. Since the EMI receiver is designed with a 120 kHz measurement bandwidth (to protect commercial broadcast FM reception), the peak power is reduced by a factor (9 MHz) / (120 kHz) = 75, which is 18.75 dB. The SSC clock radiation is then interfering with many more communications channels, but the interference in a narrowband receiver is greatly reduced because the energy is spread over a wide bandwidth. Data transfer based on a clock results in emissions at other frequencies related to the clock frequency and data pattern, and those additional frequencies are spread out similarly when SSC is active. So you have EMI interfering with a large number of communications users, but the standards are based on interference with one channel and indeed the worst-case interference if your receiver happens to be tuned to an exact harmonic of the clock (100 MHz, 300 MHz, 500 MHz, 700 MHz, 900 MHz, etc. since odd harmonics are much stronger for 50% duty cycle square waves) are much reduced from what they would be without use of SSC. The regulatory authorities decades ago might have forced all digital devices to be run at certain narrowband frequencies and created guard bands where radio services were not authorized (such as ISM bands for industrial RF use), but they couldn’t control the clock frequencies of digital devices but only their emissions, so they caused an unfortunate situation where you find EMI spread over a wide range of frequencies with no regard to the users assigned to those specific frequencies, but the standards allow the SSC trick to interfere with even more users but at a lower worst-case level. So if you tune a radio receiver across a wide frequency range, you find EMI at many frequencies but the worst-case peak amplitude is reduced. SSC introduces various types of jitter into the clock. Cycle-to-cycle jitter is often the main issue, and the details of how the frequency modulation is performed can make a big difference. Some techniques use an analog modulated VCO, while others use digital techniques (such as switched delay lines). The frequency and phase are not always smoothly changing and in some parts can be non-monotonic over small time intervals. In some cases the clock generator clocks both the sending and receiving end of a serial or parallel data transfer, and the cycle-to-cycle jitter has to be within a certain limit to prevent setup and hold time receive clocking failures. In other cases the receiving system has a PLL which recovers the clock and following stages don’t see the SSC. Some devices (in particular microprocessors) have very strict clock frequency upper limits, so it’s common to see down-spreading used where the clock frequency is always at or below the datasheet clock maximum frequency specification. Many SSC clock generator chips have detailed specifications of their worst-case cycle-to-cycle jitter. I sell spectrum analyzers, and I commonly use an EMI sniffer probe (or just a 450 MHz rubber duck style antenna) to show SSC clocks in the environment. I will commonly see such signals, which look similar to ATSC digital television or LTE cellular signals in that the spectrum is rectangular (or more accurately trapezoidal with slopes at the edges of the channel). A low-cost USB spectrum analyzer (such as the RSA306B from my company — a warning that I am a biased commentator) can show the spectrum and the frequency vs time waveform. Oscilloscope jitter analysis tools can also display the frequency vs time behavior. As noted above, the modulation frequency is usually between 30 and 35 kHz or so. -- Bill Byrom N5BB Tektronix RF Application Engineer On Sun, May 19, 2019, at 7:41 PM, Poul-Henning Kamp wrote: > -------- > In message <80833925-1229-45a3-18ad-3395793c09b2@earthlink.net>, jimlux writes: > > >Has anyone measured the details of the spread spectrum clocks used to > >help meet emission limits (like FCC Part 15)? > > Most of the ones I've seen just FM modulate with a triangle. > -- > Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 > _______________________________________________ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > and follow the instructions there. >