time-nuts@lists.febo.com

Discussion of precise time and frequency measurement

View all threads

Re: [time-nuts] Low noise frequency multiplication

S
SAIDJACK@aol.com
Fri, Mar 2, 2007 1:55 AM

In a message dated 3/1/2007 13:30:26 Pacific Standard Time,
die@dieconsulting.com writes:

I  had never thought about relative performance issues of using a
VCXO locked  with a really narrow band PLL to a lower frequency reference
versus  a  multiplier with a narrow band cleanup filter at the output...
other than to  realize that unless one uses a more complex PLL design
really narrow band  loops implemented extremely straightforwardly
(perhaps to the point of  idiocy) require the higher frequency VCXO to be
accurately on frequency  within the low pass bandwidth else the loop
won't capture. This gets a bit  dicey if one is talking 1 Hz or less at
100  MHz.

Hi Dave,

this is not necessarily as complicated as you mention. If you use a simple
Exor gate as the phase comparator with the 100MHz (or 1GHz) divided down to
10MHz, then there is no dependency between the loop bandwidth to the  frequency
of the VCXO. It will simply lock, no matter how slow the loop  bandwidth (of
course the bandwidth has to be faster than thermal, and aging  effects on the
VCXO since this is what you would like to compensate for with the  PLL).

The Exor gate won't have a problem in locking onto harmonics etc of the
reference since the VCXO has a very small control frequency range.

You do have to make sure that the VCXO adjustment range is sufficient to
allow it to always lock to the reference, taking long-term crystal aging etc
into account.

For a sample VCXO that can be driven by a simple Exor gate as the phase
comparator see also:

http://www.edn.com/contents/images/112703di.pdf
(http://www.edn.com/contents/images/112703di.pdf)

The cleanup filter is a simple second-order 25Hz cut-off RC, and it only  has
to remove the 10MHz phase comparison output from the Exor gate. No
relationship between loop bandwidth and output frequency.

bye,
Said

<BR><BR><BR>**************************************<BR> AOL now offers free
email to everyone.  Find out more about what's free from AOL at
http://www.aol.com.

In a message dated 3/1/2007 13:30:26 Pacific Standard Time, die@dieconsulting.com writes: I had never thought about relative performance issues of using a VCXO locked with a really narrow band PLL to a lower frequency reference versus a multiplier with a narrow band cleanup filter at the output... other than to realize that unless one uses a more complex PLL design really narrow band loops implemented extremely straightforwardly (perhaps to the point of idiocy) require the higher frequency VCXO to be accurately on frequency within the low pass bandwidth else the loop won't capture. This gets a bit dicey if one is talking 1 Hz or less at 100 MHz. Hi Dave, this is not necessarily as complicated as you mention. If you use a simple Exor gate as the phase comparator with the 100MHz (or 1GHz) divided down to 10MHz, then there is no dependency between the loop bandwidth to the frequency of the VCXO. It will simply lock, no matter how slow the loop bandwidth (of course the bandwidth has to be faster than thermal, and aging effects on the VCXO since this is what you would like to compensate for with the PLL). The Exor gate won't have a problem in locking onto harmonics etc of the reference since the VCXO has a very small control frequency range. You do have to make sure that the VCXO adjustment range is sufficient to allow it to always lock to the reference, taking long-term crystal aging etc into account. For a sample VCXO that can be driven by a simple Exor gate as the phase comparator see also: _http://www.edn.com/contents/images/112703di.pdf_ (http://www.edn.com/contents/images/112703di.pdf) The cleanup filter is a simple second-order 25Hz cut-off RC, and it only has to remove the 10MHz phase comparison output from the Exor gate. No relationship between loop bandwidth and output frequency. bye, Said <BR><BR><BR>**************************************<BR> AOL now offers free email to everyone. Find out more about what's free from AOL at http://www.aol.com.
DI
David I. Emery
Fri, Mar 2, 2007 4:15 AM

On Thu, Mar 01, 2007 at 08:55:58PM -0500, SAIDJACK@aol.com wrote:

this is not necessarily as complicated as you mention. If you use a simple
Exor gate as the phase comparator with the 100MHz (or 1GHz) divided down to
10MHz, then there is no dependency between the loop bandwidth to the  frequency
of the VCXO. It will simply lock, no matter how slow the loop  bandwidth (of
course the bandwidth has to be faster than thermal, and aging  effects on the
VCXO since this is what you would like to compensate for with the  PLL).

It will only lock if the beat note frequency at the 10 MHz phase

comparator output  with the worst case initial 100 MHz or 1 GHz VCXO
cold start error is more or less inside the loop bandwidth.  The beat
frequency obviously goes up as the initial VXCO error gets larger...

If the loop bandwidth is 25 Hz this implies maybe 500 to 1 KHz

max cold error to ensure reliable lock at 100 MHz depending on loop gain
and LPF order. 1 KHz is only around 10 ppm and for typical VXCO parts
might require some sort of tweak in order to ensure the VCXO is within
lock range OR a more complex circuit with wider loop bandwidth before
lock or some form of acquisition aid such as sweep.

And if you are talking - as the original poster was - about

under a 1 Hz loop bandwidth things get worse.

You do have to make sure that the VCXO adjustment range is sufficient to
allow it to always lock to the reference, taking long-term crystal aging etc
into account.

Most certainly.

The cleanup filter is a simple second-order 25Hz cut-off RC, and it only  has
to remove the 10MHz phase comparison output from the Exor gate. No
relationship between loop bandwidth and output frequency.

No, but there is a relationship between close in noise sidebands

around the VXCO and loop bandwidth.  Inside the loop bandwidth their
amplitude will be determined by the multiplied reference noise mostly,
outside the loop bandwidth mostly by the native phase noise of the VCXO.
In some cases the VCXO may have better close in phase noise than the
reference (multiplied by the ratio between it and the VCXO) and you may
want a  narrow loop bandwidth - which my point was might make ensuring
reliable start up phase lock a complication.  If one can live with a
wider loop than that is not a problem.

Sorry to be unclear...

--
Dave Emery N1PRE,  die@dieconsulting.com  DIE Consulting, Weston, Mass 02493
"An empty zombie mind with a forlorn barely readable weatherbeaten
'For Rent' sign still vainly flapping outside on the weed encrusted pole - in
celebration of what could have been, but wasn't and is not to be now either."

On Thu, Mar 01, 2007 at 08:55:58PM -0500, SAIDJACK@aol.com wrote: > > this is not necessarily as complicated as you mention. If you use a simple > Exor gate as the phase comparator with the 100MHz (or 1GHz) divided down to > 10MHz, then there is no dependency between the loop bandwidth to the frequency > of the VCXO. It will simply lock, no matter how slow the loop bandwidth (of > course the bandwidth has to be faster than thermal, and aging effects on the > VCXO since this is what you would like to compensate for with the PLL). It will only lock if the beat note frequency at the 10 MHz phase comparator output with the worst case initial 100 MHz or 1 GHz VCXO cold start error is more or less inside the loop bandwidth. The beat frequency obviously goes up as the initial VXCO error gets larger... If the loop bandwidth is 25 Hz this implies maybe 500 to 1 KHz max cold error to ensure reliable lock at 100 MHz depending on loop gain and LPF order. 1 KHz is only around 10 ppm and for typical VXCO parts might require some sort of tweak in order to ensure the VCXO is within lock range OR a more complex circuit with wider loop bandwidth before lock or some form of acquisition aid such as sweep. And if you are talking - as the original poster was - about under a 1 Hz loop bandwidth things get worse. > You do have to make sure that the VCXO adjustment range is sufficient to > allow it to always lock to the reference, taking long-term crystal aging etc > into account. Most certainly. > The cleanup filter is a simple second-order 25Hz cut-off RC, and it only has > to remove the 10MHz phase comparison output from the Exor gate. No > relationship between loop bandwidth and output frequency. No, but there is a relationship between close in noise sidebands around the VXCO and loop bandwidth. Inside the loop bandwidth their amplitude will be determined by the multiplied reference noise mostly, outside the loop bandwidth mostly by the native phase noise of the VCXO. In some cases the VCXO may have better close in phase noise than the reference (multiplied by the ratio between it and the VCXO) and you may want a narrow loop bandwidth - which my point was might make ensuring reliable start up phase lock a complication. If one can live with a wider loop than that is not a problem. Sorry to be unclear... -- Dave Emery N1PRE, die@dieconsulting.com DIE Consulting, Weston, Mass 02493 "An empty zombie mind with a forlorn barely readable weatherbeaten 'For Rent' sign still vainly flapping outside on the weed encrusted pole - in celebration of what could have been, but wasn't and is not to be now either."