MD

Mark D

Tue, Feb 2, 2021 11:05 AM

I'm using UHD 4.0 and building an FPGA for the E320 USRP.

I'm trying to follow the guide for debugging FPGA images on the Ettus website AN-121.

I'm using the rfnoc_image_builder command to build the image, and have added the -g option to open the GUI during the build process: udd_image_builder -7 e320_my_fpga.yml -t E320_1G -g

However the build runs to completion without stopping to open up Vivado.

uhd_image_builder -h shows that the option of -g or -GUI is listed as opening the Vivado GUI during the build. I've tried both -g and -GUI and neither had any effect.

Any ideas? AN-121 is a few years old, is the -g option still supported by uhd_image_builder?

Thanks,

Mark

This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

I'm using UHD 4.0 and building an FPGA for the E320 USRP. I'm trying to follow the guide for debugging FPGA images on the Ettus website AN-121. I'm using the rfnoc_image_builder command to build the image, and have added the -g option to open the GUI during the build process: udd_image_builder -7 e320_my_fpga.yml -t E320_1G -g However the build runs to completion without stopping to open up Vivado. uhd_image_builder -h shows that the option of -g or -GUI is listed as opening the Vivado GUI during the build. I've tried both -g and -GUI and neither had any effect. Any ideas? AN-121 is a few years old, is the -g option still supported by uhd_image_builder? Thanks, Mark ________________________________ This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

MD

Mark D

Tue, Feb 2, 2021 3:09 PM

Just noticed that I'd put uhd_image_builder, I did of course mean rfnoc_image_builder.

Still not having any luck with this, seems to just ignore the -g option.

From: USRP-users usrp-users-bounces@lists.ettus.com On Behalf Of Mark D via USRP-users
Sent: 02 February 2021 11:05
To: usrp-users@lists.ettus.com
Subject: [USRP-users] Opening Vivado GUI during FPGA image build

I'm using UHD 4.0 and building an FPGA for the E320 USRP.

I'm trying to follow the guide for debugging FPGA images on the Ettus website AN-121.

I'm using the rfnoc_image_builder command to build the image, and have added the -g option to open the GUI during the build process: udd_image_builder -7 e320_my_fpga.yml -t E320_1G -g

However the build runs to completion without stopping to open up Vivado.

uhd_image_builder -h shows that the option of -g or -GUI is listed as opening the Vivado GUI during the build. I've tried both -g and -GUI and neither had any effect.

Any ideas? AN-121 is a few years old, is the -g option still supported by uhd_image_builder?

Thanks,

Mark

This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

Just noticed that I'd put uhd_image_builder, I did of course mean rfnoc_image_builder. Still not having any luck with this, seems to just ignore the -g option. From: USRP-users <usrp-users-bounces@lists.ettus.com> On Behalf Of Mark D via USRP-users Sent: 02 February 2021 11:05 To: usrp-users@lists.ettus.com Subject: [USRP-users] Opening Vivado GUI during FPGA image build I'm using UHD 4.0 and building an FPGA for the E320 USRP. I'm trying to follow the guide for debugging FPGA images on the Ettus website AN-121. I'm using the rfnoc_image_builder command to build the image, and have added the -g option to open the GUI during the build process: udd_image_builder -7 e320_my_fpga.yml -t E320_1G -g However the build runs to completion without stopping to open up Vivado. uhd_image_builder -h shows that the option of -g or -GUI is listed as opening the Vivado GUI during the build. I've tried both -g and -GUI and neither had any effect. Any ideas? AN-121 is a few years old, is the -g option still supported by uhd_image_builder? Thanks, Mark ________________________________ This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

WF

Wade Fife

Tue, Feb 2, 2021 5:45 PM

Hi Mark,

This is curious. If I recall, someone else was having trouble with -g, but
it worked for me last time I tried it. I will try it again to see if I can
reproduce anything. In the meantime, you can run rfnoc_image_builder and
make in separate steps. See if this works:

Generate the build files only; don't build the image

rfnoc_image_builder -y e320_my_fpga.yml -t E320_1G --generate-only

Build the image with the GUI

make E320_1G GUI=1

Thanks,

Wade

On Tue, Feb 2, 2021 at 9:10 AM Mark D via USRP-users <
usrp-users@lists.ettus.com> wrote:

Just noticed that I’d put uhd_image_builder, I did of course mean
rfnoc_image_builder.

Still not having any luck with this, seems to just ignore the -g option.

From: USRP-users usrp-users-bounces@lists.ettus.com *On Behalf Of *Mark
D via USRP-users
Sent: 02 February 2021 11:05
To: usrp-users@lists.ettus.com
Subject: [USRP-users] Opening Vivado GUI during FPGA image build

I’m using UHD 4.0 and building an FPGA for the E320 USRP.

I’m trying to follow the guide for debugging FPGA images on the Ettus
website AN-121.

I’m using the rfnoc_image_builder command to build the image, and have
added the -g option to open the GUI during the build process:
udd_image_builder -7 e320_my_fpga.yml -t E320_1G -g

However the build runs to completion without stopping to open up Vivado.

uhd_image_builder -h shows that the option of -g or –GUI is listed as
opening the Vivado GUI during the build. I’ve tried both -g and –GUI and
neither had any effect.

Any ideas? AN-121 is a few years old, is the -g option still supported by
uhd_image_builder?

Thanks,

Mark

This email and any files transmitted with it are confidential and intended
solely for the use of the individual or entity to whom they are addressed.
If you have received this email in error please notify the system manager.

USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Hi Mark, This is curious. If I recall, someone else was having trouble with -g, but it worked for me last time I tried it. I will try it again to see if I can reproduce anything. In the meantime, you can run rfnoc_image_builder and make in separate steps. See if this works: # Generate the build files only; don't build the image rfnoc_image_builder -y e320_my_fpga.yml -t E320_1G --generate-only # Build the image with the GUI make E320_1G GUI=1 Thanks, Wade On Tue, Feb 2, 2021 at 9:10 AM Mark D via USRP-users < usrp-users@lists.ettus.com> wrote: > Just noticed that I’d put uhd_image_builder, I did of course mean > rfnoc_image_builder. > > > > Still not having any luck with this, seems to just ignore the -g option. > > > > *From:* USRP-users <usrp-users-bounces@lists.ettus.com> *On Behalf Of *Mark > D via USRP-users > *Sent:* 02 February 2021 11:05 > *To:* usrp-users@lists.ettus.com > *Subject:* [USRP-users] Opening Vivado GUI during FPGA image build > > > > I’m using UHD 4.0 and building an FPGA for the E320 USRP. > > > > I’m trying to follow the guide for debugging FPGA images on the Ettus > website AN-121. > > > > I’m using the rfnoc_image_builder command to build the image, and have > added the -g option to open the GUI during the build process: > udd_image_builder -7 e320_my_fpga.yml -t E320_1G -g > > > > However the build runs to completion without stopping to open up Vivado. > > > > uhd_image_builder -h shows that the option of -g or –GUI is listed as > opening the Vivado GUI during the build. I’ve tried both -g and –GUI and > neither had any effect. > > > > Any ideas? AN-121 is a few years old, is the -g option still supported by > uhd_image_builder? > > > > Thanks, > > > > Mark > ------------------------------ > > This email and any files transmitted with it are confidential and intended > solely for the use of the individual or entity to whom they are addressed. > If you have received this email in error please notify the system manager. > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >

MD

Mark D

Wed, Feb 3, 2021 9:48 AM

Thanks Wade,

I had tried this just before your email. The first time I did this I got an error from make saying that Vivado wasn’t found in the environment and that I should run setupenv.sh.

Running “source setupenv.sh” fixed this issue and “make E320_1G” GUI=1 did open the design up in Vivado.

One thing that might be a cause of the issue is that I don’t have vivado installed at the “standard” location. It seems strange that rfnoc_image_builder finds it Ok. Maybe if I try the -g option after running the setupenv.sh it might work.

Thanks again for your help,

Mark
From: Wade Fife wade.fife@ettus.com
Sent: 02 February 2021 17:45
To: Mark D md964@hmgcc.gov.uk
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build

Hi Mark,

This is curious. If I recall, someone else was having trouble with -g, but it worked for me last time I tried it. I will try it again to see if I can reproduce anything. In the meantime, you can run rfnoc_image_builder and make in separate steps. See if this works:

Generate the build files only; don't build the image

rfnoc_image_builder -y e320_my_fpga.yml -t E320_1G --generate-only

Build the image with the GUI

make E320_1G GUI=1

Thanks,

Wade

On Tue, Feb 2, 2021 at 9:10 AM Mark D via USRP-users <usrp-users@lists.ettus.com mailto:usrp-users@lists.ettus.com> wrote:
Just noticed that I’d put uhd_image_builder, I did of course mean rfnoc_image_builder.

Still not having any luck with this, seems to just ignore the -g option.

From: USRP-users <usrp-users-bounces@lists.ettus.com mailto:usrp-users-bounces@lists.ettus.com> On Behalf Of Mark D via USRP-users
Sent: 02 February 2021 11:05
To: usrp-users@lists.ettus.com mailto:usrp-users@lists.ettus.com
Subject: [USRP-users] Opening Vivado GUI during FPGA image build

I’m using UHD 4.0 and building an FPGA for the E320 USRP.

I’m trying to follow the guide for debugging FPGA images on the Ettus website AN-121.

I’m using the rfnoc_image_builder command to build the image, and have added the -g option to open the GUI during the build process: udd_image_builder -7 e320_my_fpga.yml -t E320_1G -g

However the build runs to completion without stopping to open up Vivado.

uhd_image_builder -h shows that the option of -g or –GUI is listed as opening the Vivado GUI during the build. I’ve tried both -g and –GUI and neither had any effect.

Any ideas? AN-121 is a few years old, is the -g option still supported by uhd_image_builder?

Thanks,

Mark

This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

USRP-users mailing list
USRP-users@lists.ettus.com mailto:USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Thanks Wade, I had tried this just before your email. The first time I did this I got an error from make saying that Vivado wasn’t found in the environment and that I should run setupenv.sh. Running “source setupenv.sh” fixed this issue and “make E320_1G” GUI=1 did open the design up in Vivado. One thing that might be a cause of the issue is that I don’t have vivado installed at the “standard” location. It seems strange that rfnoc_image_builder finds it Ok. Maybe if I try the -g option after running the setupenv.sh it might work. Thanks again for your help, Mark From: Wade Fife <wade.fife@ettus.com> Sent: 02 February 2021 17:45 To: Mark D <md964@hmgcc.gov.uk> Cc: usrp-users@lists.ettus.com Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build Hi Mark, This is curious. If I recall, someone else was having trouble with -g, but it worked for me last time I tried it. I will try it again to see if I can reproduce anything. In the meantime, you can run rfnoc_image_builder and make in separate steps. See if this works: # Generate the build files only; don't build the image rfnoc_image_builder -y e320_my_fpga.yml -t E320_1G --generate-only # Build the image with the GUI make E320_1G GUI=1 Thanks, Wade On Tue, Feb 2, 2021 at 9:10 AM Mark D via USRP-users <usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com>> wrote: Just noticed that I’d put uhd_image_builder, I did of course mean rfnoc_image_builder. Still not having any luck with this, seems to just ignore the -g option. From: USRP-users <usrp-users-bounces@lists.ettus.com<mailto:usrp-users-bounces@lists.ettus.com>> On Behalf Of Mark D via USRP-users Sent: 02 February 2021 11:05 To: usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com> Subject: [USRP-users] Opening Vivado GUI during FPGA image build I’m using UHD 4.0 and building an FPGA for the E320 USRP. I’m trying to follow the guide for debugging FPGA images on the Ettus website AN-121. I’m using the rfnoc_image_builder command to build the image, and have added the -g option to open the GUI during the build process: udd_image_builder -7 e320_my_fpga.yml -t E320_1G -g However the build runs to completion without stopping to open up Vivado. uhd_image_builder -h shows that the option of -g or –GUI is listed as opening the Vivado GUI during the build. I’ve tried both -g and –GUI and neither had any effect. Any ideas? AN-121 is a few years old, is the -g option still supported by uhd_image_builder? Thanks, Mark ________________________________ This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager. _______________________________________________ USRP-users mailing list USRP-users@lists.ettus.com<mailto:USRP-users@lists.ettus.com> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

MD

Mark D

Tue, Feb 9, 2021 1:48 PM

Wade, usrp-users,

I’m now trying to build some code in an OOT directory.

I can build the design with the rfnoc_image_builder Ok, however I can use the two step workaround to get the Vivado GUI to open. When I try and run “make E320_1G GUI=1” I just get an error saying that there is no rule to make target ‘E320_1G’.

Any idea how I can use the two step workaround from an OOT directory, or how I might be able to get rfnoc_image_builder to bring up the GUI?

Thanks,

Mark

From: Mark D
Sent: 03 February 2021 09:49
To: 'Wade Fife' wade.fife@ettus.com
Cc: usrp-users@lists.ettus.com
Subject: RE: [USRP-users] Opening Vivado GUI during FPGA image build

Thanks Wade,

I had tried this just before your email. The first time I did this I got an error from make saying that Vivado wasn’t found in the environment and that I should run setupenv.sh.

Running “source setupenv.sh” fixed this issue and “make E320_1G” GUI=1 did open the design up in Vivado.

One thing that might be a cause of the issue is that I don’t have vivado installed at the “standard” location. It seems strange that rfnoc_image_builder finds it Ok. Maybe if I try the -g option after running the setupenv.sh it might work.

Thanks again for your help,

Mark
From: Wade Fife <wade.fife@ettus.com mailto:wade.fife@ettus.com>
Sent: 02 February 2021 17:45
To: Mark D <md964@hmgcc.gov.uk mailto:md964@hmgcc.gov.uk>
Cc: usrp-users@lists.ettus.com mailto:usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build

Hi Mark,

This is curious. If I recall, someone else was having trouble with -g, but it worked for me last time I tried it. I will try it again to see if I can reproduce anything. In the meantime, you can run rfnoc_image_builder and make in separate steps. See if this works:

Generate the build files only; don't build the image

rfnoc_image_builder -y e320_my_fpga.yml -t E320_1G --generate-only

Build the image with the GUI

make E320_1G GUI=1

Thanks,

Wade

This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

Wade, usrp-users, I’m now trying to build some code in an OOT directory. I can build the design with the rfnoc_image_builder Ok, however I can use the two step workaround to get the Vivado GUI to open. When I try and run “make E320_1G GUI=1” I just get an error saying that there is no rule to make target ‘E320_1G’. Any idea how I can use the two step workaround from an OOT directory, or how I might be able to get rfnoc_image_builder to bring up the GUI? Thanks, Mark From: Mark D Sent: 03 February 2021 09:49 To: 'Wade Fife' <wade.fife@ettus.com> Cc: usrp-users@lists.ettus.com Subject: RE: [USRP-users] Opening Vivado GUI during FPGA image build Thanks Wade, I had tried this just before your email. The first time I did this I got an error from make saying that Vivado wasn’t found in the environment and that I should run setupenv.sh. Running “source setupenv.sh” fixed this issue and “make E320_1G” GUI=1 did open the design up in Vivado. One thing that might be a cause of the issue is that I don’t have vivado installed at the “standard” location. It seems strange that rfnoc_image_builder finds it Ok. Maybe if I try the -g option after running the setupenv.sh it might work. Thanks again for your help, Mark From: Wade Fife <wade.fife@ettus.com<mailto:wade.fife@ettus.com>> Sent: 02 February 2021 17:45 To: Mark D <md964@hmgcc.gov.uk<mailto:md964@hmgcc.gov.uk>> Cc: usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com> Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build Hi Mark, This is curious. If I recall, someone else was having trouble with -g, but it worked for me last time I tried it. I will try it again to see if I can reproduce anything. In the meantime, you can run rfnoc_image_builder and make in separate steps. See if this works: # Generate the build files only; don't build the image rfnoc_image_builder -y e320_my_fpga.yml -t E320_1G --generate-only # Build the image with the GUI make E320_1G GUI=1 Thanks, Wade ________________________________ This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

JP

Jim Palladino

Tue, Feb 9, 2021 2:01 PM

It's been a while since I did this, but I had issues bringing up the gui as well. Here is a copy/paste of some notes I wrote for myself:

Edit the file "$PREFIX/bin/rfnoc_image_builder".
Find the line "gui=args.GUI" and change it to "GUI=args.GUI" and save it.
Next, edit "$PREFIX/../src/uhd/fpga/usrp3/tools/script/setupenv_base.sh" to make sure it properly reflects your Vivado installation path.

Once I replaced "gui" with "GUI", the -g option worked fine with rfnoc_image_builder. The last note was something I had to change so my Vivado path was set correctly.

Hope this helps,
Jim

From: USRP-users usrp-users-bounces@lists.ettus.com on behalf of Mark D via USRP-users usrp-users@lists.ettus.com
Sent: Tuesday, February 9, 2021 8:48 AM
To: 'Wade Fife' wade.fife@ettus.com
Cc: 'usrp-users@lists.ettus.com' usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build

Wade, usrp-users,

I’m now trying to build some code in an OOT directory.

I can build the design with the rfnoc_image_builder Ok, however I can use the two step workaround to get the Vivado GUI to open. When I try and run “make E320_1G GUI=1” I just get an error saying that there is no rule to make target ‘E320_1G’.

Any idea how I can use the two step workaround from an OOT directory, or how I might be able to get rfnoc_image_builder to bring up the GUI?

Thanks,

Mark

From: Mark D
Sent: 03 February 2021 09:49
To: 'Wade Fife' wade.fife@ettus.com
Cc: usrp-users@lists.ettus.com
Subject: RE: [USRP-users] Opening Vivado GUI during FPGA image build

Thanks Wade,

I had tried this just before your email. The first time I did this I got an error from make saying that Vivado wasn’t found in the environment and that I should run setupenv.sh.

Running “source setupenv.sh” fixed this issue and “make E320_1G” GUI=1 did open the design up in Vivado.

One thing that might be a cause of the issue is that I don’t have vivado installed at the “standard” location. It seems strange that rfnoc_image_builder finds it Ok. Maybe if I try the -g option after running the setupenv.sh it might work.

Thanks again for your help,

Mark

From: Wade Fife <wade.fife@ettus.com mailto:wade.fife@ettus.com>
Sent: 02 February 2021 17:45
To: Mark D <md964@hmgcc.gov.uk mailto:md964@hmgcc.gov.uk>
Cc: usrp-users@lists.ettus.com mailto:usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build

Hi Mark,

This is curious. If I recall, someone else was having trouble with -g, but it worked for me last time I tried it. I will try it again to see if I can reproduce anything. In the meantime, you can run rfnoc_image_builder and make in separate steps. See if this works:

Generate the build files only; don't build the image

rfnoc_image_builder -y e320_my_fpga.yml -t E320_1G --generate-only

Build the image with the GUI

make E320_1G GUI=1

Thanks,

Wade

This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

It's been a while since I did this, but I had issues bringing up the gui as well. Here is a copy/paste of some notes I wrote for myself: * Edit the file "$PREFIX/bin/rfnoc_image_builder". * Find the line "gui=args.GUI" and change it to "GUI=args.GUI" and save it. * Next, edit "$PREFIX/../src/uhd/fpga/usrp3/tools/script/setupenv_base.sh" to make sure it properly reflects your Vivado installation path. Once I replaced "gui" with "GUI", the -g option worked fine with rfnoc_image_builder. The last note was something I had to change so my Vivado path was set correctly. Hope this helps, Jim ________________________________ From: USRP-users <usrp-users-bounces@lists.ettus.com> on behalf of Mark D via USRP-users <usrp-users@lists.ettus.com> Sent: Tuesday, February 9, 2021 8:48 AM To: 'Wade Fife' <wade.fife@ettus.com> Cc: 'usrp-users@lists.ettus.com' <usrp-users@lists.ettus.com> Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build Wade, usrp-users, I’m now trying to build some code in an OOT directory. I can build the design with the rfnoc_image_builder Ok, however I can use the two step workaround to get the Vivado GUI to open. When I try and run “make E320_1G GUI=1” I just get an error saying that there is no rule to make target ‘E320_1G’. Any idea how I can use the two step workaround from an OOT directory, or how I might be able to get rfnoc_image_builder to bring up the GUI? Thanks, Mark From: Mark D Sent: 03 February 2021 09:49 To: 'Wade Fife' <wade.fife@ettus.com> Cc: usrp-users@lists.ettus.com Subject: RE: [USRP-users] Opening Vivado GUI during FPGA image build Thanks Wade, I had tried this just before your email. The first time I did this I got an error from make saying that Vivado wasn’t found in the environment and that I should run setupenv.sh. Running “source setupenv.sh” fixed this issue and “make E320_1G” GUI=1 did open the design up in Vivado. One thing that might be a cause of the issue is that I don’t have vivado installed at the “standard” location. It seems strange that rfnoc_image_builder finds it Ok. Maybe if I try the -g option after running the setupenv.sh it might work. Thanks again for your help, Mark From: Wade Fife <wade.fife@ettus.com<mailto:wade.fife@ettus.com>> Sent: 02 February 2021 17:45 To: Mark D <md964@hmgcc.gov.uk<mailto:md964@hmgcc.gov.uk>> Cc: usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com> Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build Hi Mark, This is curious. If I recall, someone else was having trouble with -g, but it worked for me last time I tried it. I will try it again to see if I can reproduce anything. In the meantime, you can run rfnoc_image_builder and make in separate steps. See if this works: # Generate the build files only; don't build the image rfnoc_image_builder -y e320_my_fpga.yml -t E320_1G --generate-only # Build the image with the GUI make E320_1G GUI=1 Thanks, Wade ________________________________ This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.

MD

Mark D

Tue, Feb 9, 2021 3:51 PM

Thanks Jim,

That fixed it, would never have found that one!

Looks like Ettus need to fix this bug in rfnoc_image_builder for future releases.

Mark

From: Jim Palladino jim@gardettoengineering.com
Sent: 09 February 2021 14:02
To: 'Wade Fife' wade.fife@ettus.com; Mark D md964@hmgcc.gov.uk
Cc: 'usrp-users@lists.ettus.com' usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build

It's been a while since I did this, but I had issues bringing up the gui as well. Here is a copy/paste of some notes I wrote for myself:

Edit the file "$PREFIX/bin/rfnoc_image_builder".
Find the line "gui=args.GUI" and change it to "GUI=args.GUI" and save it.
Next, edit "$PREFIX/../src/uhd/fpga/usrp3/tools/script/setupenv_base.sh" to make sure it properly reflects your Vivado installation path.

Once I replaced "gui" with "GUI", the -g option worked fine with rfnoc_image_builder. The last note was something I had to change so my Vivado path was set correctly.

Hope this helps,
Jim

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Thanks Jim, That fixed it, would never have found that one! Looks like Ettus need to fix this bug in rfnoc_image_builder for future releases. Mark From: Jim Palladino <jim@gardettoengineering.com> Sent: 09 February 2021 14:02 To: 'Wade Fife' <wade.fife@ettus.com>; Mark D <md964@hmgcc.gov.uk> Cc: 'usrp-users@lists.ettus.com' <usrp-users@lists.ettus.com> Subject: Re: [USRP-users] Opening Vivado GUI during FPGA image build It's been a while since I did this, but I had issues bringing up the gui as well. Here is a copy/paste of some notes I wrote for myself: * Edit the file "$PREFIX/bin/rfnoc_image_builder". * Find the line "gui=args.GUI" and change it to "GUI=args.GUI" and save it. * Next, edit "$PREFIX/../src/uhd/fpga/usrp3/tools/script/setupenv_base.sh" to make sure it properly reflects your Vivado installation path. Once I replaced "gui" with "GUI", the -g option worked fine with rfnoc_image_builder. The last note was something I had to change so my Vivado path was set correctly. Hope this helps, Jim ________________________________ ________________________________ This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the system manager.