Hi Dario, Im working in the macro DDC. How can I leave disconnected a port? Is there a null source in RFNoC? 2018-04-26 17:32 GMT+02:00 Dario Pennisi <dario@iptronix.com>: > Hi Carlos, > > I am afraid you will have to do some low level coding to do what you want. > > First of all if you use DDC with multiple channels the first thing you > will stumble upon is that channels will share the same AXI port bandwidth > which means basically on an X310 you can handle only 1 channel if you > connect directly to the radio. > > Keep in mind that max bandwidth for each AXI stream is 2 times bus clock > (166MHz) so it’s 366 MSPS, without taking into account protocol overhead > over AXI. > > There is also another problem… UHD does NOT support IP blocks with more > outputs than inputs. > > > > If I were in you I would do something different… create your own noc block > and just copy in the DDC ip, declare it for 8 inputs and 8 outputs but > connect all the DDC blocks to the first input. > > This can be done by simply connecting the ready signal to an AND of all > the ready signals of the sub blocks. > > This way you won’t have input bandwidth issues as you are going to use > only one channel at 200 MSPS and you won’t have problems at the output > because 32 KHz x 8 are way less than what the system is capable of. > > Of course the remaining 7 inputs need to remain disconnected or connected > to a null source. > > > > It will require some coding but it will get you what you need (Assuming it > fits the FPGA) and you’ll just consume one AXI port, plus you’ll have some > serious fun learning rfnoc internals. > > Best regards, > > > > Dario Pennisi > > *From:* USRP-users <usrp-users-bounces@lists.ettus.com> *On Behalf Of *Carlos > Alberto Ruiz Naranjo via USRP-users > *Sent:* Thursday, April 26, 2018 5:21 PM > *To:* EJ Kreinar <ejkreinar@gmail.com> > *Cc:* USRP-users@lists.ettus.com > *Subject:* Re: [USRP-users] Multiple DDCs for a single radio channel > > > > Sorry, I have not attached the image: > > > > ​ > > > > 2018-04-26 17:16 GMT+02:00 Carlos Alberto Ruiz Naranjo < > carlosruiznaranjo@gmail.com>: > > Hello, > > > > thank you Derek and Ej. I am already beginning to understand what my > > limitations are going to be. > > > > I want channalizer in 8+8 variables and not evenly spaced channels. Then I > > think that I cant use the rfnoc polyphase filter. The channels will be > > processed independently on my computer. > > > > This is my ideal scenario: > > > > > > > ​ > > > > > > If I use a single DDC for radio channel (1:8) my IO rate is 100Mhz + > > 8x600Khz = 104.8Mhz, right? Then I need a CE clock rate > 209.6Mhz? Would > > it be possible? > > > > Thank you. > > > > > > 2018-04-26 12:26 GMT+02:00 EJ Kreinar <ejkreinar@gmail.com>: > > Hi Carlos, > > > > Unfortunately no -- that's not possible :) > > > > A few reasons: > > 1. As you've mentioned, there's an RFNoC CE limit... The generator refuses > to insert more than 10, but fundamentally I believe it's 16 total CEs > possible, so you get 14-15 usable CE spots depending on how many radio > blocks are instantiated. So you cannot actually create an FPGA image that > has the required blocks > > 2. I believe the sample rate on the RFNoC radio for X310 cannot be set to > 32 kHz... the master_clock_rate has only a few predetermined values, so > you'll need to set the rate on the RFNoC: Radio to one of those clock rates > (otherwise it will coerce it for you). > > > > The follow up suggestion of one DDC with 8 inputs and 8 outputs might > work. One more thing to consider would be that the total IO rate (data rate > * num ports) of a single CE has to be less than 2x the clock rate of the > CE-- this is because the CE shares the crossbar connection between all > ports, and the crossbar uses a 64 bit bus instead of 32 bits. For this > particular scenario, I might recommend an architecture like this... > > > > Radio (high mclk) ==> single channel DDC (downsample by 32x or something) > ==> Splitstream with 8 output ports ==> DDC with 8 input/output ports > > > > For the DDC, there's a verilog parameter you can change that adds more > channels -- I believe it defaults to 2. You'll also want to change the NOC > ID of the updated DDC so you can create a new xml definition with 8 ports, > and then probably edit the gr-ettus block to provide 8 ports, too. > > > > For the Splitstream, you may need to copy the existing block and create a > version that has 8 ports. I'm not sure off the top of my head but I think > it only provides 2 outputs. > > > > Alternatively, you could investigate the rfnoc polyphase channelizer :) I > saw some activity back in February but not sure about current status. > > > > Hope this helps, > > EJ > > > > On Thu, Apr 26, 2018, 4:00 AM Carlos Alberto Ruiz Naranjo via USRP-users < > usrp-users@lists.ettus.com> wrote: > > I have seen that application will only allow a number of 10 custom blocks > on the X3xx series. > > Would it be a good idea to create a DDC block with 8 inputs and 8 > independent outputs? Or can I have problems with the timing constraints? > > > > 2018-04-25 14:43 GMT+02:00 Carlos Alberto Ruiz Naranjo < > carlosruiznaranjo@gmail.com>: > > Hello! > > I will receive my new USRP X310 in the coming weeks and I'm doing tests > with the RFNoc environment. > > I'm trying to set up an example of my project and I have some doubts. I > want to process a channel in 8 DDCs: > > But I have a problem to split the channel. I have thought in: > > It's possible? > > Thank you. > > > > > > > > > > > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > > > >