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full-scale range on B210

ST
Sivan Toledo
Mon, Apr 7, 2014 7:29 AM

Hi,

I run the same UHD code on both the N200 and the B210. On the N200, full
scale receive output (ADC is saturated) is 32767. On the B210, full scale
appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code
is identical.

Is the full-scale range of the B210 indeed 9930? If not, is there a likely
reason that I don't see higher values?

Thanks, Sivan

Hi, I run the same UHD code on both the N200 and the B210. On the N200, full scale receive output (ADC is saturated) is 32767. On the B210, full scale appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code is identical. Is the full-scale range of the B210 indeed 9930? If not, is there a likely reason that I don't see higher values? Thanks, Sivan
MJ
Mike Jameson
Mon, Apr 7, 2014 12:00 PM

Sivan,

The ADC in a N200 is 14-bit (214 = 16384) and the ADC in a B210 is 12-bit
(2
12 = 4096).

If you multiply the number of quantisation points by two, to include
negative values (in the time domain), it looks close to what you are seeing.

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo stoledo@tau.ac.il wrote:

Hi,

I run the same UHD code on both the N200 and the B210. On the N200, full
scale receive output (ADC is saturated) is 32767. On the B210, full scale
appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code
is identical.

Is the full-scale range of the B210 indeed 9930? If not, is there a likely
reason that I don't see higher values?

Thanks, Sivan


USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Sivan, The ADC in a N200 is 14-bit (2**14 = 16384) and the ADC in a B210 is 12-bit (2**12 = 4096). If you multiply the number of quantisation points by two, to include negative values (in the time domain), it looks close to what you are seeing. Mike -- Mike Jameson M0MIK BSc MIET Email: mike@scanoo.com Web: http://scanoo.com On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo <stoledo@tau.ac.il> wrote: > Hi, > > I run the same UHD code on both the N200 and the B210. On the N200, full > scale receive output (ADC is saturated) is 32767. On the B210, full scale > appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code > is identical. > > Is the full-scale range of the B210 indeed 9930? If not, is there a likely > reason that I don't see higher values? > > Thanks, Sivan > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > >
MJ
Mike Jameson
Mon, Apr 7, 2014 12:20 PM

I clearly needed another coffee! The negative values are included in the
full scale ADC range so I can only assume the value is doubled due to
complex sampling taking place:

http://www.ni.com/white-paper/3016/en/#toc5

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson mike@scanoo.com wrote:

Sivan,

The ADC in a N200 is 14-bit (214 = 16384) and the ADC in a B210 is
12-bit (2
12 = 4096).

If you multiply the number of quantisation points by two, to include
negative values (in the time domain), it looks close to what you are seeing.

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo stoledo@tau.ac.il wrote:

Hi,

I run the same UHD code on both the N200 and the B210. On the N200, full
scale receive output (ADC is saturated) is 32767. On the B210, full scale
appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code
is identical.

Is the full-scale range of the B210 indeed 9930? If not, is there a
likely reason that I don't see higher values?

Thanks, Sivan


USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

I clearly needed another coffee! The negative values are included in the full scale ADC range so I can only assume the value is doubled due to complex sampling taking place: http://www.ni.com/white-paper/3016/en/#toc5 Mike -- Mike Jameson M0MIK BSc MIET Email: mike@scanoo.com Web: http://scanoo.com On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson <mike@scanoo.com> wrote: > Sivan, > > The ADC in a N200 is 14-bit (2**14 = 16384) and the ADC in a B210 is > 12-bit (2**12 = 4096). > > If you multiply the number of quantisation points by two, to include > negative values (in the time domain), it looks close to what you are seeing. > > Mike > > -- > Mike Jameson M0MIK BSc MIET > Email: mike@scanoo.com > Web: http://scanoo.com > > > On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo <stoledo@tau.ac.il> wrote: > >> Hi, >> >> I run the same UHD code on both the N200 and the B210. On the N200, full >> scale receive output (ADC is saturated) is 32767. On the B210, full scale >> appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code >> is identical. >> >> Is the full-scale range of the B210 indeed 9930? If not, is there a >> likely reason that I don't see higher values? >> >> Thanks, Sivan >> >> _______________________________________________ >> USRP-users mailing list >> USRP-users@lists.ettus.com >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >> >> >
MJ
Mike Jameson
Mon, Apr 7, 2014 12:26 PM

See page 3, paragraph 2.2.4 of the following paper I just discovered which
explains that the number is doubled due to complex sampling:

http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p61.pdf

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:20 PM, Mike Jameson mike@scanoo.com wrote:

I clearly needed another coffee! The negative values are included in the
full scale ADC range so I can only assume the value is doubled due to
complex sampling taking place:

http://www.ni.com/white-paper/3016/en/#toc5

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson mike@scanoo.com wrote:

Sivan,

The ADC in a N200 is 14-bit (214 = 16384) and the ADC in a B210 is
12-bit (2
12 = 4096).

If you multiply the number of quantisation points by two, to include
negative values (in the time domain), it looks close to what you are seeing.

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo stoledo@tau.ac.il wrote:

Hi,

I run the same UHD code on both the N200 and the B210. On the N200, full
scale receive output (ADC is saturated) is 32767. On the B210, full scale
appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code
is identical.

Is the full-scale range of the B210 indeed 9930? If not, is there a
likely reason that I don't see higher values?

Thanks, Sivan


USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

See page 3, paragraph 2.2.4 of the following paper I just discovered which explains that the number is doubled due to complex sampling: http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p61.pdf Mike -- Mike Jameson M0MIK BSc MIET Email: mike@scanoo.com Web: http://scanoo.com On Mon, Apr 7, 2014 at 1:20 PM, Mike Jameson <mike@scanoo.com> wrote: > I clearly needed another coffee! The negative values are included in the > full scale ADC range so I can only assume the value is doubled due to > complex sampling taking place: > > http://www.ni.com/white-paper/3016/en/#toc5 > > Mike > > -- > Mike Jameson M0MIK BSc MIET > Email: mike@scanoo.com > Web: http://scanoo.com > > > On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson <mike@scanoo.com> wrote: > >> Sivan, >> >> The ADC in a N200 is 14-bit (2**14 = 16384) and the ADC in a B210 is >> 12-bit (2**12 = 4096). >> >> If you multiply the number of quantisation points by two, to include >> negative values (in the time domain), it looks close to what you are seeing. >> >> Mike >> >> -- >> Mike Jameson M0MIK BSc MIET >> Email: mike@scanoo.com >> Web: http://scanoo.com >> >> >> On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo <stoledo@tau.ac.il> wrote: >> >>> Hi, >>> >>> I run the same UHD code on both the N200 and the B210. On the N200, full >>> scale receive output (ADC is saturated) is 32767. On the B210, full scale >>> appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code >>> is identical. >>> >>> Is the full-scale range of the B210 indeed 9930? If not, is there a >>> likely reason that I don't see higher values? >>> >>> Thanks, Sivan >>> >>> _______________________________________________ >>> USRP-users mailing list >>> USRP-users@lists.ettus.com >>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>> >>> >> >
ST
Sivan Toledo
Mon, Apr 7, 2014 2:21 PM

Thanks a lot Mike. The strange thing is that the N200, which is also not 16
bits but 14, delivers values that range from -32767 to +32767, so I guess
some scaling is taking place in the N200's FPGA. It seems that the B210 is
doing this differently.

It would be good to specify the full scale values (perhaps using a UHD
call), because it is required for AGC algorithms. This is where I bot
bitten.

On Mon, Apr 7, 2014 at 3:26 PM, Mike Jameson mike@scanoo.com wrote:

See page 3, paragraph 2.2.4 of the following paper I just discovered which
explains that the number is doubled due to complex sampling:

http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p61.pdf

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:20 PM, Mike Jameson mike@scanoo.com wrote:

I clearly needed another coffee! The negative values are included in the
full scale ADC range so I can only assume the value is doubled due to
complex sampling taking place:

http://www.ni.com/white-paper/3016/en/#toc5

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson mike@scanoo.com wrote:

Sivan,

The ADC in a N200 is 14-bit (214 = 16384) and the ADC in a B210 is
12-bit (2
12 = 4096).

If you multiply the number of quantisation points by two, to include
negative values (in the time domain), it looks close to what you are seeing.

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo stoledo@tau.ac.il wrote:

Hi,

I run the same UHD code on both the N200 and the B210. On the N200,
full scale receive output (ADC is saturated) is 32767. On the B210, full
scale appears to be 9930. This is at both 4MHz and 8MHz sample rate. The
UHD code is identical.

Is the full-scale range of the B210 indeed 9930? If not, is there a
likely reason that I don't see higher values?

Thanks, Sivan


USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Thanks a lot Mike. The strange thing is that the N200, which is also not 16 bits but 14, delivers values that range from -32767 to +32767, so I guess some scaling is taking place in the N200's FPGA. It seems that the B210 is doing this differently. It would be good to specify the full scale values (perhaps using a UHD call), because it is required for AGC algorithms. This is where I bot bitten. On Mon, Apr 7, 2014 at 3:26 PM, Mike Jameson <mike@scanoo.com> wrote: > See page 3, paragraph 2.2.4 of the following paper I just discovered which > explains that the number is doubled due to complex sampling: > > http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p61.pdf > > Mike > > > -- > Mike Jameson M0MIK BSc MIET > Email: mike@scanoo.com > Web: http://scanoo.com > > > On Mon, Apr 7, 2014 at 1:20 PM, Mike Jameson <mike@scanoo.com> wrote: > >> I clearly needed another coffee! The negative values are included in the >> full scale ADC range so I can only assume the value is doubled due to >> complex sampling taking place: >> >> http://www.ni.com/white-paper/3016/en/#toc5 >> >> Mike >> >> -- >> Mike Jameson M0MIK BSc MIET >> Email: mike@scanoo.com >> Web: http://scanoo.com >> >> >> On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson <mike@scanoo.com> wrote: >> >>> Sivan, >>> >>> The ADC in a N200 is 14-bit (2**14 = 16384) and the ADC in a B210 is >>> 12-bit (2**12 = 4096). >>> >>> If you multiply the number of quantisation points by two, to include >>> negative values (in the time domain), it looks close to what you are seeing. >>> >>> Mike >>> >>> -- >>> Mike Jameson M0MIK BSc MIET >>> Email: mike@scanoo.com >>> Web: http://scanoo.com >>> >>> >>> On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo <stoledo@tau.ac.il> wrote: >>> >>>> Hi, >>>> >>>> I run the same UHD code on both the N200 and the B210. On the N200, >>>> full scale receive output (ADC is saturated) is 32767. On the B210, full >>>> scale appears to be 9930. This is at both 4MHz and 8MHz sample rate. The >>>> UHD code is identical. >>>> >>>> Is the full-scale range of the B210 indeed 9930? If not, is there a >>>> likely reason that I don't see higher values? >>>> >>>> Thanks, Sivan >>>> >>>> _______________________________________________ >>>> USRP-users mailing list >>>> USRP-users@lists.ettus.com >>>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>>> >>>> >>> >> >
IB
Ian Buckley
Mon, Apr 7, 2014 2:53 PM

OK 2 issues here:

First the concept that Mike introduced that the size of the ADC bus determines he maximum sample magnitude before overflow will occur. Because we use a range of converters and integrated radios from 12 through 16bits across products and also try to re-use the same FPGA modules, we have for usrp2 and usrp3 generations, standardized on the use of a complex sample data type that uses 16bits each for I and Q values, and these values are two's complement signed format. When a converter is smaller than 16bits we LEFT JUSTIFY the same smaller bus, in other words we use the MSB bits and truncate (or zero pad for Rx) the LSB's. Thus code becomes more portable between USRPs. So broadly speaking Sivan is correct to state that -32768 -> 32767 is the expected maximum dynamic range.

Now the issue of Sivan's B210 overflowing with a 9930 sample magnitude. That is unexpected, I have myself recently encountered some B210 overflow issues at approx 85% of 32768, but nothing as low as this. We do apply a gain value internally to compensate for the algorithmic gain of the CORDIC algorithm, so that's one possible area we need to check. The waveform you see this on is of interest..is it possible you can share this flow graph with us? In general we do recommend people reserve some headroom when setting there scaling gain for the samples but not this much.

-Ian

On Apr 7, 2014, at 7:21 AM, Sivan Toledo stoledo@tau.ac.il wrote:

Thanks a lot Mike. The strange thing is that the N200, which is also not 16 bits but 14, delivers values that range from -32767 to +32767, so I guess some scaling is taking place in the N200's FPGA. It seems that the B210 is doing this differently.

It would be good to specify the full scale values (perhaps using a UHD call), because it is required for AGC algorithms. This is where I bot bitten.

On Mon, Apr 7, 2014 at 3:26 PM, Mike Jameson mike@scanoo.com wrote:
See page 3, paragraph 2.2.4 of the following paper I just discovered which explains that the number is doubled due to complex sampling:

http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p61.pdf

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:20 PM, Mike Jameson mike@scanoo.com wrote:
I clearly needed another coffee! The negative values are included in the full scale ADC range so I can only assume the value is doubled due to complex sampling taking place:

http://www.ni.com/white-paper/3016/en/#toc5

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson mike@scanoo.com wrote:
Sivan,

The ADC in a N200 is 14-bit (214 = 16384) and the ADC in a B210 is 12-bit (212 = 4096).

If you multiply the number of quantisation points by two, to include negative values (in the time domain), it looks close to what you are seeing.

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo stoledo@tau.ac.il wrote:
Hi,

I run the same UHD code on both the N200 and the B210. On the N200, full scale receive output (ADC is saturated) is 32767. On the B210, full scale appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code is identical.

Is the full-scale range of the B210 indeed 9930? If not, is there a likely reason that I don't see higher values?

Thanks, Sivan


USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com


USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

OK 2 issues here: First the concept that Mike introduced that the size of the ADC bus determines he maximum sample magnitude before overflow will occur. Because we use a range of converters and integrated radios from 12 through 16bits across products and also try to re-use the same FPGA modules, we have for usrp2 and usrp3 generations, standardized on the use of a complex sample data type that uses 16bits each for I and Q values, and these values are two's complement signed format. When a converter is smaller than 16bits we LEFT JUSTIFY the same smaller bus, in other words we use the MSB bits and truncate (or zero pad for Rx) the LSB's. Thus code becomes more portable between USRPs. So broadly speaking Sivan is correct to state that -32768 -> 32767 is the expected maximum dynamic range. Now the issue of Sivan's B210 overflowing with a 9930 sample magnitude. That is unexpected, I have myself recently encountered some B210 overflow issues at approx 85% of 32768, but nothing as low as this. We do apply a gain value internally to compensate for the algorithmic gain of the CORDIC algorithm, so that's one possible area we need to check. The waveform you see this on is of interest..is it possible you can share this flow graph with us? In general we do recommend people reserve some headroom when setting there scaling gain for the samples but not this much. -Ian On Apr 7, 2014, at 7:21 AM, Sivan Toledo <stoledo@tau.ac.il> wrote: > Thanks a lot Mike. The strange thing is that the N200, which is also not 16 bits but 14, delivers values that range from -32767 to +32767, so I guess some scaling is taking place in the N200's FPGA. It seems that the B210 is doing this differently. > > It would be good to specify the full scale values (perhaps using a UHD call), because it is required for AGC algorithms. This is where I bot bitten. > > > On Mon, Apr 7, 2014 at 3:26 PM, Mike Jameson <mike@scanoo.com> wrote: > See page 3, paragraph 2.2.4 of the following paper I just discovered which explains that the number is doubled due to complex sampling: > > http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p61.pdf > > Mike > > > -- > Mike Jameson M0MIK BSc MIET > Email: mike@scanoo.com > Web: http://scanoo.com > > > On Mon, Apr 7, 2014 at 1:20 PM, Mike Jameson <mike@scanoo.com> wrote: > I clearly needed another coffee! The negative values are included in the full scale ADC range so I can only assume the value is doubled due to complex sampling taking place: > > http://www.ni.com/white-paper/3016/en/#toc5 > > Mike > > -- > Mike Jameson M0MIK BSc MIET > Email: mike@scanoo.com > Web: http://scanoo.com > > > On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson <mike@scanoo.com> wrote: > Sivan, > > The ADC in a N200 is 14-bit (2**14 = 16384) and the ADC in a B210 is 12-bit (2**12 = 4096). > > If you multiply the number of quantisation points by two, to include negative values (in the time domain), it looks close to what you are seeing. > > Mike > > -- > Mike Jameson M0MIK BSc MIET > Email: mike@scanoo.com > Web: http://scanoo.com > > > On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo <stoledo@tau.ac.il> wrote: > Hi, > > I run the same UHD code on both the N200 and the B210. On the N200, full scale receive output (ADC is saturated) is 32767. On the B210, full scale appears to be 9930. This is at both 4MHz and 8MHz sample rate. The UHD code is identical. > > Is the full-scale range of the B210 indeed 9930? If not, is there a likely reason that I don't see higher values? > > Thanks, Sivan > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > > > > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
ST
Sivan Toledo
Mon, Apr 7, 2014 5:09 PM

Sure, I will record waveforms and send you. I did not look at the code;
what I see is that my code increases gain more and more (because it thought
that 9930 is far from full range) and the max stays at 9930. I'll record
the waveforms and share them.

Sivan

On Mon, Apr 7, 2014 at 5:53 PM, Ian Buckley ianb@ionconcepts.com wrote:

OK 2 issues here:

First the concept that Mike introduced that the size of the ADC bus
determines he maximum sample magnitude before overflow will occur. Because
we use a range of converters and integrated radios from 12 through 16bits
across products and also try to re-use the same FPGA modules, we have for
usrp2 and usrp3 generations, standardized on the use of a complex sample
data type that uses 16bits each for I and Q values, and these values are
two's complement signed format. When a converter is smaller than 16bits we
LEFT JUSTIFY the same smaller bus, in other words we use the MSB bits and
truncate (or zero pad for Rx) the LSB's. Thus code becomes more portable
between USRPs. So broadly speaking Sivan is correct to state that -32768 ->
32767 is the expected maximum dynamic range.

Now the issue of Sivan's B210 overflowing with a 9930 sample magnitude.
That is unexpected, I have myself recently encountered some B210 overflow
issues at approx 85% of 32768, but nothing as low as this. We do apply a
gain value internally to compensate for the algorithmic gain of the CORDIC
algorithm, so that's one possible area we need to check. The waveform you
see this on is of interest..is it possible you can share this flow graph
with us? In general we do recommend people reserve some headroom when
setting there scaling gain for the samples but not this much.

-Ian

On Apr 7, 2014, at 7:21 AM, Sivan Toledo stoledo@tau.ac.il wrote:

Thanks a lot Mike. The strange thing is that the N200, which is also not
16 bits but 14, delivers values that range from -32767 to +32767, so I
guess some scaling is taking place in the N200's FPGA. It seems that the
B210 is doing this differently.

It would be good to specify the full scale values (perhaps using a UHD
call), because it is required for AGC algorithms. This is where I bot
bitten.

On Mon, Apr 7, 2014 at 3:26 PM, Mike Jameson mike@scanoo.com wrote:

See page 3, paragraph 2.2.4 of the following paper I just discovered
which explains that the number is doubled due to complex sampling:

http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p61.pdf

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:20 PM, Mike Jameson mike@scanoo.com wrote:

I clearly needed another coffee! The negative values are included in the
full scale ADC range so I can only assume the value is doubled due to
complex sampling taking place:

http://www.ni.com/white-paper/3016/en/#toc5

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson mike@scanoo.com wrote:

Sivan,

The ADC in a N200 is 14-bit (214 = 16384) and the ADC in a B210 is
12-bit (2
12 = 4096).

If you multiply the number of quantisation points by two, to include
negative values (in the time domain), it looks close to what you are seeing.

Mike

--
Mike Jameson M0MIK BSc MIET
Email: mike@scanoo.com
Web: http://scanoo.com

On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo stoledo@tau.ac.il wrote:

Hi,

I run the same UHD code on both the N200 and the B210. On the N200,
full scale receive output (ADC is saturated) is 32767. On the B210, full
scale appears to be 9930. This is at both 4MHz and 8MHz sample rate. The
UHD code is identical.

Is the full-scale range of the B210 indeed 9930? If not, is there a
likely reason that I don't see higher values?

Thanks, Sivan


USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Sure, I will record waveforms and send you. I did not look at the code; what I see is that my code increases gain more and more (because it thought that 9930 is far from full range) and the max stays at 9930. I'll record the waveforms and share them. Sivan On Mon, Apr 7, 2014 at 5:53 PM, Ian Buckley <ianb@ionconcepts.com> wrote: > OK 2 issues here: > > First the concept that Mike introduced that the size of the ADC bus > determines he maximum sample magnitude before overflow will occur. Because > we use a range of converters and integrated radios from 12 through 16bits > across products and also try to re-use the same FPGA modules, we have for > usrp2 and usrp3 generations, standardized on the use of a complex sample > data type that uses 16bits each for I and Q values, and these values are > two's complement signed format. When a converter is smaller than 16bits we > LEFT JUSTIFY the same smaller bus, in other words we use the MSB bits and > truncate (or zero pad for Rx) the LSB's. Thus code becomes more portable > between USRPs. So broadly speaking Sivan is correct to state that -32768 -> > 32767 is the expected maximum dynamic range. > > Now the issue of Sivan's B210 overflowing with a 9930 sample magnitude. > That is unexpected, I have myself recently encountered some B210 overflow > issues at approx 85% of 32768, but nothing as low as this. We do apply a > gain value internally to compensate for the algorithmic gain of the CORDIC > algorithm, so that's one possible area we need to check. The waveform you > see this on is of interest..is it possible you can share this flow graph > with us? In general we do recommend people reserve some headroom when > setting there scaling gain for the samples but not this much. > > -Ian > > On Apr 7, 2014, at 7:21 AM, Sivan Toledo <stoledo@tau.ac.il> wrote: > > Thanks a lot Mike. The strange thing is that the N200, which is also not > 16 bits but 14, delivers values that range from -32767 to +32767, so I > guess some scaling is taking place in the N200's FPGA. It seems that the > B210 is doing this differently. > > It would be good to specify the full scale values (perhaps using a UHD > call), because it is required for AGC algorithms. This is where I bot > bitten. > > > On Mon, Apr 7, 2014 at 3:26 PM, Mike Jameson <mike@scanoo.com> wrote: > >> See page 3, paragraph 2.2.4 of the following paper I just discovered >> which explains that the number is doubled due to complex sampling: >> >> http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p61.pdf >> >> Mike >> >> >> -- >> Mike Jameson M0MIK BSc MIET >> Email: mike@scanoo.com >> Web: http://scanoo.com >> >> >> On Mon, Apr 7, 2014 at 1:20 PM, Mike Jameson <mike@scanoo.com> wrote: >> >>> I clearly needed another coffee! The negative values are included in the >>> full scale ADC range so I can only assume the value is doubled due to >>> complex sampling taking place: >>> >>> http://www.ni.com/white-paper/3016/en/#toc5 >>> >>> Mike >>> >>> -- >>> Mike Jameson M0MIK BSc MIET >>> Email: mike@scanoo.com >>> Web: http://scanoo.com >>> >>> >>> On Mon, Apr 7, 2014 at 1:00 PM, Mike Jameson <mike@scanoo.com> wrote: >>> >>>> Sivan, >>>> >>>> The ADC in a N200 is 14-bit (2**14 = 16384) and the ADC in a B210 is >>>> 12-bit (2**12 = 4096). >>>> >>>> If you multiply the number of quantisation points by two, to include >>>> negative values (in the time domain), it looks close to what you are seeing. >>>> >>>> Mike >>>> >>>> -- >>>> Mike Jameson M0MIK BSc MIET >>>> Email: mike@scanoo.com >>>> Web: http://scanoo.com >>>> >>>> >>>> On Mon, Apr 7, 2014 at 8:29 AM, Sivan Toledo <stoledo@tau.ac.il> wrote: >>>> >>>>> Hi, >>>>> >>>>> I run the same UHD code on both the N200 and the B210. On the N200, >>>>> full scale receive output (ADC is saturated) is 32767. On the B210, full >>>>> scale appears to be 9930. This is at both 4MHz and 8MHz sample rate. The >>>>> UHD code is identical. >>>>> >>>>> Is the full-scale range of the B210 indeed 9930? If not, is there a >>>>> likely reason that I don't see higher values? >>>>> >>>>> Thanks, Sivan >>>>> >>>>> _______________________________________________ >>>>> USRP-users mailing list >>>>> USRP-users@lists.ettus.com >>>>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>>>> >>>>> >>>> >>> >> > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > >
MB
Martin Braun
Tue, Apr 8, 2014 7:00 AM

On 04/07/2014 07:09 PM, Sivan Toledo wrote:

Sure, I will record waveforms and send you. I did not look at the code;
what I see is that my code increases gain more and more (because it
thought that 9930 is far from full range) and the max stays at 9930.
I'll record the waveforms and share them.

Also, what did you do to saturate the ADC?

Martin

On 04/07/2014 07:09 PM, Sivan Toledo wrote: > Sure, I will record waveforms and send you. I did not look at the code; > what I see is that my code increases gain more and more (because it > thought that 9930 is far from full range) and the max stays at 9930. > I'll record the waveforms and share them. Also, what did you do to saturate the ADC? Martin
ST
Sivan Toledo
Tue, Apr 8, 2014 7:09 AM

I transmit short bursts at 434MHz 10mW from integrated transceivers. If
they are close enough (in teh same room) and the USRP is set to high gain,
it gets saturated. I have lots of experience with that setup on the N200
and the behavior there with respect to full scale values.

On Tue, Apr 8, 2014 at 10:00 AM, Martin Braun martin.braun@ettus.comwrote:

On 04/07/2014 07:09 PM, Sivan Toledo wrote:

Sure, I will record waveforms and send you. I did not look at the code;
what I see is that my code increases gain more and more (because it
thought that 9930 is far from full range) and the max stays at 9930.
I'll record the waveforms and share them.

Also, what did you do to saturate the ADC?

Martin


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I transmit short bursts at 434MHz 10mW from integrated transceivers. If they are close enough (in teh same room) and the USRP is set to high gain, it gets saturated. I have lots of experience with that setup on the N200 and the behavior there with respect to full scale values. On Tue, Apr 8, 2014 at 10:00 AM, Martin Braun <martin.braun@ettus.com>wrote: > On 04/07/2014 07:09 PM, Sivan Toledo wrote: > > Sure, I will record waveforms and send you. I did not look at the code; > > what I see is that my code increases gain more and more (because it > > thought that 9930 is far from full range) and the max stays at 9930. > > I'll record the waveforms and share them. > > Also, what did you do to saturate the ADC? > > Martin > > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >