Re: [time-nuts] WWVB PM Time Questions
Paul,
"The new de-psk-r I built has no raw wwvb outputs." What do you mean by
raw?
I have been thinking about how the phase shift could be detected in
software instead of hardware. Could something like this maybe work:
If a micro is able to detect the zero crossing of a sine wave it should
be able to determine if the phase shifts. When a new second starts
(which is easy to determine), delay for 300 msec and then watch for the
next zero crossing. Store the time at that point. Then wait 1000 msec
which would put you at the same point in the next second. Wait for the
next zero crossing and determine the time between that crossing and the
first crossing. You can compute the phase difference based on the time
difference. If the phase difference is between 100 degrees and 180
degrees, you know a phase shift has taken place. The reason for using
100 as the low number is in case the zero crossing on one sine wave was
at the leading edge and it was on the trailing edge of the other one.
You would want to use the output of the PLL to perform those operations
since it is local and not subject to ionospheric interference or delays.
A 100 MHz STM32 should be able to easily handle the calculations in a
couple of microseconds.
Ray,
AB7HE
-------- Original Message --------
Subject: Re: [time-nuts] WWVB PM Time Questions
From: paul swed paulswedb@gmail.com
Date: Wed, July 29, 2020 8:07 pm
To: Discussion of precise time and frequency measurement
time-nuts@lists.febo.com
John
Thanks for jumping in and sharing what you have done. OK just maybe I
can
get the receiver online with a TCXO class oscillator. Or just go buy the
digikey unit and follow what you have done. What the heck all of the
rest
of the receiver is the same.
That leaves just one problem. A terrible one to have. The new de-psk-r I
built has no raw wwvb outputs. I debated about adding one. Woulda
shoulda.
Appreciate you jumping in.
Regards
Paul
WB8TSL
On Wed, Jul 29, 2020 at 10:00 PM John Magliacane via time-nuts <
time-nuts@lists.febo.com> wrote:
Greetings to the group!
I've been an FMTer for years, and an occasional "lurker" here, but as I
find my ears occasionally "whistling" from time to time, I thought it was
time to join in. :-)
On Jul 22, 2020, at 3:51 PM, paul swed <paulswedb at gmail.com> wrote:
Ray watch out for my comment on the KD2BD solution. That oscillator isn't
available and I have not been able to map something else into it. Tried
several good grade Oven oscillators. Just be aware of that issue.
Would need to do more tinkering and simply don't have that time right
now.
Also it would be great if the oscillator was something that could be
obtained at a reasonable cost. I do not believe at all it has to be a
OCXO as the older true time and spectracoms were not and they locked
solid.
So its a case of getting the control voltages right.
As Paul correctly stated, the Bomar VCTCXO used in my WWVB Frequency
Standard is no longer available, at least in single quantities.
Fortunately, there are MUCH better alternatives available, but they require
a little "finagling". Hopefully, this information will help.
I have successfully used a Taitien model TTEAMCSANF-10.000000 High
Precision VCTCXO in my frequency standard with excellent results. This
oscillator operates on 3.3 volts, and produces about a 1 volt p-p clipped
sinewave output. It has a +/- 5 ppm pulling range, and is controlled by a
positive slope tuning voltage between 0.5 and 2.5 volts.
I've used two of these oscillators so far (in different projects), and
both seem to tune exactly to 10 MHz with a tuning voltage close to 1.551
volts. However, YMMV. Use these numbers as a guide if your oscillator
should have different specs.
The attached schematic shows the original circuit at the top with the
modified circuit at the bottom. A 3.3 volt LDO powers the oscillator, and a
simple MFP-102 JFET amplifies the output to drive the subsequent 5-volt
CMOS logic.
The original oscillator was temperature sensitive, and took several
minutes to warm up and settle down. I often had to manually tune the
oscillator on power-up using the front panel tuning control to get it in
the ballpark where it would eventually lock to WWVB.
Now when I turn it on, the new oscillator locks to WWVB in about 30
seconds, and just stays there. :-)
Digikey carries it for $13.81.
73.000 de John, KD2BD_______________________________________________
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rcbuck@atcelectronics.com writes:
Paul,
"The new de-psk-r I built has no raw wwvb outputs." What do you mean by
raw?
I have been thinking about how the phase shift could be detected in
software instead of hardware. Could something like this maybe work:
Back when I played with VLF, I did this on DCF77/Rugby etc.
In my case I used a 12 bit 1MSPS ADC, and (exponentially) averaged
the RF signal into per-station circular buffer, this is very cheap
and fast to do in an interrupt handler.
In your main code you can demodulate that buffer to DC by multiplying
and summing with precomputed sin&cos tables.
That gives you baseband I & Q from which you can trivially calculate
phase and amplitude.
You can make the buffer as short or long as you want, I did the
trivial thing and made it a full second long:
http://phk.freebsd.dk/loran-c/CW/
The trick to that is that you can recover many stations from the
same circular buffer, by using different sin&cos tables. All the
above plots came out of the same single 1sec buffer snapshot.
This obviously works for any buffer length which is a full number
of carrier cycles for all the stations you are interested in, in
principle you can recover all stations on N*kHz, N << 500 from from
a single 1000 sample buffer at 1MSPS.
The advantage of using a 1second buffer was that I could extract
what the stations thought was top of the second from their modulation.
(I actually calculated my position based on DCF77, Rugby, HBG,
France Inter and the strange 200/3 kHz station in Moscow, the result
I got was about half a kilometer wrong.)
To recover the per-second modulation you simply need to shorten the
buffer so it resolves the modulation, which probably means no longer
than 1/20 second for WWVB, but 1/100, if you have the S/N for it,
is much easier in terms of signal analysis code.
An alternative strategy, which I used for DCF77 phase recovery, is
to detect the duration of the AM pulse and pick one of two 1-second
long buffers based on that.
And you don't need much CPU power at all, I did Loran-C time/freq
on a Analog Devices Aduc7206:
http://phk.freebsd.dk/AducLoran/
And that included a graphical display, (watch the animation.gif :-)
--
Poul-Henning Kamp | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG | TCP/IP since RFC 956
FreeBSD committer | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.
Before I commit the soldering iron, can anyone share their sub-harmonic
injection locking experiences ?
I have to make 393.216 from 49.152 .
Yes, lots of ways.... I know.
injection locked at 1/8 of the frequency from the decent source.
There wont be any issue of locking to the wrong harmonic, the VCO will
be on the money.I was thinking of using a dielectric loaded TEM
resonator or TEM coax line VCO .
and why do this : ?
-
I need all the non related spurs to be > 115dB down.
-
a double-double-double could work, but my experience is for x2 x2 x2 I
really need to filter well at each stage to avoid sum and difference
products.. which might be OK for this application , especially if I
filter really well after the first x2 . but avoid if I can. filters at
908 MHz need space, and shield cans where it is going. -
and I dont know too much about phase noise and SRD or varactor
multipliers. but maybe that's an option. -
my attempts at generating low phase noise x6 with class C multipliers
has been dismal. -
onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.
-
sure I can use a good PLL and a external VCO, but if my N value is
fixed, and I can use injection locking, why bother with the PLL chip
that is likely to introduce PD related spurs anyway.
regards
glen
Hello to the group.
Poul has done some very fine work and you can learn a lot from him.
But several comments that will help. Its easy to create all kinds of
solutions that look for phase shifts. I spent quite a bit of time doing
that. But the nasty reality is without accounting for the noise, signal
fades, and delay shifts they generally fail. Or work for short periods of
times.
Simplistically if you have a 1 second image of the incoming signal its easy
to see the phase shift.
With respect to zero crossings it works really poorly. Thats why on Loran C
they were very clear the slice point was as I recall 30% up the envelope.
Humor on the d-psk-r. The new unit does not have an output that contains
the phase shifts of wwvb. The units intention is to remove all phase shifts
so that all old style phase tracking receivers and clocks work. They all
do. Have 7 of them.
So to experiment with Johns fine KB2DB receiver I need the raw phase
flipping wwvb signal.
I have built his receiver and now that there is an answer to the TCXO issue
I need a raw feed. Chuckle. When I built the new unit I really debated
adding that BNC. Hindsight is always really clear.
Best regards
Paul
WB8TSL
On Thu, Jul 30, 2020 at 4:48 AM Poul-Henning Kamp phk@phk.freebsd.dk
wrote:
rcbuck@atcelectronics.com writes:
Paul,
"The new de-psk-r I built has no raw wwvb outputs." What do you mean by
raw?
I have been thinking about how the phase shift could be detected in
software instead of hardware. Could something like this maybe work:
Back when I played with VLF, I did this on DCF77/Rugby etc.
In my case I used a 12 bit 1MSPS ADC, and (exponentially) averaged
the RF signal into per-station circular buffer, this is very cheap
and fast to do in an interrupt handler.
In your main code you can demodulate that buffer to DC by multiplying
and summing with precomputed sin&cos tables.
That gives you baseband I & Q from which you can trivially calculate
phase and amplitude.
You can make the buffer as short or long as you want, I did the
trivial thing and made it a full second long:
http://phk.freebsd.dk/loran-c/CW/
The trick to that is that you can recover many stations from the
same circular buffer, by using different sin&cos tables. All the
above plots came out of the same single 1sec buffer snapshot.
This obviously works for any buffer length which is a full number
of carrier cycles for all the stations you are interested in, in
principle you can recover all stations on N*kHz, N << 500 from from
a single 1000 sample buffer at 1MSPS.
The advantage of using a 1second buffer was that I could extract
what the stations thought was top of the second from their modulation.
(I actually calculated my position based on DCF77, Rugby, HBG,
France Inter and the strange 200/3 kHz station in Moscow, the result
I got was about half a kilometer wrong.)
To recover the per-second modulation you simply need to shorten the
buffer so it resolves the modulation, which probably means no longer
than 1/20 second for WWVB, but 1/100, if you have the S/N for it,
is much easier in terms of signal analysis code.
An alternative strategy, which I used for DCF77 phase recovery, is
to detect the duration of the AM pulse and pick one of two 1-second
long buffers based on that.
And you don't need much CPU power at all, I did Loran-C time/freq
on a Analog Devices Aduc7206:
http://phk.freebsd.dk/AducLoran/
And that included a graphical display, (watch the animation.gif :-)
--
Poul-Henning Kamp | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG | TCP/IP since RFC 956
FreeBSD committer | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.
time-nuts mailing list -- time-nuts@lists.febo.com
To unsubscribe, go to
http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com
and follow the instructions there.
Hi
On Jul 30, 2020, at 7:56 AM, glen english LIST glenlist@cortexrf.com.au wrote:
Before I commit the soldering iron, can anyone share their sub-harmonic injection locking experiences ?
I have to make 393.216 from 49.152 .
Yes, lots of ways.... I know.
injection locked at 1/8 of the frequency from the decent source.
There wont be any issue of locking to the wrong harmonic, the VCO will be on the money.I was thinking of using a dielectric loaded TEM resonator or TEM coax line VCO .
and why do this : ?
- I need all the non related spurs to be > 115dB down.
A sub-harmonic injection locked oscillator can / does have spurs at the injection frequency and
it’s multiples ……
Bob
-
a double-double-double could work, but my experience is for x2 x2 x2 I really need to filter well at each stage to avoid sum and difference products.. which might be OK for this application , especially if I filter really well after the first x2 . but avoid if I can. filters at 908 MHz need space, and shield cans where it is going.
-
and I dont know too much about phase noise and SRD or varactor multipliers. but maybe that's an option.
-
my attempts at generating low phase noise x6 with class C multipliers has been dismal.
-
onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.
-
sure I can use a good PLL and a external VCO, but if my N value is fixed, and I can use injection locking, why bother with the PLL chip that is likely to introduce PD related spurs anyway.
regards
glen
time-nuts mailing list -- time-nuts@lists.febo.com
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and follow the instructions there.
Well John perhaps there is some interest in your receiver. I see the vcTCXO
is down by 5 devices from yesterday. Make that 6 now. For anyone else usps
is cheapest at $4.99.
Regards
Paul
On Thu, Jul 30, 2020 at 10:29 AM paul swed paulswedb@gmail.com wrote:
Hello to the group.
Poul has done some very fine work and you can learn a lot from him.
But several comments that will help. Its easy to create all kinds of
solutions that look for phase shifts. I spent quite a bit of time doing
that. But the nasty reality is without accounting for the noise, signal
fades, and delay shifts they generally fail. Or work for short periods of
times.
Simplistically if you have a 1 second image of the incoming signal its
easy to see the phase shift.
With respect to zero crossings it works really poorly. Thats why on Loran
C they were very clear the slice point was as I recall 30% up the envelope.
Humor on the d-psk-r. The new unit does not have an output that contains
the phase shifts of wwvb. The units intention is to remove all phase shifts
so that all old style phase tracking receivers and clocks work. They all
do. Have 7 of them.
So to experiment with Johns fine KB2DB receiver I need the raw phase
flipping wwvb signal.
I have built his receiver and now that there is an answer to the TCXO
issue I need a raw feed. Chuckle. When I built the new unit I really
debated adding that BNC. Hindsight is always really clear.
Best regards
Paul
WB8TSL
On Thu, Jul 30, 2020 at 4:48 AM Poul-Henning Kamp phk@phk.freebsd.dk
wrote:
rcbuck@atcelectronics.com writes:
Paul,
"The new de-psk-r I built has no raw wwvb outputs." What do you mean by
raw?
I have been thinking about how the phase shift could be detected in
software instead of hardware. Could something like this maybe work:
Back when I played with VLF, I did this on DCF77/Rugby etc.
In my case I used a 12 bit 1MSPS ADC, and (exponentially) averaged
the RF signal into per-station circular buffer, this is very cheap
and fast to do in an interrupt handler.
In your main code you can demodulate that buffer to DC by multiplying
and summing with precomputed sin&cos tables.
That gives you baseband I & Q from which you can trivially calculate
phase and amplitude.
You can make the buffer as short or long as you want, I did the
trivial thing and made it a full second long:
http://phk.freebsd.dk/loran-c/CW/
The trick to that is that you can recover many stations from the
same circular buffer, by using different sin&cos tables. All the
above plots came out of the same single 1sec buffer snapshot.
This obviously works for any buffer length which is a full number
of carrier cycles for all the stations you are interested in, in
principle you can recover all stations on N*kHz, N << 500 from from
a single 1000 sample buffer at 1MSPS.
The advantage of using a 1second buffer was that I could extract
what the stations thought was top of the second from their modulation.
(I actually calculated my position based on DCF77, Rugby, HBG,
France Inter and the strange 200/3 kHz station in Moscow, the result
I got was about half a kilometer wrong.)
To recover the per-second modulation you simply need to shorten the
buffer so it resolves the modulation, which probably means no longer
than 1/20 second for WWVB, but 1/100, if you have the S/N for it,
is much easier in terms of signal analysis code.
An alternative strategy, which I used for DCF77 phase recovery, is
to detect the duration of the AM pulse and pick one of two 1-second
long buffers based on that.
And you don't need much CPU power at all, I did Loran-C time/freq
on a Analog Devices Aduc7206:
http://phk.freebsd.dk/AducLoran/
And that included a graphical display, (watch the animation.gif :-)
--
Poul-Henning Kamp | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG | TCP/IP since RFC 956
FreeBSD committer | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by
incompetence.
time-nuts mailing list -- time-nuts@lists.febo.com
To unsubscribe, go to
http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com
and follow the instructions there.
Hi Bob
Yeah. because we essentially have a sampled system, so I expect
multiples of the injection source.
This is a sample rate clock, and so spurs that fall at 50% of the sample
rate are OK. spurs that fall at 25% of the sample clock will appear in
the PB. Which really tells me I need to have the injection oscillator at
1/2 the VCO freq . to avoid all problems. which means x2 x2 and
assocated filtering before the injection. I'll go back to thinking about
doubling/ multiplication and filtering.
Given that spurs are on known frequencys, a set of symmetrically placed
zeros either side of the output will generate a broad bandpass in the
middle. No need for a sharp filter at least for the 1st pair of unwanted
products....
maybe continue with you off list
cheers
On 31/07/2020 01:32, Bob kb8tq wrote:
Hi
On Jul 30, 2020, at 7:56 AM, glen english LIST glenlist@cortexrf.com.au wrote:
Before I commit the soldering iron, can anyone share their sub-harmonic injection locking experiences ?
I have to make 393.216 from 49.152 .
Yes, lots of ways.... I know.
injection locked at 1/8 of the frequency from the decent source.
There wont be any issue of locking to the wrong harmonic, the VCO will be on the money.I was thinking of using a dielectric loaded TEM resonator or TEM coax line VCO .
and why do this : ?
- I need all the non related spurs to be > 115dB down.
A sub-harmonic injection locked oscillator can / does have spurs at the injection frequency and
it’s multiples ……
Bob
-
a double-double-double could work, but my experience is for x2 x2 x2 I really need to filter well at each stage to avoid sum and difference products.. which might be OK for this application , especially if I filter really well after the first x2 . but avoid if I can. filters at 908 MHz need space, and shield cans where it is going.
-
and I dont know too much about phase noise and SRD or varactor multipliers. but maybe that's an option.
-
my attempts at generating low phase noise x6 with class C multipliers has been dismal.
-
onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.
-
sure I can use a good PLL and a external VCO, but if my N value is fixed, and I can use injection locking, why bother with the PLL chip that is likely to introduce PD related spurs anyway.
regards
glen
time-nuts mailing list -- time-nuts@lists.febo.com
To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com
and follow the instructions there.
On Thu, 30 Jul 2020 21:56:42 +1000
glen english LIST glenlist@cortexrf.com.au wrote:
- a double-double-double could work, but my experience is for x2 x2 x2 I
really need to filter well at each stage to avoid sum and difference
products.. which might be OK for this application , especially if I
filter really well after the first x2 . but avoid if I can. filters at
908 MHz need space, and shield cans where it is going.
Frequency multiplying would be probably the easiest to get low noise,
followed by a well designed PLL system. Though -115dBc spurs is tough,
- and I dont know too much about phase noise and SRD or varactor
multipliers. but maybe that's an option.
SDR are prety low noise. From NLTLs we know that varactor systems can
exhibit increased flicker noise levels (probably due to bias point
instability).
-
onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.
-
sure I can use a good PLL and a external VCO, but if my N value is
fixed, and I can use injection locking, why bother with the PLL chip
that is likely to introduce PD related spurs anyway.
The generic way in this case is to build a PLL using frequency multiplier
for the reference and a narrow loop filter after the phase detector.
Placing zeros at the multiples of the (unmultiplied) reference frequency
in the loop filter will reduce the spurs quite considerably.
Injection locking is finicky. To injection lock, the resonator has to be
pretty much on frequency to begin with, and kept that way. But unlike with
other systems, you have no feedback system where get information how far
off you are to control the frequency. Unless you build a hybrid system
of an oscialltor with a Pound lock[5,6] (e.g. like cryogenic sapphire oscillators use[7])
You want to read Adler's paper[1] at the very least before you start.
A look at the work byHuntoon/Weiss[2] and Kurokawa[3,4] is probably also beneficial.
Attila Kinali
[1] "A Study of Locking Phenomena in oscillators", by Robert Adler, 1946 (reprinted 1973)
[2] "Synchornization of Ocillators", By Huntoon and Weiss, 1947
[3] "Injection Locking of Microwave Solid-State Oscillators", by Kurokawa, 1973
[4] "Noise in Synchronized Oscillators", by Kurokawa, 1968
[5] "Electronic Frequency Stabilization of Microwave Oscillators", by Pound, 1946
http://dx.doi.org/10.1063/1.1770414
[6] "Frequency-Stabilized Oscillator Unit Notes and Instructions", by Lawrance, 1946
https://dspace.mit.edu/bitstream/handle/1721.1/5024/1/RLE-TR-022-14254857.pdf
[7] "An Ultra-Low Noise Microwave Oscillator Based on a High-Q Liquid Nitrogen Cooled
Sapphire Resonator", by Woode, Tobar, Ivanov, 1995
--
Science is made up of so many things that appear obvious
after they are explained. -- Pardot Kynes
Hi Attila
thanks for your input. and thanks for the links !
I'll meet my low-spec option using ADF4356 integer mode, and a 394 MHz
off the self $2 SAW filter on the output.
That is what I'll do for the moment. I have the ADF4356 here on a eval
board ADI lent me. It is not bad for an internal VCO chip. makes 126/
10k @ 400 megs. Actually the Hittite HMC1033 is slightly better but 26
weeks..... Discrete VCO using a TriTech TEM resonator (Q=400 400 MHz)
was good also, with integer PLL chip. Maybe use a ceramic resonator up
at 1.6 GHz where there is more Q and the chips are designed for the 1-4
GHz VCO input (LTC6945 etc)
When I need to get the 5kHz to 100kHz noise down, I'l probably go for
direct multiplication.
73
On 8/1/2020 2:06 PM, Attila Kinali wrote:
On Thu, 30 Jul 2020 21:56:42 +1000
glen english LIST glenlist@cortexrf.com.au wrote:
- a double-double-double could work, but my experience is for x2 x2 x2 I
really need to filter well at each stage to avoid sum and difference
products.. which might be OK for this application , especially if I
filter really well after the first x2 . but avoid if I can. filters at
908 MHz need space, and shield cans where it is going.
Frequency multiplying would be probably the easiest to get low noise,
followed by a well designed PLL system. Though -115dBc spurs is tough,
- and I dont know too much about phase noise and SRD or varactor
multipliers. but maybe that's an option.
SDR are prety low noise. From NLTLs we know that varactor systems can
exhibit increased flicker noise levels (probably due to bias point
instability).
-
onboard VCO chip/PLLs have all sorts of unrelated spurs in the output.
-
sure I can use a good PLL and a external VCO, but if my N value is
fixed, and I can use injection locking, why bother with the PLL chip
that is likely to introduce PD related spurs anyway.
The generic way in this case is to build a PLL using frequency multiplier
for the reference and a narrow loop filter after the phase detector.
Placing zeros at the multiples of the (unmultiplied) reference frequency
in the loop filter will reduce the spurs quite considerably.
Injection locking is finicky. To injection lock, the resonator has to be
pretty much on frequency to begin with, and kept that way. But unlike with
other systems, you have no feedback system where get information how far
off you are to control the frequency. Unless you build a hybrid system
of an oscialltor with a Pound lock[5,6] (e.g. like cryogenic sapphire oscillators use[7])
You want to read Adler's paper[1] at the very least before you start.
A look at the work byHuntoon/Weiss[2] and Kurokawa[3,4] is probably also beneficial.
Attila Kinali
[1] "A Study of Locking Phenomena in oscillators", by Robert Adler, 1946 (reprinted 1973)
[2] "Synchornization of Ocillators", By Huntoon and Weiss, 1947
[3] "Injection Locking of Microwave Solid-State Oscillators", by Kurokawa, 1973
[4] "Noise in Synchronized Oscillators", by Kurokawa, 1968
[5] "Electronic Frequency Stabilization of Microwave Oscillators", by Pound, 1946
http://dx.doi.org/10.1063/1.1770414
[6] "Frequency-Stabilized Oscillator Unit Notes and Instructions", by Lawrance, 1946
https://dspace.mit.edu/bitstream/handle/1721.1/5024/1/RLE-TR-022-14254857.pdf
[7] "An Ultra-Low Noise Microwave Oscillator Based on a High-Q Liquid Nitrogen Cooled
Sapphire Resonator", by Woode, Tobar, Ivanov, 1995