Controlling FEI 5680A
I have no expertise when it comes to filter design or programming PIC's or
other micro controllers. But I know what works for me. For 11 years I have
been using Shera controllers with very good results. (I still have some new
assembled extra A&A boards, if any one is interested, please contact me
off list) Over the years I have made hardware work around's and made my own
boards ending up with 120 and 240 samples and 100 MHz clock in stead of 24
MHz. Over time chips are harder to get. The solution is an Altera MAX 3000
gate array and that input circuit can be implemented on a $ 2 100 MHz
version or $ 5 200 MHz version using either a 100 MHz or 200 MHz clock. That
circuit works with the present Shera PIC but that is a 28 pin $ 4 device.
Since in this application the controller does not have to be all things
for all devices it would make sense to use a PIC16F688 or any other 14 pin
device. Brooks, if so inclined could do it or some one else if he would
allow it. For my personal use I can live with the present PIC and the work
around's that I have incorporated. The result is a $ 35 solution using an
analog output.
I have laid out a board that once I know the pin assignments I will
gladly have made and furnish with G/A to the individual that will do the design.
An analog portion with opto couplers is also included.
The Gate Array solution is thanks to Juerg Koegel, a list member that has
worked with me on the Dual Mixer. The analog portion has been fully
functioning for two years but I had not found some one to test the counter part
with Ulrich's or Stable 32 plotter. Thanks to Juerg that is now done. Found
out that I had made a mistake in my thought process but we now have a fully
functioning counter with nice plotting results. Again thanks to Juerg a G/A
have replaced logic chips that soon may be hard to get. The first boards
are in and test results will be available soon. This is a 2 channel counter
in the ping pong mode that can be switched from period to phase allowing
set up with out the use of any other counter. 1 E-15 and 5 E-16 will be
available.
Juerg is also helping me with the what I call the Austron circuit allowing
1E-12 resolution in one second. The first unit was a direct copy of the
Austron 2110 circuit using a dual stage Xtal filter the next one will use a
DDS for the offset. This will happen after the 5 channel counter test which
will allow cross correlation and 3 corner hat testing. Board is laid and
G/A's designed but we are waiting till the 2 channel is fully tested.
Juerg is also working on an interface board that will have a LCD display
and USB memory stick interface. That allows the D/M be operated independent
of a PC with plotting done by the PC after the test run, transferring the
data with the USB stick. RS232 or blue tooth is also an option. Richard
McCorkle was key in the design of the counters, thanks to his PIC expertise.
With out him the low cost solution would not have been possible.
This work will be followed by the Austron circuit and hopefully by a low
cost control loop.
Questions have been asked as to what I use for frequency testing. Because
of my work on signal generators I rely heavily on a HP 5345A counter that
gives me 40 GHz measurement capability. It with its internal 500MHz
reciprocal counting capability injecting noise into the 500 MHz it allows me 1 E
-12 over 1000 seconds. Combined with the Tracor 527E I can get 1 E-16 with the
last two digits of not much use. I like the 1000 sec gate time since it in
effect does some averaging. My testing of the 56680A is done with the 5345
with out the Tracor.
I also use the Austron 2110 for longer time testing. In the past it was
tied to Loran C now to Tbolt.
As frequency sources I use a HP 5061 B, HP 5062 C a FRK-H using a Shera
controller and Tbolt. The FRK is presently out on loan. In the past I used a
GPS receiver, now I use the Tbolt. The plan is to have it tested against a
Maser.
I hope this answers a lot of questions. What is needed is that some one
steps up to the plate and does the controller. To me the appeal is the $15
solution.
Bert Kehren
On Sat, 14 Jan 2012 07:32:15 -0500, EWKehren-YDxpq3io04c wrote:
I hope this answers a lot of questions. What is needed is that some one
steps up to the plate and does the controller. To me the appeal is the
$15 solution.
Bert Kehren
This might be a serious overkill ....
But it has built in jtag - AD & DAC can run 168Mhz ,
has 32bit timers (TIC) and serious horsepower
http://www.st.com/internet/evalboard/product/252419.jsp
$20
http://parts.digikey.com/1/parts/2484058-eval-kit-stm32f-discovery-stm32f4discovery.html
CFO (Time nut beginner)
That is a serious little processor for that kind of money.
On 1/14/2012 4:26 PM, cfo wrote:
On Sat, 14 Jan 2012 07:32:15 -0500, EWKehren-YDxpq3io04c wrote:
I hope this answers a lot of questions. What is needed is that some one
steps up to the plate and does the controller. To me the appeal is the
$15 solution.
Bert Kehren
This might be a serious overkill ....
But it has built in jtag - AD& DAC can run 168Mhz ,
has 32bit timers (TIC) and serious horsepower
http://www.st.com/internet/evalboard/product/252419.jsp
$20
http://parts.digikey.com/1/parts/2484058-eval-kit-stm32f-discovery-stm32f4discovery.html
CFO (Time nut beginner)
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
On 01/14/2012 01:32 PM, EWKehren@aol.com wrote:
I have no expertise when it comes to filter design or programming PIC's or
other micro controllers. But I know what works for me. For 11 years I have
been using Shera controllers with very good results. (I still have some new
assembled extra A&A boards, if any one is interested, please contact me
off list)
Designing a PI-regulator in digital is pretty simple and works well.
The core routine that needs to be run at the steady sample rate is this:
Ph = getPD();
FI = FI + IPh;
F = FI + PPh;
outputFreq(F);
where I and P gives the steering properties of the PI regulator.
There is a few things to consider, such as the scaling and width.
An implementational benefit of the above is that the integrator steering
is done prior to the integrator, which makes the integrator state FI
have static dynamics in relationship to the steering parameter I, which
is practical as change of I (which is typically useful to change
bandwidth) will not require rescaling of FI to maintain the same frequency.
The relationship between P and I sets the damping factor of the loop.
The loop bandwidth changes with the square root of I.
It's not too hard to use a quick track-in mode with higher bandwidth and
then scale it to slower mode.
To achieve a quicker track-in of far-distance, diffrentiating the phase
over time can be done, and then feed the integrator loop the scaled
difference. That way will the frequency difference measured (complete
with phase-wraps) steer the frequency state of the integrator and once
the FLL is well tracked in the phase tracking just takes over. The FLL
part can then be removed to reduce disturbances.
Cheers,
Magnus
On Sat, Jan 14, 2012 at 4:32 AM, EWKehren@aol.com wrote:
I have no expertise when it comes to filter design or programming PIC's or
other micro controllers. But I know what works for me. For 11 years I have
been using Shera controllers with very good results. (I still have some new
assembled extra A&A boards, if any one is interested, please contact me
off list) Over the years I have made hardware work around's and made my own
boards ending up with 120 and 240 samples and 100 MHz clock in stead of 24
MHz. Over time chips are harder to get. The solution is an Altera MAX 3000
gate array and that input circuit can be implemented on a $ 2 100 MHz
version or $ 5 200 MHz version using either a 100 MHz or 200 MHz clock. That
circuit works with the present Shera PIC but that is a 28 pin $ 4 device.
Since in this application the controller does not have to be all things
for all devices it would make sense to use a PIC16F688 or any other 14 pin
device.
Have you thought about putting the PIC INSIDE the Altera FPGA?
It's a common trick to implement a microcontroller in the FPGA and you
can get the code for just about any CPU core online. Here is an
example of "virtual PIC":
http://www.embeddedtronics.com/pic_core.html
If the PIC fits inside then that is one less chip on the PCB. The
example above found that could run the virtual PIC a little faster
than a real pic so you don't give up any performance
--
Chris Albertson
Redondo Beach, California
On Sat, Jan 14, 2012 at 1:26 PM, cfo xnews2@luna.kyed.com wrote:
On Sat, 14 Jan 2012 07:32:15 -0500, EWKehren-YDxpq3io04c wrote:
I hope this answers a lot of questions. What is needed is that some one
steps up to the plate and does the controller. To me the appeal is the
$15 solution.
I'm working on this, slowly. But when I'm done it won't be $15, for
like $50 or $70. I'll use a small general purpose uP development
board. I don't want to design a PCB.
The above is the second version. The first version will be done using
LabVIEW on a 27 inch iMac using a PicTic II as the phase detector. If
you've not seen Labview have a look here
http://www.ni.com/labview/whatis/
Chris Albertson
Redondo Beach, California
Not over kill at all. It is worth paying a few $$ not to have to
design a PCB. Worse then that is that most will take shortcuts and
design it so that you need a sppepcial IC programmer to program the
PIC. Thee $20 development boards allow you to download the firmware
over USB so users can do it themselves.
I'm looking at this pair of boards:
http://arduino.cc/en/Main/ArduinoEthernetShield
http://arduino.cc/en/Main/ArduinoBoardUno
Ethernet and and SD card slot might seem overkill too. But I want to
track performance, read out the phase difference over time and so one.
So I want to be able to connect a desktop computer and a USB cable is
to short. Ethernet will let me check from work or with my phone.
the SD card can be used to log data. Likely hold a two years of data
on a 8GB card.
I want to try and apply the saw tooth correction from the GPS. For
that I will need a uP that cad read data from the Thunderbolt's or the
Oncore's serial port.
One important thing. It would be good if the software where easy to
modify be most "normal" people. My hope is that if it is easy enough
then several people will and they will share their work. The Arduino
is very east to program.
On Sat, Jan 14, 2012 at 1:26 PM, cfo xnews2@luna.kyed.com wrote:
On Sat, 14 Jan 2012 07:32:15 -0500, EWKehren-YDxpq3io04c wrote:
I hope this answers a lot of questions. What is needed is that some one
steps up to the plate and does the controller. To me the appeal is the
$15 solution.
Bert Kehren
This might be a serious overkill ....
But it has built in jtag - AD & DAC can run 168Mhz ,
has 32bit timers (TIC) and serious horsepower
http://www.st.com/internet/evalboard/product/252419.jsp
$20
http://parts.digikey.com/1/parts/2484058-eval-kit-stm32f-discovery-stm32f4discovery.html
CFO (Time nut beginner)
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
--
Chris Albertson
Redondo Beach, California
On 01/15/2012 05:48 AM, Chris Albertson wrote:
On Sat, Jan 14, 2012 at 4:32 AM,EWKehren@aol.com wrote:
I have no expertise when it comes to filter design or programming PIC's or
other micro controllers. But I know what works for me. For 11 years I have
been using Shera controllers with very good results. (I still have some new
assembled extra A&A boards, if any one is interested, please contact me
off list) Over the years I have made hardware work around's and made my own
boards ending up with 120 and 240 samples and 100 MHz clock in stead of 24
MHz. Over time chips are harder to get. The solution is an Altera MAX 3000
gate array and that input circuit can be implemented on a $ 2 100 MHz
version or $ 5 200 MHz version using either a 100 MHz or 200 MHz clock. That
circuit works with the present Shera PIC but that is a 28 pin $ 4 device.
Since in this application the controller does not have to be all things
for all devices it would make sense to use a PIC16F688 or any other 14 pin
device.
Have you thought about putting the PIC INSIDE the Altera FPGA?
It's a common trick to implement a microcontroller in the FPGA and you
can get the code for just about any CPU core online. Here is an
example of "virtual PIC":
http://www.embeddedtronics.com/pic_core.html
If the PIC fits inside then that is one less chip on the PCB. The
example above found that could run the virtual PIC a little faster
than a real pic so you don't give up any performance
A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might
be tempting, but I consider any clone "dirty" from a rights perspective,
MIPS for instance have been very protective on their side, so has ARM.
So far has the SPARC been the only big one being accepted in their
LEON-x variants that I know of. We be sad to see the cotton industry
level being smashed by the big firm lawyers.
So, either using the OpenRISC variants or similar. There is loads of
CPUs on the OpenCores website, but just because they are there do not
think they are free to use if they are clones of commercial stuff.
I would either use one of the FPGA vendors CPUs and then write the core
in C, or use a free CPU.
I could also roll my own CPU, as I have already done before, but
building a tool-chain including GCC is a bit of home-work. For my
application I haven't bothered, but it is tempting to get C capabilities.
Then again, if someone could show that the PIC and/or AVR is free to
clone in FGPA, by showing a clear statement from the respective
technology holders, then that would be a way forward.
I've done this analysis before, and so far I have not seen any
comprehensive open analysis covering these aspects.
I fear that this is way off topic for this list, so I propose that this
aspects is continued on another list, such as the FPGA-Synth list, which
faces essentially the same problems.
Cheers,
Magnus
On Sun, 15 Jan 2012 16:45:56 +0100, Magnus Danielson wrote:
I could also roll my own CPU, as I have already done before, but
building a tool-chain including GCC is a bit of home-work. For my
application I haven't bothered, but it is tempting to get C
capabilities.
How about the new Zylin CPU.
http://opensource.zylin.com/zpu.htm
... That said ....
But i can't do a FPGA board@home (multilayer).
That's why i think the idea of using the STM32F4-Discovery board ,
or even an Arduino (both around $20).
With a "Baseboard" that can be etched@home or ordered somewhere.
Would be a lot more interesting , for a normal hobbyist.
A lot of the "nice offers" from BatchPcb etc. is not optimal , for
European nuts (im in Denmark).
Partly due to 25% VAT , but mostly the handling fee that the Post/Mail is
allowed to charge for handling the VAT (in DK it's $25) + the 25% VAT.
So a solution where the parts could also be bought in EU , would be nice.
Rgds
CFO - Timenut beginner in DK.
I would just use a PIC, AVR, or ARM even if I had to use more than one
with some discrete logic on the side but I like solder, assembly, and
low level coding in that order. If I find a small, cheap, easy to
use, and general purpose FPGA, I may look into that as well.
MIPS may be a special case for implementation. The original Loongson
design (Chinese) lacked 4 instructions that MIPS still had IP
protection on.
On Sun, 15 Jan 2012 16:45:56 +0100, Magnus Danielson
magnus@rubidium.dyndns.org wrote:
A short notice on embedded CPU/MPUs into FPGAs. Using PIC or AVR might
be tempting, but I consider any clone "dirty" from a rights perspective,
MIPS for instance have been very protective on their side, so has ARM.
So far has the SPARC been the only big one being accepted in their
LEON-x variants that I know of. We be sad to see the cotton industry
level being smashed by the big firm lawyers.
So, either using the OpenRISC variants or similar. There is loads of
CPUs on the OpenCores website, but just because they are there do not
think they are free to use if they are clones of commercial stuff.
I would either use one of the FPGA vendors CPUs and then write the core
in C, or use a free CPU.
I could also roll my own CPU, as I have already done before, but
building a tool-chain including GCC is a bit of home-work. For my
application I haven't bothered, but it is tempting to get C capabilities.
Then again, if someone could show that the PIC and/or AVR is free to
clone in FGPA, by showing a clear statement from the respective
technology holders, then that would be a way forward.
I've done this analysis before, and so far I have not seen any
comprehensive open analysis covering these aspects.
I fear that this is way off topic for this list, so I propose that this
aspects is continued on another list, such as the FPGA-Synth list, which
faces essentially the same problems.