As always, "without degrading the phase noise" is only half of the spec.
The other half is "at offsets of X Hz and beyond."  What is X?  It can make
all the difference.

I'd look at using a PLL to lock a 100 MHz VCXO to your 10 MHz source.  If
you are willing to lock one crystal oscillator to another, the loop
bandwidth can be made very low, ruling out any noise degradation at the
offsets you're most likely to be interested in.

State-of-the-art in low-noise harmonic multiplication seems to be the
nonlinear transmission-line multipliers sold by Picosecond Pulse Labs, but
they are targeted at GHz-and-up applications.  Perhaps there are ways to
realize similar structures with varicaps and lumped inductors in the
HF-to-lower-VHF region...?

-- john, KE5FX

Stephan Sandenbergh wrote:

I remember that article from when it was first published.  It is
quite clever, but has no special phase noise advantage compared
to any other passive limiter or passive frequency doubler based
on a full wave rectifier.

You need to be more specific about your multiplier requirements.
When I worked for Zeta Labs, we used to get vague RFQ's like this for
multipliers, and then have to develop a specification.  That is
almost more difficult that actually building the multiplier.
Are you after good Allan deviation or low phase noise?  Do you
care about phase noise floor?  How clean is the original oscillator?
In the HP 8662, they double a 10811 three times to 80 MHz and then
strip off the phase noise floor sidebands with a crystal filter.

Regarding X10:  I suggest you double to 20 MHz, take that as an
intermediate output, and then quadruple the 20 MHz to 80 MHz.
Then mix the 80 and 20 to get 100 MHz.  As far as heroically
multiplying directly by 5:  been there, done that, got the coffee
mug and T-shirt.  Don't do this at home kids.

Rick Karlquist N6RK

Stephan Sandenbergh wrote:

Stephen

Use a Wenzel style odd order multiplier to multiply by 5 after a
frequency doubler.
For the frequency doubler either use a diode frequency doubler followed
by an amplifier or a JFET push-push pair with common source RF feedback
as a frequency doubler. The JFET frequency doubler will have very low
phase noise if designed properly. For circuit see:

http://www.febo.com/time-nuts/Bruce_Griffiths/JFET_frequency_doublers

It is also possible to use a pair of bipolar transistors in a pushpush
doubler with common emitter RF feedback, the phase noise will also be
very low, however biasing the bipolar transistors is a little more
difficult than biasing a pair of FETS.

Bruce

Hi Rick,

You are absolutely right - I should've mentioned the specs first.

It is an Oscilloqaurtz 8788 locked to GPS.

Phase noise at 10MHz:
Hz dBc/Hz
1 -100
10 -130
100 -152
1e3 -160
1e4 -165
1e5 -165
1e6  -165

Allan dev: < 1.10e-12 (not locked)

I suspect that it shouldn't be too hard to preserve these specs. (that is
apart from the obvious 20dBc/Hz increase due to the 10x multiplication).

Noise floor is of importance since I'm clocking ADCs and DDSs. These are
affected by high frequency jitter. I've got more than one of these
crystals/ADCs/DDSs which I would like to keep reasonably synced (the reason
for the common-view GPS) so the longer time scales are also important.

I just noted that the noise level of that diode multiplier in the previously
mentioned article is way below that of my OCXO. From there my curiosity.

I agree that phase-locking to 100MHz oscillator is the best way to go, but
as a first iteration multiplication is a good start.

Judging by your reply the x2 and x5 approach should probably be avoided?

Regards,

Stephan.

Stephan Sandenbergh wrote:

Stephan

The problem is essentially the difficulty in filtering out all the
unwanted harmonics.
Using a high Q bandpass filter will increase the phase instability due
to temperature variations and drift.
Even reactive components contribute phase noise which is exacerbated in
a high Q tuned circuit.

It is better from the phase noise perspective to use notch filters to
attenuate the unwanted harmonics and subharmonics rather than a high Q
bandpass filter tuned to the desired frequency.

The filtering problem is made worse by the fact that the unwanted lower
harmonics all have larger amplitudes than the desired 5th harmonic.

Multiplying by 2 in a balanced circuit ensures that the fundamental
content of the output is suppressed by 20dB or more with respect to the
second harmonic and all higher harmonics have significantly lower
amplitudes than the 2nd. A balanced circuit also suppresses the odd
harmonics.

As far as low phase noise dividers are concerned conjugate regenerative
dividers can have significantly lower noise than digital dividers.
However these dividers are quite complex as they use a mixer plus at
least one amplifier a phase shifter or two and a pair of bandpass
filters. Adjusting them for low noise operation isn't easy.

Bruce

Hi Bruce,

Thanks for explaining - the picture is starting to become clearer. I knew
there must be a reason why commercial multipliers are so expensive.

If I understand you correctly the variation in phase (or group delay) caused
by a variation in temperature messes with the Allan deviation. I can see
that a high Q filter will probably have a quite sensitive temperature/phase
dependency. I guess that crystal filters will also have a large
temperature/phase dependency. The other side of the coin is that unfiltered
harmonics ruins the phase noise.

I now also understand the merit of Rick's suggestion - it avoids odd-order
multiplication all together.

Thanks for the doubler circuit you posted - it seems quite nifty.

Maybe my best option (from a design time/cost point of view) is to double to
20MHz and then buy the commercial x5 to get a 100MHz?

Regards,

Stephan.

On Thu, 1 Mar 2007 01:19:31 +0200, "Stephan Sandenbergh"
stephan@rrsg.ee.uct.ac.za wrote:

WA1ZMS has successfully done the kind of thing you want to do. He used a
clean 5 MHz OCXO as a source to generate milimeter wave LO's. See the
doubler and direct synthesizers shown here:

http://www.mgef.org/zms_134_VUCC.htm
and
http://www.mgef.org/zms_241_vucc.htm

In addition to a doubler, one of those schemes uses x9 and another x11.
Seems to me that a similar approach with x2 followed by x5 might be
worth trying. Note that he does use a crystal as a filter on the output.

I intended to try this approach myself last fall, but got distracted
before the actual experiments. I still plan to try it soon.

Stephan Sandenbergh wrote:

Stephan

Its not just the temperature coefficients, real inductors and capacitors
have inherent phase noise.
Silver mica capacitors can be very bad as are ferrite core inductors.
Mylar capacitors are good as are NP0/C0G ceramics and X7R is acceptable
for low impedance coupling and decoupling.
Air core and iron powder core inductors are good.

Bruce

Hi foks,

I want to put forward a similar but slightly different question:

Suppose I need an clock running at around 50 Mhz for an DDS. Because of
the DDS it need not be exactly 50 MHz, can be 52 or 54 MHz too.
Basically this clock shall be derived from a 10 MHz source (OCXO,
Rubidium...) The OUTPUT of the DDS is to be used as an frequency
standard, with the DDS being an complete digital steering circuit.
If I have the choice to use

a) an harmonic X5 multiplier for the 10 MHz signal

or

b) a 54 MHz VCXO with the following specs: 0.8 ps RMS jitter, noise
floor -145 db @ 100 kHz offset phase locked to the 10 MHz

what is the prefered solution? Or is the answer dependent on what I plan
to use the frequency standard for?

TIA
Ulrich Bangert, DF6JB

On Fri, Mar 02, 2007 at 04:02:39AM +1300, Dr Bruce Griffiths wrote:

This is intriguing, and something I'd really not thought about.

Care to elaborate as to magnitudes and nature of such random 

presumptive variations in capacitance/inductance - does the sideband
energy induced by  these effects roll off with  rapidly with increasing
frequency or extend up to tens of  kHz or MHz ?    What causes them ?
Are they actual small random changes in capacitance or inductance or a
more complex non-linear physical effect involving energy storage
mechanisms ?

 On another point I can certainly see the issues with long time

constant phase shifts through narrow crystal bandpass filters with hi Q
resonances caused by thermal shifts in component values, but do real
world crystal "clean-up" filters actually contribute significant short
term (say 1 Hz and above) phase modulation ?    Many RF applications
care deeply about absolutely minimized levels of energy say 1 Hz to 100
kHz or more from the carrier but could care less about absolute phase
relative to a reference (or Allen Deviation measured with taus in
hours).  Thus the thermal changes aren't important, but modulation at
much higher frequencies is.  And yes I can see that vibration makes
crystal clean up filters a problem... at least for systems subject to
enough to cause microphonic effects.

I had never thought about relative performance issues of using a

VCXO locked with a really narrow band PLL to a lower frequency reference
versus  a multiplier with a narrow band cleanup filter at the output...
other than to realize that unless one uses a more complex PLL design
really narrow band loops implemented extremely straightforwardly
(perhaps to the point of idiocy) require the higher frequency VCXO to be
accurately on frequency within the low pass bandwidth else the loop
won't capture. This gets a bit dicey if one is talking 1 Hz or less at
100 MHz.

And of course if the loop bandwidth is wider, then the phase

noise in that wider bandwidth is more or less the phase noise of the
reference times the multiplying factor and not just the phase noise of
the VXCO..  But yes, these days a loop can be designed to handle this
capture issue with a little more effort...

--
Dave Emery N1PRE,  die@dieconsulting.com  DIE Consulting, Weston, Mass 02493
"An empty zombie mind with a forlorn barely readable weatherbeaten
'For Rent' sign still vainly flapping outside on the weed encrusted pole - in
celebration of what could have been, but wasn't and is not to be now either."

Pete wrote:

Pete

Try

http://tf.nist.gov/timefreq/general/pdf/1244.pdf

This is an update on a brief mention in a paper published about 20 years
earlier which contained few details, other than a cryptic statement that
a large proportion of silver mica capacitors had large phase noise.

Bruce

David I. Emery wrote:

David

Even vibration isolated isothermal constant temperature crystals exhibit
phase noise.
The components exhibit fluctuations in reactance.
The additional phase noise decreases with frequency offset, but if you
are multiplying by 100x or so, even the phase noise at an offset of
100Hz at the reference frequency may be a problem see:

http://tf.nist.gov/timefreq/general/pdf/1244.pdf

Bruce

Ulrich Bangert wrote:

Ulrich

Whilst in general the answer does depend on the application the
following observations concerning the phase noise floor of the ~50MHz
signal may be useful.

With a state of the art OCXO with a phase noise floor of less than
-170dBc/Hz multiplying by 5 with a low phase noise multiplier will raise
the phase noise floor to around -156dBc/Hz somewhat less than that of
your proposed VCXO. However if your 10MHz standard has a phase noise
floor higher than -160dBc/Hz the 54MHz VCXO will have a lower phase
noise floor.

The phase noise at offsets closer to the carrier will usually be less
when multiplying a low noise 10MHz reference than for a higher VCXO.

If you only need to adjust the frequency by a few ppm then one can
cleanup the spurs and phase noise of a DDS reducing them to very low
levels by using a cascaded mix and divide technique like that in:

http://www.karlquist.com/FCS95.pdf

With such a circuit you can achieve a phase noise floor (if you use
appropriate dividers especially in the last stage) approaching that of a
good OCXO.
With this technique there is no need to use a ~ 50MHz reference for the
DDS if all you want is a corrected 10MHz signal.

Bruce

Bruce,

thank you for your help! Since it is not known a priori what kind of
source will serve for the 10 MHz input I must take into account that it
is not the absolute state of art. Since the VCXO solution is not far
away from state of the art I consider it the better general choice.

I know Rick's papers about synthesizers since a few years and I have
been impressed by them a lot. Until now I have been thinking that the
complexity with the additional mixers, buffers and filters is to high
but perhaps I am going to re-think it. The private lessons that I
received from you concerning low noise amplification make at least the
buffer part a handable task.

Best regards
Ulrich Bangert

http://www.karlquist.com/FCS95.pdf

With such a circuit you can achieve a phase noise floor (if you use
appropriate dividers especially in the last stage) approaching that of a

good OCXO.
With this technique there is no need to use a ~ 50MHz reference for the
DDS if all you want is a corrected 10MHz signal.

Bruce

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