Hi,
Anders Wallin has details of a commercially available time stamping counter
that will do a proper ADEV measurement. He also includes links to other
interesting sources.
Search for:
CONT vs RCON mode on the 53230A frequency counter
<http://www.anderswallin.net/2015/06/cont-vs-rcon-mode-on-the-53230a-frequen
cy-counter/> - anderswallin.net
1604.05076.pdf (arxiv.org) https://arxiv.org/pdf/1604.05076.pdf
Lew
Lewis
The interesting source you referred to contained a slide deck which
turned out to be a gold mine for a novice like me.
http://rubiola.org/pdf-slides/2012T-IFCS-Counters.pdf
This should be on leapsecond
Many thanks!!!!
Erik.
On 10-11-2021 19:36, Lewis Masters wrote:
Hi,
Anders Wallin has details of a commercially available time stamping counter
that will do a proper ADEV measurement. He also includes links to other
interesting sources.
Search for:
CONT vs RCON mode on the 53230A frequency counter
<http://www.anderswallin.net/2015/06/cont-vs-rcon-mode-on-the-53230a-frequen
cy-counter/> - anderswallin.net
1604.05076.pdf (arxiv.org) https://arxiv.org/pdf/1604.05076.pdf
Lew
time-nuts mailing list -- time-nuts@lists.febo.com -- To unsubscribe send an email to time-nuts-leave@lists.febo.com
To unsubscribe, go to and follow the instructions there.
Hi,
I strongly recommend the HP AN200 series of application notes. Having
those alongside Enricos slides is a good start for those new in the field.
There is one variant of averaging which is used in the HP5328A/B
counters that is described there that is not covered in Enrico Rubiolas
otherwise excellent set of slides.
A more updated version exist in the Rohde, Rubiola, Whitaker "Microwave
and Wireless Syntesizers" book. The PDEV was not published in 2012, but
came in 2014. PDEV is now included in the IEEE 1139 draft, going through
the voting process.
Many modern counters have used the method of charging a capactor and
then read that charge out either as a pulse (Nutt interpolator) or
through A/D conversion such as SR-620, Pendulum/Fluke CNT-80/81/90/91
and Wavecrest DTS and SIAs. Modern FPGA based tapped delay was used
already in HP5371A but is now used in FPGA and ASIC for higher
resolution and is for sure comming along strong in commercial and
academic counters.
Cheers,
Magnus
On 2021-11-11 16:02, Erik Kaashoek wrote:
Lewis
The interesting source you referred to contained a slide deck which
turned out to be a gold mine for a novice like me.
http://rubiola.org/pdf-slides/2012T-IFCS-Counters.pdf
This should be on leapsecond
Many thanks!!!!
Erik.
On 10-11-2021 19:36, Lewis Masters wrote:
Hi,
Anders Wallin has details of a commercially available time stamping
counter
that will do a proper ADEV measurement. He also includes links to other
interesting sources.Search for:
CONT vs RCON mode on the 53230A frequency counter
<http://www.anderswallin.net/2015/06/cont-vs-rcon-mode-on-the-53230a-frequency-counter/> - anderswallin.net
1604.05076.pdf (arxiv.org) https://arxiv.org/pdf/1604.05076.pdf
Lew
time-nuts mailing list -- time-nuts@lists.febo.com -- To unsubscribe
send an email to time-nuts-leave@lists.febo.com
To unsubscribe, go to and follow the instructions there.
time-nuts mailing list -- time-nuts@lists.febo.com -- To unsubscribe
send an email to time-nuts-leave@lists.febo.com
To unsubscribe, go to and follow the instructions there.