Discussion and technical support related to USRP, UHD, RFNoC
View all threadsHi,
We received our N320 and started doing some basic RX tests on it and everything seems ok. We were able to get an emitted chirp and display it using GQRX.
However, when calling the set_rx_bandwidth() UHD function and then reading the actual RX bandwidth, it always read back 250MHz. Using rx_samples_to_file example and with a --bw=1e6 parameter, I obtain the output:
....
Setting RX Bandwidth: 1.000000 MHz...
Actual RX Bandwidth: 250.000000 MHz...
....
Is this normal or a bug? If it is a bug, does this have an impact on the acquisition, if yes what is this impact?
We tested both the HG and the XQ FPGA bitstreams and we use UHD 3.14.0.0 on both the N320 and the host, obtaining the same behavior in all cases.
Thank you in advance for your answer!
David T.
Hi David,
The N320 has a discrete component daughterboard and does not support
setting a bandwidth filter.
The RFIC based USRPs such as the B2xx, E31x, E320 (AD9361) and N300/N310
(AD9371) support the set_rx_bandwidth API call.
Regards,
Nate Temple
On Fri, Sep 6, 2019 at 4:55 AM Truan David via USRP-users <
usrp-users@lists.ettus.com> wrote:
Hi,
We received our N320 and started doing some basic RX tests on it and
everything seems ok. We were able to get an emitted chirp and display it
using GQRX.
However, when calling the set_rx_bandwidth() UHD function and then reading
the actual RX bandwidth, it always read back 250MHz. Using
rx_samples_to_file example and with a --bw=1e6 parameter, I obtain the
output:
....
Setting RX Bandwidth: 1.000000 MHz...
Actual RX Bandwidth: 250.000000 MHz...
....
Is this normal or a bug? If it is a bug, does this have an impact on the
acquisition, if yes what is this impact?
We tested both the HG and the XQ FPGA bitstreams and we use UHD 3.14.0.0
on both the N320 and the host, obtaining the same behavior in all cases.
Thank you in advance for your answer!
David T.
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