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X310 FPGA build issue

LP
Laurent Perpete
Thu, Jan 4, 2018 12:01 PM

Hello,

I am starting a project on the X310. I have installed the followed the "Getting Started with RFNoC Development" tutorial. It all looks fine until I try to build an FPGA image.

When I execute:
./uhd_image_builder.py window fft -d x310 -t X310_RFNOC_HG -m 5 --fill-with-fifos -clean-all
Vivado starts generating the IP cores and fails after generating the one_gig_eth_pcs_pma IP core.

Essentially, some example files are expected to be generated under build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma_example/
Instead some example files are generated under build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma/example_design/

Has anyone experienced this?

Any help would be greatly appreciated, having spent several hours trying to resolve the issue. (See transcript below)

Laurent

--Using the following blocks to generate image:
* window
* fft
Adding CE instantiation file for 'X310_RFNOC_HG'
changing temporarily working directory to /home/lp78/rfnoc/src/uhd-fpga/usrp3/tools/scripts/../../top/x300
Setting up a 64-bit FPGA build environment for the USRP-X3x0...

  • Vivado: Found (/opt/Xilinx/Vivado/2015.4/bin)
  • Vivado HLS: Found (/opt/Xilinx/Vivado_HLS/2015.4/bin)

Environment successfully initialized.
Cleaning targets and IP...
make -f Makefile.x300.inc bin NAME=X310_RFNOC_HG ARCH=kintex7 PART_ID=xc7k410t/ffg900/-2 BUILD_1G=1 BUILD_10G=1 SFP0_1GBE=1 SFP1_10GBE=1  RFNOC=1 X310=1 EXTRA_DEFS="BUILD_1G=1 BUILD_10G=1 SFP0_1GBE=1 SFP1_10GBE=1  RFNOC=1 X310=1"
make[1]: Entering directory '/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300'
BUILDER: Checking tools...

  • GNU bash, version 4.3.48(1)-release (x86_64-pc-linux-gnu)
  • Python 2.7.12
  • Vivado v2015.4 (64-bit)

---=======================
BUILDER: Building IP ten_gig_eth_pcs_pma

---=======================
BUILDER: Staging IP in build directory...
BUILDER: Reserving IP location: /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/ten_gig_eth_pcs_pma
BUILDER: Retargeting IP to part kintex7/xc7k410t/ffg900/-2...
BUILDER: Building IP...
[00:00:00] Executing command: vivado -mode batch -source /home/lp78/rfnoc/src/uhd-fpga/usrp3/tools/scripts/viv_generate_ip.tcl -log ten_gig_eth_pcs_pma.log -nojournal
[...]
[00:07:22] Process terminated. Status: Success

---=======================
Warnings:          11
Critical Warnings:  0
Errors:            0

BUILDER: Releasing IP location: /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/ten_gig_eth_pcs_pma

---=======================
BUILDER: Building IP one_gig_eth_pcs_pma

---=======================
BUILDER: Staging IP in build directory...
BUILDER: Reserving IP location: /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma
BUILDER: Retargeting IP to part kintex7/xc7k410t/ffg900/-2...
BUILDER: Building IP...
[00:00:00] Executing command: vivado -mode batch -source /home/lp78/rfnoc/src/uhd-fpga/usrp3/tools/scripts/viv_generate_ip.tcl -log one_gig_eth_pcs_pma.log -nojournal
[...]
[00:06:19] Process terminated. Status: Success

---=======================
Warnings:          4
Critical Warnings:  0
Errors:            0

BUILDER: Releasing IP location: /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma
cp /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma_example/one_gig_eth_pcs_pma_example.srcs/sources_1/imports/example_design/support/one_gig_eth_pcs_pma_clocking.v /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma_example/one_gig_eth_pcs_pma_example.srcs/sources_1/imports/example_design/support/one_gig_eth_pcs_pma_clocking.v.orig
cp: cannot stat '/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma_example/one_gig_eth_pcs_pma_example.srcs/sources_1/imports/example_design/support/one_gig_eth_pcs_pma_clocking.v': No such file or directory
/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/ip/one_gig_eth_pcs_pma/Makefile.inc:46: recipe for target '/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma/one_gig_eth_pcs_pma.xci.out' failed
make[1]: *** [/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma/one_gig_eth_pcs_pma.xci.out] Error 1
make[1]: Leaving directory '/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300'
Makefile:93: recipe for target 'X310_RFNOC_HG' failed
make: *** [X310_RFNOC_HG] Error 2

Hello, I am starting a project on the X310. I have installed the followed the "Getting Started with RFNoC Development" tutorial. It all looks fine until I try to build an FPGA image. When I execute: ./uhd_image_builder.py window fft -d x310 -t X310_RFNOC_HG -m 5 --fill-with-fifos -clean-all Vivado starts generating the IP cores and fails after generating the one_gig_eth_pcs_pma IP core. Essentially, some example files are expected to be generated under build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma_example/ Instead some example files are generated under build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma/example_design/ Has anyone experienced this? Any help would be greatly appreciated, having spent several hours trying to resolve the issue. (See transcript below) Laurent --Using the following blocks to generate image: * window * fft Adding CE instantiation file for 'X310_RFNOC_HG' changing temporarily working directory to /home/lp78/rfnoc/src/uhd-fpga/usrp3/tools/scripts/../../top/x300 Setting up a 64-bit FPGA build environment for the USRP-X3x0... - Vivado: Found (/opt/Xilinx/Vivado/2015.4/bin) - Vivado HLS: Found (/opt/Xilinx/Vivado_HLS/2015.4/bin) Environment successfully initialized. Cleaning targets and IP... make -f Makefile.x300.inc bin NAME=X310_RFNOC_HG ARCH=kintex7 PART_ID=xc7k410t/ffg900/-2 BUILD_1G=1 BUILD_10G=1 SFP0_1GBE=1 SFP1_10GBE=1 RFNOC=1 X310=1 EXTRA_DEFS="BUILD_1G=1 BUILD_10G=1 SFP0_1GBE=1 SFP1_10GBE=1 RFNOC=1 X310=1" make[1]: Entering directory '/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300' BUILDER: Checking tools... * GNU bash, version 4.3.48(1)-release (x86_64-pc-linux-gnu) * Python 2.7.12 * Vivado v2015.4 (64-bit) ======================================================== BUILDER: Building IP ten_gig_eth_pcs_pma ======================================================== BUILDER: Staging IP in build directory... BUILDER: Reserving IP location: /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/ten_gig_eth_pcs_pma BUILDER: Retargeting IP to part kintex7/xc7k410t/ffg900/-2... BUILDER: Building IP... [00:00:00] Executing command: vivado -mode batch -source /home/lp78/rfnoc/src/uhd-fpga/usrp3/tools/scripts/viv_generate_ip.tcl -log ten_gig_eth_pcs_pma.log -nojournal [...] [00:07:22] Process terminated. Status: Success ======================================================== Warnings: 11 Critical Warnings: 0 Errors: 0 BUILDER: Releasing IP location: /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/ten_gig_eth_pcs_pma ======================================================== BUILDER: Building IP one_gig_eth_pcs_pma ======================================================== BUILDER: Staging IP in build directory... BUILDER: Reserving IP location: /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma BUILDER: Retargeting IP to part kintex7/xc7k410t/ffg900/-2... BUILDER: Building IP... [00:00:00] Executing command: vivado -mode batch -source /home/lp78/rfnoc/src/uhd-fpga/usrp3/tools/scripts/viv_generate_ip.tcl -log one_gig_eth_pcs_pma.log -nojournal [...] [00:06:19] Process terminated. Status: Success ======================================================== Warnings: 4 Critical Warnings: 0 Errors: 0 BUILDER: Releasing IP location: /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma cp /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma_example/one_gig_eth_pcs_pma_example.srcs/sources_1/imports/example_design/support/one_gig_eth_pcs_pma_clocking.v /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma_example/one_gig_eth_pcs_pma_example.srcs/sources_1/imports/example_design/support/one_gig_eth_pcs_pma_clocking.v.orig cp: cannot stat '/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma_example/one_gig_eth_pcs_pma_example.srcs/sources_1/imports/example_design/support/one_gig_eth_pcs_pma_clocking.v': No such file or directory /home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/ip/one_gig_eth_pcs_pma/Makefile.inc:46: recipe for target '/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma/one_gig_eth_pcs_pma.xci.out' failed make[1]: *** [/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300/build-ip/xc7k410tffg900-2/one_gig_eth_pcs_pma/one_gig_eth_pcs_pma.xci.out] Error 1 make[1]: Leaving directory '/home/lp78/rfnoc/src/uhd-fpga/usrp3/top/x300' Makefile:93: recipe for target 'X310_RFNOC_HG' failed make: *** [X310_RFNOC_HG] Error 2