On 1/19/18 11:31 AM, Tom Van Baak wrote:

What about the plethora of LVDS receivers - they're basically a
differential input thresholder, with deliberate hysteresis, looking for
a 300 mV shift across a 100 ohm resistor.

Plenty fast (GHz)

On 1/19/18 11:31 AM, Tom Van Baak wrote:

There are tons of LVDS that run on 3.3 or 5V, Maxim, TI both have parts.

The first Maxim part google turned up with "LVDS receiver" was a quad,
esd protected unit good to 400 MHz, 2ns prop delay, 50mV hysteresis.

You do want to watch the common mode voltages - some of the parts are
not good about having the signals swing near the rails (or beyond).

Tom,

I recently built such a device using a couple of stages of a 74HC04,
with the RF input to the 1st stage AC coupled and the input biased
by a high-value (a couple of megohms) resistor feeding back from
the output of the first inverter stage to the input of that stage.  It's so
dirt simple, it's hard to beat.

I was not particularly concerned about jitter, so if you're not already
familiar enough with the circuit to know whether or not it's good
enough, it might be worth a try.  BTW, I am running at 10 MHz from
a PRS-10 Rb, and just wanted something to drive a count-down
chain. And there's always the 74AC04 if you wanted faster edges.

Dana Whitlow

On Fri, Jan 19, 2018 at 1:31 PM, Tom Van Baak tvb@leapsecond.com wrote:

In message 898171c2-0e9a-6a2a-dcfc-b7d893f8942f@earthlink.net, jimlux writes:

I played with that, I used a small transformer to balance the signal
and then into LVDS receiver through a voltage divider.  Worked well,
but I didn't measure the jitter, it was just for a micro-controller.

--
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In message 63ae173b-93f4-ffe4-ddf1-655761665df6@earthlink.net, jimlux writes:

Also be aware that specs are for balanced input signals, if you tie
one of the inputs to a threshold voltage, published specs may not apply,
in particular speed.

--
Poul-Henning Kamp      | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG        | TCP/IP since RFC 956
FreeBSD committer      | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

On 1/19/18 12:54 PM, Poul-Henning Kamp wrote:

You can also do it with capacitive dc block to one side, and some
resistors - the ap notes describe it.  The receivers are a fairly high Z
input, so you pick the voltage divider resistors to make the termination
resistance right for the incoming signal.

On 2018-01-19 14:31, Tom Van Baak wrote:

I am using Wenzel approach without modification to drive it from +5V. I
didn't see any issues for my applications (usually it perform
sine-to-square conversion from OCXO to feed MCU clock).

--
WBW,

V.P.

SN65LVDS34D

--- Graham / KE9H

==

On Fri, Jan 19, 2018 at 3:45 PM, Vlad time@patoka.org wrote:

Tom
What's the input signal amplitude?
What's the desired output signal (eg 5V CMOS, 3.3V CMOS etc)?
Bruce

Am 19.01.2018 um 20:31 schrieb Tom Van Baak:

<     http://cds.linear.com/docs/en/datasheet/6957fb.pdf >
<     http://cds.linear.com/docs/en/design-note/dn514f.pdf >

I have used it, found no problems. It is somewhat small :-)

regards, Gerhard

It's for a typical 5 or 10 MHz OCXO / Rb / Cs with sinewave output; say, 1 Vpp. The output should be 3.3 or 5 V depending on what the MCU needs. It doesn't have to have stunning performance: think breadboard, PIC, Arduino sort of stuff. I was looking for something in a PDIP-8 package; the same as all the picDIV or picPET chips I use. That's why older parts like µA9637 / DS9637 came to mind.

/tvb

Now, if one added an optional TTL threshold 5V CMOS single gate inverter/buffer to produce 5V output when required and added an SMT 5V->3.3V regulator and mounted it all on a small PCB with pins to make it DIP compatible that would meet the brief and then some.

Otherwise an SMT (not many DIP ones left) comparator mounted on a DIP/SMT converter board would also work albeit with a PN/jitter performance penalty.

Bruce

A fast DIP comparator such as an LT1016 should work but it won't perform well without an effective ground plane.

If a CMOS gate is used then a low Q LC impedance step up network or equivalent will be needed to increase the signal swing at the gate input. Add a couple of schottky diode clamps for overvoltage clamping (internal CMOS gate clamp devices usually degrade performance if they conduct).

Bruce

Bob

With a 1V p-p sort of output, a simple matching network will get you into the 4 to 6V p-p range.
Drive that into a 5V compatible CMOS gate and move on …. If you have a super hot output, put
a 3 db pad on it.

Bob

Something like the attached circuit is suitable for  driving the MCU clock input directly.
The diodes should be schottky signal diodes like the 1N5711 series. The series resistors limit the diode peak current and the CLK input protection network current. It should work with inputs from 1V pp to 8Vpp. If SMT components were used it should all fit on a DIP compatible daughter board.

Bruce

Hi

Unless you really beat on the thing for days on end, you can do without the 330 ohm and 100 ohm
resistors (along with the two diodes). Most modern gates have pretty robust protection diodes. The
source impedance is high enough after the transform that the available current is pretty low. On a
NC7SZ125 the negative diode is rated for 50 ma max and the positive diode is rated for 20 ma

Some math:

If the two 1K’s properly terminate the circuit, you have a 250 ohm source. (500 ohm load and 500 ohm
transformed from the sine input). A 1V overdrive (1/2 V + and 1/2 V -) will put 2 ma into the diodes on the
peaks.  The more likely case is that the negative is hit a bit harder. The bias is most likely a bit below
1/2 Vcc for best symmetry.

None of this is to say you should hit the diodes. No matter what sort they are, the performance will
degrade a bit when you do. How much is of course a “that depends”. Most of us are not driving the
gate with a -180 dbc/Hz source and expecting -177 out of the gate.

Bob

That network was for a 10MHz input.

For 5MHz double the L and C values.

For 3.3V one could use a lower step up say from  50 to 400 ohms rather than from 50 to 800 ohms.

1uH and 150pF and change 1k6 resistors to 820R.

Swap the 5V supply for a 3.3V supply.

L and C values aren't critical 5% or somewhat looser tolerance should be suffice.

Bruce

Even the modern PICs spec 50mA max input currents.
Simulation indicates 20mA peak diode currents without the 330 ohm resistors for a 2V pp input, even more for higher input signal levels. If one can guarantee that input is around 1V pp then the extra diodes and resistors aren't required. If its possible that an input of 16dBm or more may be used then the extra diodes and resistors are required. I simulated the circuit for inputs up to +22dBm.
Current flowing in the IC protection diodes can degrade the timing jitter substantially (tens of picosec for HCMOS).

Bruce

Hi

My main point is that a +22 dbm (or even 16 dbm) OCXO is a very rare item. If your
signal generator is set to +22 dbm … shame on you. If the part can do well over +7 to
+13 dbm, that will cover the vast majority of the 10 MHz oscillators / signal sources out there.

Bob