On Tue, Jul 24, 2012 at 7:28 AM, Chris Wilson chris@chriswilson.tv wrote:

Get a solderless bread board place the 7400 TTL divider chip on that
and power it with a wall wort cube.  Mount it with sticky tape on the
back of the counter.    Should take all of about 30 minutes to
assemble.

The next step up is mount some BHC and coaxial power jacks manhattan
style n a some PCB stock then super-glue the 7400 chips leads-up (dead
bugs)  that might take an hour.

Either way no half finished project if you don't stop until you are done.
Chris Albertson
Redondo Beach, California

Didn't know about that, and i was at David's house last week, as
well... Hmmm! Sounds the way to go, I'll e-mail him later, thank you
Adrian.

24/07/2012 19:13

--
Best Regards,
Chris Wilson.

Chris,

A PIC requires 4 clock cycles per instruction which limits the
maximum output rate a PIC can provide as partial instruction
times can't be used. With a 10 MHz input each instruction takes
400ns and if duty cycle isn't an issue nop instructions can be
added each loop to extend the cycle period giving the following
maximum PIC output rates with a 10 MHz clock.

2 instructions  1.25 MHz    50% duty cycle
3 instructions  833.333 KHz  33% duty cycle
4 instructions  625 KHz      25% duty cycle
5 instructions  500 KHz      20% duty cycle

While a PIC can produce almost any division ratio for slower
output rates the 4 clocks per instruction time limits the
maximum rate a PIC can produce and generating a 1 MHz output
with a 10 MHz clock is not an option.

Richard

The PIC has a 4:1 external clock / internal instruction cycle ratio so a software-based divider can't divide by a low number like 10. See www.LeapSecond.com/picdiv for details, and source code.

Although initially intended as a 1 PPS divider, the [re]programmable PIC and TAPR T2-Mini make a compact frequency divider solution for frequencies from once a day to 100 kHz.

As far as frequencies close to 10 MHz -- I assumed that division by 2 (e.g., 10 MHz -> 5 MHz) or division by 10 (e.g., 10 MHz -> 1 MHz) were simple to implement using a single IC (one flip-flop or decade counter). The '7490 or '390 come to mind.

/tvb

TVB can give a better answer, but in general the number of clock cycles
required per instruction limits the minimum divide ratio.

Tom whipped up a special PIC to get the highest possible output rate for
a set of tests we were doing, and given the 20 MHz maximum input clock,
we got about 800 kHz output.

John

On 7/24/2012 1:05 PM, Chris Hoffman, KG6O wrote:

Hi

With some micros you can play with the PWM outputs to get a bit faster than the instruction cycle would allow. There are always constraints (like binary division) on that as well.

Bob

On Jul 24, 2012, at 5:21 PM, John Ackermann N8UR wrote:

A part like any the Cypress PSoC family is much more flexible (but potentially
harder to program) than the PIC because it has hardware blocks that can be
made to do very useful work independent of the processor. The processor can run
on its internal RC oscillator while one digital block would take an external
clock and divide it down by any value up to 256. Like the PIC software is free
and development tools can be had at low cost. 

Bob L.

To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Tue, July 24, 2012 2:51:00 PM
Subject: Re: [time-nuts] What's the easiest way to divide by 10 forThunderbolt
reference output?