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View all threadsProblems getting started with RFNoC
RK
Rob Kossler
Thu, Dec 15, 2016 9:08 PM
Hi,
Today I tried to get started using RFNoC and so I followed instructions in
[1]. In the section "Getting started with UHD development" (just prior to
talking about using GNU Radio), my progress came to a halt. Here are the
issues:
- uhd_usrp_probe --init-only results:
- Actually this is in the prior section but it is likely relevant
- The list of blocks shown in the getting started doc are (Radio_0,
Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and NullSrcSink_0) - When I run this command, first of all I don't see a list at the end
as described. But, if I dig through the output, I can find
evidence of the
following blocks (DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and
DUC_1) - I'm wondering it this difference in output is expected
- The list of blocks shown in the getting started doc are (Radio_0,
- In the section in question, the document mentions two programs,
"rx_samples_to_file" and "rfnoc_nullsource_ce_rx" as examples for getting
started- For "rx_samples_to_file", I think this is a typo (or stale
information). The correct program, I think, is "rfnoc_rx_to_file".
However, I'm not sure what I can do with this example given the
block list
that seems to be in my FPGA. Since there are no FFT, FIR, FIFO,
or Window
blocks, I'm not sure what block I could stick in between the
radio and the
host as the example suggests. - For "rfnoc_nullsource_ce_rx", I think that this program will not
run with the current blocks in the FPGA. I get the error "Error: Device
has no null block." which I assume is caused by this FPGA not having the
expected block that is the default of this example program.
- For "rx_samples_to_file", I think this is a typo (or stale
I'm guessing that the issue here is that things move pretty quickly with
RFNoC and the documentation sometimes lags reality. However, I wanted to
verify this before going too much further in case my setup is not correct.
It appears to me there is not too much I can play around with regarding
RFNoC without having Vivado avail to compile new images. Is this correct?
Rob
Hi,
Today I tried to get started using RFNoC and so I followed instructions in
[1]. In the section "Getting started with UHD development" (just prior to
talking about using GNU Radio), my progress came to a halt. Here are the
issues:
- uhd_usrp_probe --init-only results:
- Actually this is in the prior section but it is likely relevant
- The list of blocks shown in the getting started doc are (Radio_0,
Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and NullSrcSink_0)
- When I run this command, first of all I don't see a list at the end
as described. But, if I dig through the output, I can find
evidence of the
following blocks (DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and
DUC_1)
- I'm wondering it this difference in output is expected
- In the section in question, the document mentions two programs,
"rx_samples_to_file" and "rfnoc_nullsource_ce_rx" as examples for getting
started
- For "rx_samples_to_file", I think this is a typo (or stale
information). The correct program, I think, is "rfnoc_rx_to_file".
However, I'm not sure what I can do with this example given the
block list
that seems to be in my FPGA. Since there are no FFT, FIR, FIFO,
or Window
blocks, I'm not sure what block I could stick in between the
radio and the
host as the example suggests.
- For "rfnoc_nullsource_ce_rx", I think that this program will not
run with the current blocks in the FPGA. I get the error "Error: Device
has no null block." which I assume is caused by this FPGA not having the
expected block that is the default of this example program.
I'm guessing that the issue here is that things move pretty quickly with
RFNoC and the documentation sometimes lags reality. However, I wanted to
verify this before going too much further in case my setup is not correct.
It appears to me there is not too much I can play around with regarding
RFNoC without having Vivado avail to compile new images. Is this correct?
Rob
[1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
SG
Sugandha Gupta
Thu, Dec 15, 2016 9:52 PM
It depends on what image you loaded. If you loaded the default image,
what you are saying is correct. It will have DDC, DUC.
While building the image, if you run make X310_HG - The blocks that get
populated come from top/x300/rfnoc_ce_default_inst_x310.v - DMA_FIFO,
Radio_0, Radio_1, DDC_0, DDC_1, etc.
While if you run make X310_RFNOC_HG - The blocks get populated
from top/x300/rfnoc_ce_auto_inst_x310.v - Radio_0, Radio_1, AddSub_0,
FIR_0, etc.
Yes, for those examples to run, you would need to build images with the
specific blocks in it. You would need Vivado to compile images for you and
you can add whatever blocks you want as described above.
On Thu, Dec 15, 2016 at 1:08 PM, Rob Kossler via USRP-users <
usrp-users@lists.ettus.com> wrote:
Hi,
Today I tried to get started using RFNoC and so I followed instructions in
[1]. In the section "Getting started with UHD development" (just prior to
talking about using GNU Radio), my progress came to a halt. Here are the
issues:
- uhd_usrp_probe --init-only results:
- Actually this is in the prior section but it is likely relevant
- The list of blocks shown in the getting started doc are (Radio_0,
Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and NullSrcSink_0)
- When I run this command, first of all I don't see a list at the
end as described. But, if I dig through the output, I can find evidence of
the following blocks (DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and
DUC_1)
- I'm wondering it this difference in output is expected.
- In the section in question, the document mentions two programs,
"rx_samples_to_file" and "rfnoc_nullsource_ce_rx" as examples for getting
started
- For "rx_samples_to_file", I think this is a typo (or stale
information). The correct program, I think, is "rfnoc_rx_to_file".
However, I'm not sure what I can do with this example given the block list
that seems to be in my FPGA. Since there are no FFT, FIR, FIFO, or Window
blocks, I'm not sure what block I could stick in between the radio and the
host as the example suggests.
- For "rfnoc_nullsource_ce_rx", I think that this program will not
run with the current blocks in the FPGA. I get the error "Error: Device
has no null block." which I assume is caused by this FPGA not having the
expected block that is the default of this example program.
I'm guessing that the issue here is that things move pretty quickly with
RFNoC and the documentation sometimes lags reality. However, I wanted to
verify this before going too much further in case my setup is not correct.
It appears to me there is not too much I can play around with regarding
RFNoC without having Vivado avail to compile new images. Is this correct?
Rob
[1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
--
Sugandha Gupta
Staff Software Engineer
Ettus Research
>> It depends on what image you loaded. If you loaded the default image,
what you are saying is correct. It will have DDC, DUC.
While building the image, if you run make X310_HG - The blocks that get
populated come from top/x300/rfnoc_ce_default_inst_x310.v - DMA_FIFO,
Radio_0, Radio_1, DDC_0, DDC_1, etc.
While if you run make X310_RFNOC_HG - The blocks get populated
from top/x300/rfnoc_ce_auto_inst_x310.v - Radio_0, Radio_1, AddSub_0,
FIR_0, etc.
>> Yes, for those examples to run, you would need to build images with the
specific blocks in it. You would need Vivado to compile images for you and
you can add whatever blocks you want as described above.
On Thu, Dec 15, 2016 at 1:08 PM, Rob Kossler via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
> Today I tried to get started using RFNoC and so I followed instructions in
> [1]. In the section "Getting started with UHD development" (just prior to
> talking about using GNU Radio), my progress came to a halt. Here are the
> issues:
>
> - uhd_usrp_probe --init-only results:
> - Actually this is in the prior section but it is likely relevant
> - The list of blocks shown in the getting started doc are (Radio_0,
> Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and NullSrcSink_0)
> - When I run this command, first of all I don't see a list at the
> end as described. But, if I dig through the output, I can find evidence of
> the following blocks (DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and
> DUC_1)
> - I'm wondering it this difference in output is expected.
>
>
> - In the section in question, the document mentions two programs,
> "rx_samples_to_file" and "rfnoc_nullsource_ce_rx" as examples for getting
> started
> - For "rx_samples_to_file", I think this is a typo (or stale
> information). The correct program, I think, is "rfnoc_rx_to_file".
> However, I'm not sure what I can do with this example given the block list
> that seems to be in my FPGA. Since there are no FFT, FIR, FIFO, or Window
> blocks, I'm not sure what block I could stick in between the radio and the
> host as the example suggests.
> - For "rfnoc_nullsource_ce_rx", I think that this program will not
> run with the current blocks in the FPGA. I get the error "Error: Device
> has no null block." which I assume is caused by this FPGA not having the
> expected block that is the default of this example program.
>
> I'm guessing that the issue here is that things move pretty quickly with
> RFNoC and the documentation sometimes lags reality. However, I wanted to
> verify this before going too much further in case my setup is not correct.
> It appears to me there is not too much I can play around with regarding
> RFNoC without having Vivado avail to compile new images. Is this correct?
>
> Rob
>
> [1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
>
>
>
> _______________________________________________
> USRP-users mailing list
> USRP-users@lists.ettus.com
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
--
Sugandha Gupta
Staff Software Engineer
Ettus Research
RK
Rob Kossler
Thu, Dec 15, 2016 10:09 PM
ok. Sounds like my installation is behaving as expected and that there is
no point in playing around with examples (uhd or GNU Radio) prior to
compiling a non-default FPGA image.
However, I do want to point out that the getting started documentation
talks about experimenting with these examples prior to discussing the
building of new images. So, to me it is misleading.
Rob
On Thu, Dec 15, 2016 at 4:52 PM, Sugandha Gupta sugandha.gupta@ettus.com
wrote:
It depends on what image you loaded. If you loaded the default image,
what you are saying is correct. It will have DDC, DUC.
While building the image, if you run make X310_HG - The blocks that get
populated come from top/x300/rfnoc_ce_default_inst_x310.v - DMA_FIFO,
Radio_0, Radio_1, DDC_0, DDC_1, etc.
While if you run make X310_RFNOC_HG - The blocks get populated
from top/x300/rfnoc_ce_auto_inst_x310.v - Radio_0, Radio_1, AddSub_0,
FIR_0, etc.
Yes, for those examples to run, you would need to build images with the
specific blocks in it. You would need Vivado to compile images for you and
you can add whatever blocks you want as described above.
On Thu, Dec 15, 2016 at 1:08 PM, Rob Kossler via USRP-users <
usrp-users@lists.ettus.com> wrote:
Hi,
Today I tried to get started using RFNoC and so I followed instructions
in [1]. In the section "Getting started with UHD development" (just prior
to talking about using GNU Radio), my progress came to a halt. Here are
the issues:
- uhd_usrp_probe --init-only results:
- Actually this is in the prior section but it is likely relevant
- The list of blocks shown in the getting started doc are
(Radio_0, Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and NullSrcSink_0)
- When I run this command, first of all I don't see a list at the
end as described. But, if I dig through the output, I can find evidence of
the following blocks (DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and
DUC_1)
- I'm wondering it this difference in output is expected.
- In the section in question, the document mentions two programs,
"rx_samples_to_file" and "rfnoc_nullsource_ce_rx" as examples for getting
started
- For "rx_samples_to_file", I think this is a typo (or stale
information). The correct program, I think, is "rfnoc_rx_to_file".
However, I'm not sure what I can do with this example given the block list
that seems to be in my FPGA. Since there are no FFT, FIR, FIFO, or Window
blocks, I'm not sure what block I could stick in between the radio and the
host as the example suggests.
- For "rfnoc_nullsource_ce_rx", I think that this program will not
run with the current blocks in the FPGA. I get the error "Error: Device
has no null block." which I assume is caused by this FPGA not having the
expected block that is the default of this example program.
I'm guessing that the issue here is that things move pretty quickly with
RFNoC and the documentation sometimes lags reality. However, I wanted to
verify this before going too much further in case my setup is not correct.
It appears to me there is not too much I can play around with regarding
RFNoC without having Vivado avail to compile new images. Is this correct?
Rob
[1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
--
Sugandha Gupta
Staff Software Engineer
Ettus Research
ok. Sounds like my installation is behaving as expected and that there is
no point in playing around with examples (uhd or GNU Radio) prior to
compiling a non-default FPGA image.
However, I do want to point out that the getting started documentation
talks about experimenting with these examples prior to discussing the
building of new images. So, to me it is misleading.
Rob
On Thu, Dec 15, 2016 at 4:52 PM, Sugandha Gupta <sugandha.gupta@ettus.com>
wrote:
>
> >> It depends on what image you loaded. If you loaded the default image,
> what you are saying is correct. It will have DDC, DUC.
>
> While building the image, if you run make X310_HG - The blocks that get
> populated come from top/x300/rfnoc_ce_default_inst_x310.v - DMA_FIFO,
> Radio_0, Radio_1, DDC_0, DDC_1, etc.
>
> While if you run make X310_RFNOC_HG - The blocks get populated
> from top/x300/rfnoc_ce_auto_inst_x310.v - Radio_0, Radio_1, AddSub_0,
> FIR_0, etc.
>
> >> Yes, for those examples to run, you would need to build images with the
> specific blocks in it. You would need Vivado to compile images for you and
> you can add whatever blocks you want as described above.
>
>
>
> On Thu, Dec 15, 2016 at 1:08 PM, Rob Kossler via USRP-users <
> usrp-users@lists.ettus.com> wrote:
>
>> Hi,
>> Today I tried to get started using RFNoC and so I followed instructions
>> in [1]. In the section "Getting started with UHD development" (just prior
>> to talking about using GNU Radio), my progress came to a halt. Here are
>> the issues:
>>
>> - uhd_usrp_probe --init-only results:
>> - Actually this is in the prior section but it is likely relevant
>> - The list of blocks shown in the getting started doc are
>> (Radio_0, Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and NullSrcSink_0)
>> - When I run this command, first of all I don't see a list at the
>> end as described. But, if I dig through the output, I can find evidence of
>> the following blocks (DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and
>> DUC_1)
>> - I'm wondering it this difference in output is expected.
>>
>>
>> - In the section in question, the document mentions two programs,
>> "rx_samples_to_file" and "rfnoc_nullsource_ce_rx" as examples for getting
>> started
>> - For "rx_samples_to_file", I think this is a typo (or stale
>> information). The correct program, I think, is "rfnoc_rx_to_file".
>> However, I'm not sure what I can do with this example given the block list
>> that seems to be in my FPGA. Since there are no FFT, FIR, FIFO, or Window
>> blocks, I'm not sure what block I could stick in between the radio and the
>> host as the example suggests.
>> - For "rfnoc_nullsource_ce_rx", I think that this program will not
>> run with the current blocks in the FPGA. I get the error "Error: Device
>> has no null block." which I assume is caused by this FPGA not having the
>> expected block that is the default of this example program.
>>
>> I'm guessing that the issue here is that things move pretty quickly with
>> RFNoC and the documentation sometimes lags reality. However, I wanted to
>> verify this before going too much further in case my setup is not correct.
>> It appears to me there is not too much I can play around with regarding
>> RFNoC without having Vivado avail to compile new images. Is this correct?
>>
>> Rob
>>
>> [1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
>>
>>
>>
>> _______________________________________________
>> USRP-users mailing list
>> USRP-users@lists.ettus.com
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>>
>
>
> --
> Sugandha Gupta
> Staff Software Engineer
> Ettus Research
>
MB
Martin Braun
Fri, Dec 16, 2016 11:28 PM
Rob,
you're right. The long story is, before we merged RFNoC back into maint
and master, we had an easy separation. Now, we have too many blocks to
all put into a single image, so we haven't come up with a good way to
serve everything for all examples.
Cheers,
Martin
On 12/15/2016 02:09 PM, Rob Kossler via USRP-users wrote:
ok. Sounds like my installation is behaving as expected and that there
is no point in playing around with examples (uhd or GNU Radio) prior to
compiling a non-default FPGA image.
However, I do want to point out that the getting started documentation
talks about experimenting with these examples prior to discussing the
building of new images. So, to me it is misleading.
Rob
On Thu, Dec 15, 2016 at 4:52 PM, Sugandha Gupta
<sugandha.gupta@ettus.com mailto:sugandha.gupta@ettus.com> wrote:
It depends on what image you loaded. If you loaded the default
image, what you are saying is correct. It will have DDC, DUC.
While building the image, if you run make X310_HG - The blocks that
get populated come from top/x300/rfnoc_ce_default_inst_x310.v -
DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, etc.
While if you run make X310_RFNOC_HG - The blocks get populated
from top/x300/rfnoc_ce_auto_inst_x310.v - Radio_0, Radio_1,
AddSub_0, FIR_0, etc.
Yes, for those examples to run, you would need to build images
with the specific blocks in it. You would need Vivado to compile
images for you and you can add whatever blocks you want as described
above.
On Thu, Dec 15, 2016 at 1:08 PM, Rob Kossler via USRP-users
<usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
Hi,
Today I tried to get started using RFNoC and so I followed
instructions in [1]. In the section "Getting started with UHD
development" (just prior to talking about using GNU Radio), my
progress came to a halt. Here are the issues:
* uhd_usrp_probe --init-only results:
o Actually this is in the prior section but it is likely
relevant
o The list of blocks shown in the getting started doc are
(Radio_0, Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and
NullSrcSink_0)
o When I run this command, first of all I don't see a list
at the end as described. But, if I dig through the
output, I can find evidence of the following blocks
(DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and DUC_1)
o I'm wondering it this difference in output is expected.
* In the section in question, the document mentions two
programs, "rx_samples_to_file" and "rfnoc_nullsource_ce_rx"
as examples for getting started
o For "rx_samples_to_file", I think this is a typo (or
stale information). The correct program, I think, is
"rfnoc_rx_to_file". However, I'm not sure what I can do
with this example given the block list that seems to be
in my FPGA. Since there are no FFT, FIR, FIFO, or
Window blocks, I'm not sure what block I could stick in
between the radio and the host as the example suggests.
o For "rfnoc_nullsource_ce_rx", I think that this program
will not run with the current blocks in the FPGA. I get
the error "Error: Device has no null block." which I
assume is caused by this FPGA not having the expected
block that is the default of this example program.
I'm guessing that the issue here is that things move pretty
quickly with RFNoC and the documentation sometimes lags
reality. However, I wanted to verify this before going too much
further in case my setup is not correct. It appears to me there
is not too much I can play around with regarding RFNoC without
having Vivado avail to compile new images. Is this correct?
Rob
[1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
<https://kb.ettus.com/RFNoC_Getting_Started_Guides>
_______________________________________________
USRP-users mailing list
USRP-users@lists.ettus.com <mailto:USRP-users@lists.ettus.com>
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
<http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com>
--
Sugandha Gupta
Staff Software Engineer
Ettus Research
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Rob,
you're right. The long story is, before we merged RFNoC back into maint
and master, we had an easy separation. Now, we have too many blocks to
all put into a single image, so we haven't come up with a good way to
serve everything for all examples.
Cheers,
Martin
On 12/15/2016 02:09 PM, Rob Kossler via USRP-users wrote:
> ok. Sounds like my installation is behaving as expected and that there
> is no point in playing around with examples (uhd or GNU Radio) prior to
> compiling a non-default FPGA image.
>
> However, I do want to point out that the getting started documentation
> talks about experimenting with these examples prior to discussing the
> building of new images. So, to me it is misleading.
>
> Rob
>
>
> On Thu, Dec 15, 2016 at 4:52 PM, Sugandha Gupta
> <sugandha.gupta@ettus.com <mailto:sugandha.gupta@ettus.com>> wrote:
>
>
> >> It depends on what image you loaded. If you loaded the default
> image, what you are saying is correct. It will have DDC, DUC.
>
> While building the image, if you run make X310_HG - The blocks that
> get populated come from top/x300/rfnoc_ce_default_inst_x310.v -
> DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, etc.
>
> While if you run make X310_RFNOC_HG - The blocks get populated
> from top/x300/rfnoc_ce_auto_inst_x310.v - Radio_0, Radio_1,
> AddSub_0, FIR_0, etc.
>
> >> Yes, for those examples to run, you would need to build images
> with the specific blocks in it. You would need Vivado to compile
> images for you and you can add whatever blocks you want as described
> above.
>
>
>
> On Thu, Dec 15, 2016 at 1:08 PM, Rob Kossler via USRP-users
> <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
>
> Hi,
> Today I tried to get started using RFNoC and so I followed
> instructions in [1]. In the section "Getting started with UHD
> development" (just prior to talking about using GNU Radio), my
> progress came to a halt. Here are the issues:
>
> * uhd_usrp_probe --init-only results:
> o Actually this is in the prior section but it is likely
> relevant
> o The list of blocks shown in the getting started doc are
> (Radio_0, Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and
> NullSrcSink_0)
> o When I run this command, first of all I don't see a list
> at the end as described. But, if I dig through the
> output, I can find evidence of the following blocks
> (DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and DUC_1)
> o I'm wondering it this difference in output is expected.
>
> * In the section in question, the document mentions two
> programs, "rx_samples_to_file" and "rfnoc_nullsource_ce_rx"
> as examples for getting started
> o For "rx_samples_to_file", I think this is a typo (or
> stale information). The correct program, I think, is
> "rfnoc_rx_to_file". However, I'm not sure what I can do
> with this example given the block list that seems to be
> in my FPGA. Since there are no FFT, FIR, FIFO, or
> Window blocks, I'm not sure what block I could stick in
> between the radio and the host as the example suggests.
> o For "rfnoc_nullsource_ce_rx", I think that this program
> will not run with the current blocks in the FPGA. I get
> the error "Error: Device has no null block." which I
> assume is caused by this FPGA not having the expected
> block that is the default of this example program.
>
> I'm guessing that the issue here is that things move pretty
> quickly with RFNoC and the documentation sometimes lags
> reality. However, I wanted to verify this before going too much
> further in case my setup is not correct. It appears to me there
> is not too much I can play around with regarding RFNoC without
> having Vivado avail to compile new images. Is this correct?
>
> Rob
>
>
> [1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
> <https://kb.ettus.com/RFNoC_Getting_Started_Guides>
>
>
>
> _______________________________________________
> USRP-users mailing list
> USRP-users@lists.ettus.com <mailto:USRP-users@lists.ettus.com>
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> Sugandha Gupta
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> Ettus Research
>
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Martin Braun
Fri, Dec 16, 2016 11:28 PM
Rob,
you're right. The short story is, before we merged RFNoC back into maint
and master, we had an easy separation. Now, we have too many blocks to
all put into a single image, so we haven't come up with a good way to
serve everything for all examples.
Cheers,
Martin
On 12/15/2016 02:09 PM, Rob Kossler via USRP-users wrote:
ok. Sounds like my installation is behaving as expected and that there
is no point in playing around with examples (uhd or GNU Radio) prior to
compiling a non-default FPGA image.
However, I do want to point out that the getting started documentation
talks about experimenting with these examples prior to discussing the
building of new images. So, to me it is misleading.
Rob
On Thu, Dec 15, 2016 at 4:52 PM, Sugandha Gupta
<sugandha.gupta@ettus.com mailto:sugandha.gupta@ettus.com> wrote:
It depends on what image you loaded. If you loaded the default
image, what you are saying is correct. It will have DDC, DUC.
While building the image, if you run make X310_HG - The blocks that
get populated come from top/x300/rfnoc_ce_default_inst_x310.v -
DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, etc.
While if you run make X310_RFNOC_HG - The blocks get populated
from top/x300/rfnoc_ce_auto_inst_x310.v - Radio_0, Radio_1,
AddSub_0, FIR_0, etc.
Yes, for those examples to run, you would need to build images
with the specific blocks in it. You would need Vivado to compile
images for you and you can add whatever blocks you want as described
above.
On Thu, Dec 15, 2016 at 1:08 PM, Rob Kossler via USRP-users
<usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
Hi,
Today I tried to get started using RFNoC and so I followed
instructions in [1]. In the section "Getting started with UHD
development" (just prior to talking about using GNU Radio), my
progress came to a halt. Here are the issues:
* uhd_usrp_probe --init-only results:
o Actually this is in the prior section but it is likely
relevant
o The list of blocks shown in the getting started doc are
(Radio_0, Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and
NullSrcSink_0)
o When I run this command, first of all I don't see a list
at the end as described. But, if I dig through the
output, I can find evidence of the following blocks
(DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and DUC_1)
o I'm wondering it this difference in output is expected.
* In the section in question, the document mentions two
programs, "rx_samples_to_file" and "rfnoc_nullsource_ce_rx"
as examples for getting started
o For "rx_samples_to_file", I think this is a typo (or
stale information). The correct program, I think, is
"rfnoc_rx_to_file". However, I'm not sure what I can do
with this example given the block list that seems to be
in my FPGA. Since there are no FFT, FIR, FIFO, or
Window blocks, I'm not sure what block I could stick in
between the radio and the host as the example suggests.
o For "rfnoc_nullsource_ce_rx", I think that this program
will not run with the current blocks in the FPGA. I get
the error "Error: Device has no null block." which I
assume is caused by this FPGA not having the expected
block that is the default of this example program.
I'm guessing that the issue here is that things move pretty
quickly with RFNoC and the documentation sometimes lags
reality. However, I wanted to verify this before going too much
further in case my setup is not correct. It appears to me there
is not too much I can play around with regarding RFNoC without
having Vivado avail to compile new images. Is this correct?
Rob
[1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
<https://kb.ettus.com/RFNoC_Getting_Started_Guides>
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--
Sugandha Gupta
Staff Software Engineer
Ettus Research
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Rob,
you're right. The short story is, before we merged RFNoC back into maint
and master, we had an easy separation. Now, we have too many blocks to
all put into a single image, so we haven't come up with a good way to
serve everything for all examples.
Cheers,
Martin
On 12/15/2016 02:09 PM, Rob Kossler via USRP-users wrote:
> ok. Sounds like my installation is behaving as expected and that there
> is no point in playing around with examples (uhd or GNU Radio) prior to
> compiling a non-default FPGA image.
>
> However, I do want to point out that the getting started documentation
> talks about experimenting with these examples prior to discussing the
> building of new images. So, to me it is misleading.
>
> Rob
>
>
> On Thu, Dec 15, 2016 at 4:52 PM, Sugandha Gupta
> <sugandha.gupta@ettus.com <mailto:sugandha.gupta@ettus.com>> wrote:
>
>
> >> It depends on what image you loaded. If you loaded the default
> image, what you are saying is correct. It will have DDC, DUC.
>
> While building the image, if you run make X310_HG - The blocks that
> get populated come from top/x300/rfnoc_ce_default_inst_x310.v -
> DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, etc.
>
> While if you run make X310_RFNOC_HG - The blocks get populated
> from top/x300/rfnoc_ce_auto_inst_x310.v - Radio_0, Radio_1,
> AddSub_0, FIR_0, etc.
>
> >> Yes, for those examples to run, you would need to build images
> with the specific blocks in it. You would need Vivado to compile
> images for you and you can add whatever blocks you want as described
> above.
>
>
>
> On Thu, Dec 15, 2016 at 1:08 PM, Rob Kossler via USRP-users
> <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
>
> Hi,
> Today I tried to get started using RFNoC and so I followed
> instructions in [1]. In the section "Getting started with UHD
> development" (just prior to talking about using GNU Radio), my
> progress came to a halt. Here are the issues:
>
> * uhd_usrp_probe --init-only results:
> o Actually this is in the prior section but it is likely
> relevant
> o The list of blocks shown in the getting started doc are
> (Radio_0, Radio_1, AddSub_0, FIR_0, FFT_0,Window_0, and
> NullSrcSink_0)
> o When I run this command, first of all I don't see a list
> at the end as described. But, if I dig through the
> output, I can find evidence of the following blocks
> (DMA_FIFO, Radio_0, Radio_1, DDC_0, DDC_1, DUC_0, and DUC_1)
> o I'm wondering it this difference in output is expected.
>
> * In the section in question, the document mentions two
> programs, "rx_samples_to_file" and "rfnoc_nullsource_ce_rx"
> as examples for getting started
> o For "rx_samples_to_file", I think this is a typo (or
> stale information). The correct program, I think, is
> "rfnoc_rx_to_file". However, I'm not sure what I can do
> with this example given the block list that seems to be
> in my FPGA. Since there are no FFT, FIR, FIFO, or
> Window blocks, I'm not sure what block I could stick in
> between the radio and the host as the example suggests.
> o For "rfnoc_nullsource_ce_rx", I think that this program
> will not run with the current blocks in the FPGA. I get
> the error "Error: Device has no null block." which I
> assume is caused by this FPGA not having the expected
> block that is the default of this example program.
>
> I'm guessing that the issue here is that things move pretty
> quickly with RFNoC and the documentation sometimes lags
> reality. However, I wanted to verify this before going too much
> further in case my setup is not correct. It appears to me there
> is not too much I can play around with regarding RFNoC without
> having Vivado avail to compile new images. Is this correct?
>
> Rob
>
>
> [1] https://kb.ettus.com/RFNoC_Getting_Started_Guides
> <https://kb.ettus.com/RFNoC_Getting_Started_Guides>
>
>
>
> _______________________________________________
> USRP-users mailing list
> USRP-users@lists.ettus.com <mailto:USRP-users@lists.ettus.com>
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
> <http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com>
>
>
>
>
> --
> Sugandha Gupta
> Staff Software Engineer
> Ettus Research
>
>
>
>
> _______________________________________________
> USRP-users mailing list
> USRP-users@lists.ettus.com
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
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