First order approximation would be somewhere around 70dB, since the ADC
is 12-bits wide.

A good thing to look at would be the datasheet for the AD9364, which is
the RF Front-end (including ADCs) used in the B200/B205 seires.

http://www.analog.com/media/en/technical-documentation/data-sheets/AD9364.pdf

On 2016-07-15 11:12, Xingjian Chen via USRP-users wrote:

I don’t know off the top of my head, but I’d start with the schematics and assume the best you can get is what’s specified in the AD9364 data sheet. It has 12-bit ADCs, so start with the usual range formula and then maybe compare with a reference source. Be sure to protect the input with enough attenuation so that if you accidentally crank your sig gen to it’s max output, you won’t blow the AD9364.

Or… jump over to [2][3] and enjoy the fabulous information base :-)

[1] http://files.ettus.com/schematics/b200mini/ http://files.ettus.com/schematics/b200mini/
[2] https://kb.ettus.com/B200/B210/B200mini/B205mini https://kb.ettus.com/B200/B210/B200mini/B205mini
[3] https://kb.ettus.com/images/a/ae/B200mini_B205_RF_Performance_Data_20160119.pdf https://kb.ettus.com/images/a/ae/B200mini_B205_RF_Performance_Data_20160119.pdf

post script… just saw another response that covers my first point.

Steven Knudsen, Ph.D., P.Eng.
www. techconficio.ca
www.linkedin.com/in/knudstevenknudsen

Der entscheidende Augenblick der menschlichen Entwicklung ist immerwährend. Darum sind die revolutionären geistigen Bewegungen, welche alles Frühere für nichtig erklären, im Recht, denn es ist noch nichts geschehen. - Franz Kafka

That depends on the frequency, gain, bandwidth, master clock rate and
sampling rate; no general numbers can be given here.

Generally, refer to the AD9361 datasheet for sampling depth; its ADCs
are 12bit sigma-delta converters; the effective number of bits of the
ADC alone will be lower; the amplifiers in the AD9361 will, depending on
gain, temperature, and frequency, introduce varying amounts of noise,
which will be suppressed by the adjustable analog filters (which work
more or less well depending, again, on frequency).
The resulting noise floor will be suppressed by oversampling – which is
the ratio between master clock rate and your sampling rate. However, the
characteristics of the digital filters used within this DSP chain again
will depend on multiple factors.

Best regards,
Marcus

On 07/15/2016 05:12 PM, Xingjian Chen via USRP-users wrote: