Hi, I'm trying to run an FFT example with FIFO and FFT blocks in RFNoC and rest of the blocks in gnu-radio. But when I run it, it complains of "FIFO_0 block missing" since the FIFO block isn't flashed to the USRP. I'm using make X310_RFNOC_HLS_HG from usrp3_rfnoc/top/x300 directory to build the image. How do I include the FIFO block in this built image along with the other blocks? Thanks, Vishwesh -- Dear Vishwesh Rege, Can you share your modified ce_auto_inst.v ? Also, I'm not 100% sure the FIFO block you're referring to is what you actually want to use as an RFNoC block ? could you elaborate for what you'd need it? Best regards, Marcus On 03.12.2016 22:28, Vishwesh Rege via USRP-users wrote: > Hi, > > I want to add the FIFO block in lib/fifo to USRP along with the addsub > module in lib/hls folder. > > I'm running make X310_RFNOC_HLS_HG from usrp3_rfnoc/top/x300 directory > and then flashing the generated image in build/. > > However, the FIFO isn't included in the image for some reason. Only > the following RFNoC blocks are actually flashed: > | | | * DmaFIFO_0 > | | | * Radio_0 > | | | * Radio_1 > | | | * AddSub_0 > | | | * FIR_0 > | | | * FFT_0 > | | | * Window_0 > | | | * NullSrcSink_0 > | | | * SigGen_0 > | | | * MovingAverage_0 > | | | * VectorIIR_0 > | | | * KeepOneInN_0 > | | | * fosphor_0 > > The Makefile usrp3_rfnoc/top/x300/Makefile.x300.inc already includes > FIFO_SRCS in DESIGN_SRCS > > Do I need to make any changes to include the FIFO? > > Any help is appreciated. > > > > >

Hi Vishwesh, There are two options. You can use make.py (see our KB article: https://kb.ettus.com/Getting_Started_with_RFNoC_Development) or you can hand edit rfnoc_ce_auto_inst_x310.v and instantiate the blocks you want to use. Jonathon On Mon, Dec 5, 2016 at 9:36 PM, Vishwesh Rege via USRP-users < usrp-users@lists.ettus.com> wrote: > Hi, > > I'm trying to run an FFT example with FIFO and FFT blocks in RFNoC and > rest of the blocks in gnu-radio. > > But when I run it, it complains of "FIFO_0 block missing" since the FIFO > block isn't flashed to the USRP. > > I'm using make X310_RFNOC_HLS_HG from usrp3_rfnoc/top/x300 directory to > build the image. How do I include the FIFO block in this built image along > with the other blocks? > > Thanks, > Vishwesh > > -- > Dear Vishwesh Rege, > > Can you share your modified ce_auto_inst.v ? > > Also, I'm not 100% sure the FIFO block you're referring to is what you > actually want to use as an RFNoC block ? could you elaborate for what > you'd need it? > > Best regards, > Marcus > > On 03.12.2016 22:28, Vishwesh Rege via USRP-users wrote: > > Hi, > > > > I want to add the FIFO block in lib/fifo to USRP along with the addsub > > module in lib/hls folder. > > > > I'm running make X310_RFNOC_HLS_HG from usrp3_rfnoc/top/x300 directory > > and then flashing the generated image in build/. > > > > However, the FIFO isn't included in the image for some reason. Only > > the following RFNoC blocks are actually flashed: > > | | | * DmaFIFO_0 > > | | | * Radio_0 > > | | | * Radio_1 > > | | | * AddSub_0 > > | | | * FIR_0 > > | | | * FFT_0 > > | | | * Window_0 > > | | | * NullSrcSink_0 > > | | | * SigGen_0 > > | | | * MovingAverage_0 > > | | | * VectorIIR_0 > > | | | * KeepOneInN_0 > > | | | * fosphor_0 > > > > The Makefile usrp3_rfnoc/top/x300/Makefile.x300.inc already includes > > FIFO_SRCS in DESIGN_SRCS > > > > Do I need to make any changes to include the FIFO? > > > > Any help is appreciated. > > > > > > > > > > > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > >

Hi, Thanks, I'm able to add blocks by editing the rfnoc_ce_auto_inst_x310.v file but had a few questions... Currently I added a random block, but I'm no sure what block should be used for the error I'm getting in GRC: "FIFO_0 block missing"? Using the make.py approach: >From what I understand make.py only generates an output.v file right? After running make.py do I have to copy the contents of the output.v file to rfnoc_ce_auto_inst_x310.v? Finally what difference does it make if I run "make X310_RFNOC_HG" versus "make X310_RFNOC_HLS_HG" Since currently I'm just getting familiar with some of the functionality, but ultimately I want to add a custom block I have synthesized in Vivado HLS to RFNoC - Vishwesh On Tue, Dec 6, 2016 at 8:53 AM, Jonathon Pendlum <jonathon.pendlum@ettus.com > wrote: > Hi Vishwesh, > > There are two options. You can use make.py (see our KB article: > https://kb.ettus.com/Getting_Started_with_RFNoC_Development) or you can > hand edit rfnoc_ce_auto_inst_x310.v and instantiate the blocks you want to > use. > > > > Jonathon > > On Mon, Dec 5, 2016 at 9:36 PM, Vishwesh Rege via USRP-users < > usrp-users@lists.ettus.com> wrote: > >> Hi, >> >> I'm trying to run an FFT example with FIFO and FFT blocks in RFNoC and >> rest of the blocks in gnu-radio. >> >> But when I run it, it complains of "FIFO_0 block missing" since the FIFO >> block isn't flashed to the USRP. >> >> I'm using make X310_RFNOC_HLS_HG from usrp3_rfnoc/top/x300 directory to >> build the image. How do I include the FIFO block in this built image along >> with the other blocks? >> >> Thanks, >> Vishwesh >> >> -- >> Dear Vishwesh Rege, >> >> Can you share your modified ce_auto_inst.v ? >> >> Also, I'm not 100% sure the FIFO block you're referring to is what you >> actually want to use as an RFNoC block ? could you elaborate for what >> you'd need it? >> >> Best regards, >> Marcus >> >> On 03.12.2016 22:28, Vishwesh Rege via USRP-users wrote: >> > Hi, >> > >> > I want to add the FIFO block in lib/fifo to USRP along with the addsub >> > module in lib/hls folder. >> > >> > I'm running make X310_RFNOC_HLS_HG from usrp3_rfnoc/top/x300 directory >> > and then flashing the generated image in build/. >> > >> > However, the FIFO isn't included in the image for some reason. Only >> > the following RFNoC blocks are actually flashed: >> > | | | * DmaFIFO_0 >> > | | | * Radio_0 >> > | | | * Radio_1 >> > | | | * AddSub_0 >> > | | | * FIR_0 >> > | | | * FFT_0 >> > | | | * Window_0 >> > | | | * NullSrcSink_0 >> > | | | * SigGen_0 >> > | | | * MovingAverage_0 >> > | | | * VectorIIR_0 >> > | | | * KeepOneInN_0 >> > | | | * fosphor_0 >> > >> > The Makefile usrp3_rfnoc/top/x300/Makefile.x300.inc already includes >> > FIFO_SRCS in DESIGN_SRCS >> > >> > Do I need to make any changes to include the FIFO? >> > >> > Any help is appreciated. >> > >> > >> > >> > >> > >> >> _______________________________________________ >> USRP-users mailing list >> USRP-users@lists.ettus.com >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >> >> > -- Vishwesh Rege +1 (858) 729-4157 | vrege@ucsd.edu | https://sites.google.com/site/vishweshrege