Re: [time-nuts] yet another GPSDO design, or so
Hi,
just a clarification, I did write 4066 it is a 4046 that I replaced. Take
a look at the MCP 4822 dual 12 bit D/A In the data sheet they have an
example using one for coarse, the other for fine steps, I realize that the
transition is not perfect but maybe code can compensate for the transition.
Bert Kehren
In a message dated 6/29/2010 5:10:39 A.M. Eastern Daylight Time,
attila@kinali.ch writes:
Moin,
On Sat, 26 Jun 2010 21:14:02 EDT
EWKehren@aol.com wrote:
What you want is basically a Shera Board. That design has been around
for
quite some time and has served me very well.
Yes. The Shera Board and similar designs serve as an example for me.
I have a total of six running
including two controlling Rubidium. There are in my opinion a couple of
problems: not every 4066 works on the design the 18 bit D/A is very hard
to
find and now expensive and the single step of the D/A is intended for a
1.7
E-13 frequency step.
Yes. My goal is to update the venerable 4066 with something more
modern and have components that are easy to get trough farnell, digikey,
mouser, and all the other distributors. Yes, 16bit D/A seems to
be the maximum that is currently available. It crossed my mind
to build a 24bit R-2R D/A using discrete components, but this might
have actually a worse performance than a off the shelf 16bit D/A.
(temperature drifft, resistor values missmatch, EMI, etc)
Attila Kinali
If you want to walk fast, walk alone.
If you want to walk far, walk together.
-- African proverb
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The problem is that the gain and offset of the 2 DACs changes with time
and temperature so that the required corrections also change.
Ideally an autocalibration technique would be used to dynamically track
such changes.
Since changes in the coarse DAC are only required infrequently and the
mismatch only affects the region around coarse DAC transitions which are
relatively infrequent (or should be) most designers choose to live with
the increased loop settling time at such transitions.
With sufficient overlap between the coarse and fine DACs only small fine
DAC changes should be required to compensate for mismatch between the
coarse and fine DACs after a change in the coarse DAC output.
The coarse + fine DAC approach is used in some GPSDOs and in particle
accelerator control systems.
Bruce
EWKehren@aol.com wrote:
Hi,
just a clarification, I did write 4066 it is a 4046 that I replaced. Take
a look at the MCP 4822 dual 12 bit D/A In the data sheet they have an
example using one for coarse, the other for fine steps, I realize that the
transition is not perfect but maybe code can compensate for the transition.
Bert Kehren
In a message dated 6/29/2010 5:10:39 A.M. Eastern Daylight Time,
attila@kinali.ch writes:
Moin,
On Sat, 26 Jun 2010 21:14:02 EDT
EWKehren@aol.com wrote:
What you want is basically a Shera Board. That design has been around
for
quite some time and has served me very well.
Yes. The Shera Board and similar designs serve as an example for me.
I have a total of six running
including two controlling Rubidium. There are in my opinion a couple of
problems: not every 4066 works on the design the 18 bit D/A is very hard
to
find and now expensive and the single step of the D/A is intended for a
1.7
E-13 frequency step.
Yes. My goal is to update the venerable 4066 with something more
modern and have components that are easy to get trough farnell, digikey,
mouser, and all the other distributors. Yes, 16bit D/A seems to
be the maximum that is currently available. It crossed my mind
to build a 24bit R-2R D/A using discrete components, but this might
have actually a worse performance than a off the shelf 16bit D/A.
(temperature drifft, resistor values missmatch, EMI, etc)
Attila Kinali
If you want to walk fast, walk alone.
If you want to walk far, walk together.
-- African proverb
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
If we lower the size of each step to over lap more would this lower the error ? Software would adjust both converters at the cross over point so neither would change it's full range at this point. Two 12 bit converters would form one 18 or 20 bit converter.
I guess taken to the extreme we could interweave any number of converters so hopefully the errors would average out :-) 64 times 12 bit converters making a 20 bit converter each with an equal contribution at each step.
Stanley
----- Original Message ----
From: Bruce Griffiths bruce.griffiths@xtra.co.nz
To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Tue, June 29, 2010 5:31:50 AM
Subject: Re: [time-nuts] yet another GPSDO design, or so
The problem is that the gain and offset of the 2 DACs changes with time
and temperature so that the required corrections also change.
Ideally an autocalibration technique would be used to dynamically track
such changes.
Since changes in the coarse DAC are only required infrequently and the
mismatch only affects the region around coarse DAC transitions which are
relatively infrequent (or should be) most designers choose to live with
the increased loop settling time at such transitions.
With sufficient overlap between the coarse and fine DACs only small fine
DAC changes should be required to compensate for mismatch between the
coarse and fine DACs after a change in the coarse DAC output.
The coarse + fine DAC approach is used in some GPSDOs and in particle
accelerator control systems.
Bruce
<snip>
On Tue, 29 Jun 2010 09:17:39 -0700 (PDT)
Stanley Reynolds stanley_reynolds@yahoo.com wrote:
If we lower the size of each step to over lap more would this
lower the error ? Software would adjust both converters at the
cross over point so neither would change it's full range at this point.
Two 12 bit converters would form one 18 or 20 bit converter.
Yes, you can do that. With good D/A converters, the non-linearity
is within 1-2LSB, so if a full range of the fine D/A is more than,
lets say 4LSB of the coarse D/A you can minimize the step in control
voltage, when you switch from one fine D/A range to the next. But
it will be always there, you cannot get completely rid of it.
There are two things that make this step problematic:
-
If it happens automatically, it will result in problems
when doing long term measurements using that GPSDO as reference.
When doing the switch manually triggered (ie the GPSDO says that
it needs to adjust the coarse D/A and does so only after the
user presses a button), then unattended operation over long periods
is not possible anymore. -
Each adjustment of the coarse D/A is a non-linear operation. It is
basically a step function excitation of the control loop. With such
a non-linear element within the control loop, the software has to
take either precautions during the period of the non linearity or
the control loop has to be able to cope with such steps, without
starting to oscillate.
I guess taken to the extreme we could interweave any number of
converters so hopefully the errors would average out :-) 64 times
12 bit converters making a 20 bit converter each with an equal
contribution at each step.
Actually, the less components you have, the better. Not only do
more components add more non-linearity (it is very difficult to
average multiple components if they arent R's and C's), the
whole circuitry involved produces also noise.
Attila Kinali
--
If you want to walk fast, walk alone.
If you want to walk far, walk together.
-- African proverb
Hi
Some of the TI (Burr Brown) 16 bit parts are 1/4 lsb DNL on > 98% of the
transitions. Most of the time you have a "coarse" DAC that's at 18 bits.
Some of the errors are predictable and you can take them out with a simple
training process. You won't easily get 24 bits, but 20 is very achievable.
20 bits is a nice round million to one factor. A 1 ppm EFC becomes a 1 ppb
step if everything is perfectly linear. Even with a 4:1 slope ratio it's
still quite small. With a more restricted EFC of 2.5x10^-8 you are at
1x10^-13 with the 4:1 slope ratio.
Bob
-----Original Message-----
From: time-nuts-bounces@febo.com [mailto:time-nuts-bounces@febo.com] On
Behalf Of Attila Kinali
Sent: Tuesday, June 29, 2010 12:42 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] yet another GPSDO design, or so
On Tue, 29 Jun 2010 09:17:39 -0700 (PDT)
Stanley Reynolds stanley_reynolds@yahoo.com wrote:
If we lower the size of each step to over lap more would this
lower the error ? Software would adjust both converters at the
cross over point so neither would change it's full range at this point.
Two 12 bit converters would form one 18 or 20 bit converter.
Yes, you can do that. With good D/A converters, the non-linearity
is within 1-2LSB, so if a full range of the fine D/A is more than,
lets say 4LSB of the coarse D/A you can minimize the step in control
voltage, when you switch from one fine D/A range to the next. But
it will be always there, you cannot get completely rid of it.
There are two things that make this step problematic:
-
If it happens automatically, it will result in problems
when doing long term measurements using that GPSDO as reference.
When doing the switch manually triggered (ie the GPSDO says that
it needs to adjust the coarse D/A and does so only after the
user presses a button), then unattended operation over long periods
is not possible anymore. -
Each adjustment of the coarse D/A is a non-linear operation. It is
basically a step function excitation of the control loop. With such
a non-linear element within the control loop, the software has to
take either precautions during the period of the non linearity or
the control loop has to be able to cope with such steps, without
starting to oscillate.
I guess taken to the extreme we could interweave any number of
converters so hopefully the errors would average out :-) 64 times
12 bit converters making a 20 bit converter each with an equal
contribution at each step.
Actually, the less components you have, the better. Not only do
more components add more non-linearity (it is very difficult to
average multiple components if they arent R's and C's), the
whole circuitry involved produces also noise.
Attila Kinali
--
If you want to walk fast, walk alone.
If you want to walk far, walk together.
-- African proverb
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
On Tue, 29 Jun 2010 12:54:52 -0400
"Bob Camp" lists@rtty.us wrote:
Some of the TI (Burr Brown) 16 bit parts are 1/4 lsb DNL on > 98% of the
transitions. Most of the time you have a "coarse" DAC that's at 18 bits.
Some of the errors are predictable and you can take them out with a simple
training process. You won't easily get 24 bits, but 20 is very achievable.
20 bits is a nice round million to one factor. A 1 ppm EFC becomes a 1 ppb
step if everything is perfectly linear. Even with a 4:1 slope ratio it's
still quite small. With a more restricted EFC of 2.5x10^-8 you are at
1x10^-13 with the 4:1 slope ratio.
What currently puzzles me with such high bit D/A solutions is, how
to stabilize the output voltage. Given a 20 bit D/A working over
e.g. an 5V range (0-5V), 1LSB becomes 4.7uV. With 24 bit it's
already at 300nV. This is getting awfully near to the noise voltages
that a low noise circuit has. Not to talk that designing a power
supply with a noise of less than 1uV is very daunting task.
Attila Kinali
--
If you want to walk fast, walk alone.
If you want to walk far, walk together.
-- African proverb