Hi List,

I have been toying with the idea of designing an add-on module for either a
single or multiple TICCs that would allow for digital control of threshold
levels, like "big boy" TICs do. For comparing signals slightly weaker than
what TICC's input buffer will trigger on, and otherwise signals from
different devices - ideally without damaging the TICC's own measurement
characteristics much.

Essentially a high-speed comparator per channel, with the inverting input
voltage controlled by two parallel dividers based on I2C-controlled digital
potentiometers + series resistors, for fine and coarse control, and a LUT
on the software side with pot step pairs, calibrated to achieve what's
closest to say 0.1 V threshold steps in a certain range. Looks good in
simulation (tm). Side questions: does this seem viable to you? and does a
TIC with ~60 ps resolution need a sub-0.1 V trigger resolution?

Now, 99%, or 100% in fact, of what *I * need, is rising edge. For a more
complete solution, support for falling edge would be useful. The TICC
itself could/should still be rising edge, just that the trigger could for
example have a NAND gate past the comparator, to invert the output if set
to falling edge. An extra part to worry about, and extra control.

The question, then, is: how often do you see the need to measure the
falling edge? I can see this being useful for say pulse width measurement,
but then that's what a 'scope is for. What about inverted PPS?

Many thanks,
Wojciech

--

Wojciech Owczarek

Hi Wojciech,

Great idea. A bunch of comments:

• The front-end idea has been discussed a few times but no one has
  actually done it -- so your efforts would be very welcome. In fact, it
  could apply to any digital counter not just the TAPR/TICC, perhaps
  giving your board wider application than you imagine.

• If I recall correctly the TICC has an edge selection jumper but during
  testing rare glitches occurred when using the falling edge. The source
  of the problem was never found so I think everyone just uses rising
  edge. Or maybe it was fixed, I don't know.

• Yes, pulse width measurement is a good use case for programmable
  rise/fall edge feature on a two input counter.

• Another useful trick is to programmatically ramp the trigger level
  while measuring a steady pulse train and then plot phase vs. voltage.
  This effectively gives you a sub-nanosecond view of the actual edge(s)
  of the pulse, turning a plain time interval counter into an
  oscilloscope. So not only can you now measure pulse width but also rise
  and fall times.

• A related trick is to toggle the edge selection on every capture. That
  results in two timestamps per pulse, one for the leading and one for the
  falling edge, and requiring only one channel. True, it makes some
  assumptions about pulse rate and pulse width, but there are cases where
  it all works well.

• An inverted PPS is often a mistake but having a programmable edge
  selection on a timestamping counter allows you to blindly try both edges
  and determine which is the leading edge. Or put it another way, you can
  collect stats on both PPS edges to verify that the on-time edge is the
  one with lowest jitter. Combine that with varying trigger level and your
  simple TICC is now a pulse diagnostic.

• As long as you are designing a programmable front-end, you might
  consider adding a prescaler feature too. The TAPR/TICC works only for
  low frequency inputs so having a 2^N or 10^N prescaler would extend the
  TICC to be a more general purpose frequency counter.

• If have extra space on the board you can add a programmable ~50 ns
  delay chip. Your board would then be useful for live GPS/1PPS sawtooth
  compensation.

• A selection for AC vs DC input coupling would be useful and easy to
  implement.

• Maybe consider an optocoupler feature so that the front-end can be
  used isolated from the TAPR/TICC or PC ground.

• Following John's tradition of creative names for TAPR products,
  consider TIPP, two input pre-processor, or TPPP, totally programmable
  pulse processor. ;-)

/tvb