time-nuts@lists.febo.com

Discussion of precise time and frequency measurement

View all threads

Re: [time-nuts] Did a member of time-nuts buy this?

BC
Bob Camp
Thu, Dec 11, 2014 12:31 PM

Hi

On Dec 11, 2014, at 3:35 AM, Brian Inglis Brian.Inglis@SystematicSw.ab.ca wrote:

On 2014-12-09 04:10, Mike Monett wrote:

One very cute addition would be to pull down the NIST GPS data and
use it to correct your system on an hourly / daily basis. If you
do that with common view satellites, you most certainly will beat
a surplus grade Cs standard.

How can we do this? The NIST archives state

"The archive is only updated once every 24 hours, so data are not
available for today's date. Data from the previous day are added to
the archive at about 1600 UTC."

http://www.nist.gov/pml/div688/grp40/gpsarchive.cfm

Is there another page that has current data? If so, how do we
incorporate it into the GPSDO?

IGS http://igscb.jpl.nasa.gov/components/data.html has pointers to
get 15 minute samples from high rate IGS stations around the world:
http://cddis.gsfc.nasa.gov/Data_and_Derived_Products/GNSS/high-rate_data.html

The question is what level of timing those stations have (and thus traceability to UTC).

USNO info tells you which SVNs/PRNs have Cs (few) and Rb (most) clocks:
might be interesting to compare accuracy of Cs vs Rb SVs in view.

There are several papers on the base clocks on the GPS sat’s. The simple answer appears to be that they correct them from the ground more often than is needed with any of them. Thus the ground segment “stability” is the main issue. Their correction process is far from simple so sorting everything out is a major effort.  The driver for very fancy clocks is as much a bunch of “what if?” type failures as an absolute need in normal operation.

Bob

--
Take care. Thanks, Brian Inglis


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.

Hi > On Dec 11, 2014, at 3:35 AM, Brian Inglis <Brian.Inglis@SystematicSw.ab.ca> wrote: > > On 2014-12-09 04:10, Mike Monett wrote: > >>> One very cute addition would be to pull down the NIST GPS data and >>> use it to correct your system on an hourly / daily basis. If you >>> do that with common view satellites, you most certainly will beat >>> a surplus grade Cs standard. >> >> How can we do this? The NIST archives state >> >> "The archive is only updated once every 24 hours, so data are not >> available for today's date. Data from the previous day are added to >> the archive at about 1600 UTC." >> >> http://www.nist.gov/pml/div688/grp40/gpsarchive.cfm >> >> Is there another page that has current data? If so, how do we >> incorporate it into the GPSDO? > > IGS http://igscb.jpl.nasa.gov/components/data.html has pointers to > get 15 minute samples from high rate IGS stations around the world: > http://cddis.gsfc.nasa.gov/Data_and_Derived_Products/GNSS/high-rate_data.html The question is what level of timing those stations have (and thus traceability to UTC). > > USNO info tells you which SVNs/PRNs have Cs (few) and Rb (most) clocks: > might be interesting to compare accuracy of Cs vs Rb SVs in view. There are several papers on the base clocks on the GPS sat’s. The simple answer appears to be that they correct them from the ground more often than is needed with any of them. Thus the ground segment “stability” is the main issue. Their correction process is far from simple so sorting everything out is a major effort. The driver for very fancy clocks is as much a bunch of “what if?” type failures as an absolute need in normal operation. Bob > -- > Take care. Thanks, Brian Inglis > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
MM
Mike Monett
Mon, Dec 15, 2014 7:27 AM

Hi

On Dec 10, 2014, at 11:12 PM, Mike Monett
timenuts@binsamp.e4ward.com wrote:

[...]

Can you tell me some of the ones that do?

I have yet to see one for under $2K that does it correctly. I
don't have the cash to buy ones at those sort of prices. Some
have reported that the old Motorola UT's will do it. The samples
I have tried have not done very well. I may have not had them
running right who knows.

OK, that pretty much eliminates the NIST data.

or means that more research is needed on single sat boards. There
are a lot of them out there.

What is a "single sat board" and can you give some examples?

  1. Feed that into your control loop equation.

There's another term I need to research!

It's not a simple control process, but it's not all that
terrible either. It just takes a bit of work to optimize. Figure
a few months to a few years for the optimization depending on
what you have for issues along the way.

OK, so I figure out how to do this. How do I tell if this is
making the gpsdo more accurate? In other words, how do I get
the ADEV without having an H-Maser?

You get a Cs (or other atomic standard) or you compare several
different GPSDO's against each other. The preference would be
for groups of three so you can rule out ones that are not doing
what they should.

The ideal would be > 3 TBolts, > 3 same model Rb's, > 3 same model
OCXO's and more than three groups overall. Each has their own ADEV
curve. Comparing devices with vastly different ADEV is not the
best way to go.

Yes, that makes good sense.

[...]

There are many new dacs, op amps, and bipolar microwave devices
that offer much lower noise than current designs use. I think the
performance can be improved in some areas with new components and
design techniques, and I have equipment and time to explore.

There are only two points that system noise really comes into the
GPSDO design:

  1. The TDC must have enough resolution
  1. The DAC on the EFC must have noise below the OCXO

I was more thinking of the Rubidium physics package. Most of the
Rubidiums on eBay are pretty old.

The lamp must have constant intensity. The null detector has to
identify a very shallow drop. The microwave signal needs to have
excellent phase noise.

These all need low noise, low flicker components, and significant
advances have been made in recent years. The surrounding circuitry
could probably benefit from a redesign to take better advantage of
low noise components. For example, SRD's are much noisier than NLTL's.

Probably little can be done to improve the Rubidium cell, but it
should be the limiting factor and not the electronics.

The TDC is limited by the basic resolution of the GPS system. It's
easy to build one that has far more resolution than needed /
useful.

Some people have little faith:)

The DAC issue is normally solved with a < $4 part. Unless you have
an OCXO with a very wide EFC range, it's noise is unlikely to be
an issue. DAC resolution can be addressed to any desired level
with two DAC's (fine and coarse). (Once you get going, you only
use the fine DAC).

The real "fun and games" revolves around the software used to
implement the filtering / control loop between the GPS and the
OCXO (or Rb, or TCXO, or MEMS, or VCXO, or Cs or 
)

Focus on the software.

Bob

I have a few Rubidiums and OCXOs I'd like to get running for a month
or so to stabilize. During this time, I'd like to monitor the
performance to discover any bad units and see which are the best
ones.

For example, TVB shows a 100:1 variation in ADEV in FE-405B
Rubidiums. The section is titled "Variation in FE-405B" in

http://leapsecond.com/pages/fe405/

Clearly, it would be futile to try to use a bad unit in setting up a
gpsdo.

I need some means of measuring the performance of these units while
they are running. A dozen HP5370's would be out of the question. I
did some research to find the different methods available and decide
which has the lowest per-channel cost and best performance.

Here are some of the references I found. I discarded most of the poor ones
and tried to keep only the ones that talk about measurements in the
picosecond or femtosecond range.

I did not include DMTD since the concept is so simple. The Reviews help to
get oriented, but sometimes it takes reading the papers and the patents to
see the timing diagrams and understand what the author is trying to do.

There are many different variations on the FPGA approach. I would be
concerned about the development time, the large DNL, and the problems with
crosstalk on multi-channel units.

The TI THS788 looks good on paper, but it is single-source, not well
stocked, and there is lttle information on crosstalk between channels. It
is also quite expensive per channel. There are no application notes and
little or no information on usage on the web.

The Thesis generally have excellent reviews worth reading.

Articles

Simple PICTIC 250ps time interval counter
http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:pictic

Griffiths Time to Digital converters
http://www.ko4bb.com/~bruce/TDC.html

[time-nuts] Experience with THS788 from TI?-
Attila Kinali's post on TDC methods
https://www.febo.com/pipermail/time-nuts/2012-March/065337.html

Reviews

Review of methods for time interval measurements with picosecond
resolution
http://ztc.wel.wat.edu.pl/met4_1_004.pdf

Low resource FPGA-based 32 Channel Time to Digital Converter

Design, construction and tests of a high resolution, high dynamic
range Time to Digital Converter

Review Of Sub-Nanosecond Time-Interval Measurements
http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-1331.pdf

Chapter 1 Time Interval Measurement Literature Review
http://www.rrsg.ee.uct.ac.za/members/jon/activities/timcs.pdf

Time intervals measurements and generation methods review
http://www.ohwr.org/attachments/128/Time_Interval_Measurements_Techniques.pdf

Papers

A Cyclic CMOS Time-to-Digital Converter With Deep Sub-nanosecond
Resolution
http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021548/1/00777354.pdf

A 96-Channel FPGA-based Time-to-Digital Converter
http://arxiv.org/pdf/physics/0502062.pdf

Complete and Compact 32-Channel System for Time-Correlated
Single-Photon Counting Measurements
http://ieeexplore.ieee.org/ielx7/4563994/6588410/06617673.pdf?arnumber=6617673

Design and Development of GPS Receiver for PNSS-1
http://www.suparco.gov.pk/pages/presentations-pdf/day-1/session-2/12C-II/1.pdf

A Novel Ultra-fast High Resolution Time-domain EMI Measurement
System based on Field Programmable Gate Arrays
https://mediatum.ub.tum.de/doc/1163324/1163324.pdf

High Precision Frequency Measurement System Based on Different
Frequency Phase Processing (in Chinese)
http://xbzrb.tjujournals.com/oa/pdfdow.aspx?Type=pdf&FileName=11acd53a-876d-4ab0-8906-572aa3836215.pdf

A 51-dB SNDR DCO-Based TDC Using Two-Stage Second-Order Noise Shaping
http://www28.cs.kobe-u.ac.jp/pdf/1205_konishi_iscas.pdf

Integrated High-Resolution Multi-Channel Time-to-Digital Converters
(TDCs) for PET Imaging

A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs
http://arxiv.org/pdf/1303.6840v1.pdf

A High-Resolution Flash Time-to-Digital Converter Taking Into
Account Process Variability
http://conferences.computer.org/async2007/PRS/15-minas-async07.pdf

Principles and Instrumentation in Time-of-flight Mass Spectrometry
http://www.wiley.com/legacy/wileychi/ms/articles/1519_a.pdf

TEMPERATURE SENSING CRYSTAL HTS-206

A novel method of measurement of time and amplitude of analog
signals based solely on FPGA units
http://koza.if.uj.edu.pl/pet-symposium-2013/talks/17.pdf

A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter
in a Field Programmable Gate Array
http://iopscience.iop.org/1748-0221/7/02/C02004/pdf/1748-0221_7_02_C02004.pdf

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA
on the GANDALF module
http://iopscience.iop.org/1748-0221/7/03/C03008/pdf/1748-0221_7_03_C03008.pdf

FPGA Based Data Digitisation with Commercial Elements
http://indico.scc.kit.edu/indico/getFile.py/access?contribId=4&sessionId=4&resId=0&materialId=slides&confId=21

Time-to-Digital Converter Architecture with Residue Arithmetic and
its FPGA Implementation
http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2014/2014-11li_congbing2.pdf

An FPGA-Integrated Time-to-Digital Converter Based on a Ring
Oscillator for Programmable Delay Line Resolution Measurement

First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter

A High Resolution FPGA-based TDC with Nonlinearity Calibration
http://www2.ess.nthu.edu.tw/~cwlu/conference/5_A%20High%20Resolution%20FPGA-based%20TDC%20with.pdf

A Single-Slope 80MS/s ADC using Two-Step Time-to-Digital Conversion
http://dspace.mit.edu/openaccess-disseminate/1721.1/60073

Simulation of ps-Detector Electronics
http://hep.uchicago.edu/workshops/2005-picosecond/8-Fukun_Tang_ps_sim.ppt

High Precision Time and Frequency Counter for Mobile Applications
http://www.wseas.us/e-library/transactions/circuits/2010/89-747.pdf

Time-to-Digital Converter based on Analog Time Expansion for 3D Time
of Flight Cameras
https://pure.ltu.se/portal/files/95016947/90220A.pdf

A Pc-Based Time Interval Counter With 200 Ps Resolution
http://www.dtic.mil/get-tr-doc/pdf?AD=ADA427911

The Development of Large-area, Picosecond Resolution, Time-of-Flight
Detectors
http://hep.uchicago.edu/~frisch/adr.pdf

Low-Voltage High-Frequency Gated Ring Oscillator Using Bootstrap
Technique
http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2012/AMDE2012_Kamiyama.pdf

High-resolution short time interval measurement system implemented
in a single FPGA chip
http://download.springer.com/static/pdf/727/art%253A10.1007%252Fs11434-011-4421-3.pdf?auth66=1418360984_e35e8a8588d3977c4d4d4d2109c1aaaa&ext=.pdf

Implementation of sub-nanosecond time-to-digital convertor in
field-programmable gate array
https://hal.archives-ouvertes.fr/in2p3-00873192/PDF/articleMST_Marteau-et-al_v1.pdf

New Jitter Measurement Technique Using TDC Principle in a FPGA
Component
http://www.inatel.br/biblioteca/component/docman/doc_download/3831-new-jitter-measurement-technique-using-tdc-principle

High Resolution Modular Time Interval Counter
http://ilrs.gsfc.nasa.gov/docs/timing/artyukh_time_interval_counter.pdf

Using Dynamic Reconfiguration to Implement High-Resolution
Programmable Delays on an FPGA
http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDaigneaultDavidNEWCAS08.pdf

A 2.6ps rms -Period-Jitter 900MHz All-Digital Fractional-N PLL Built
with Standard Cells
http://www-bsac.eecs.berkeley.edu/publications/search/send_publication_pdf2client.php?pubID=1307595132

C111 / P111 4 channel Time to Digital Converter User's manual
http://www.esrf.eu/files/live/sites/www/files/Instrumentation/DetectorsAndElectronics/Units/Electronics/digital-electronics-lab/c111.pdf

Carry-chain propagation delay impacts on resolution of FPGA-based TDC
http://www.j.sinap.ac.cn/nst/EN/article/downloadArticleFile.do?attachType=PDF&id=457

A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source
Applications
http://ens.ewi.tudelft.nl/pubs/charbon12tcas_favi.pdf

A data driven high performance Time to Digital Converter
http://ph-collectif-lecc-workshops.web.cern.ch/ph-collectif-lecc-workshops/LEB00_Book/tracker/christiansen_track.pdf

On-Chip Timing Measurement Architecture with Femtosecond Resolution
http://eprints.soton.ac.uk/262543/1/collinsm_timemeasurement2.pdf

A 13b 315fs rms 2mW 500MS/s 1MHz Bandwidth Highly Digital
Time-to-Digital Converter Using Switched Ring Oscillators
http://www.cse.psu.edu/~xydong/files/proceedings/ISSCC2012/files/D27_04.pdf

A high resolution Time-to-Digital Converter on FPGA for
Time-Correlated Single Photon Counting
http://libgen.org/scimag/get.php?doi=10.1109/mwscas.2012.6292166

A Design of Vernier Coarse-Fine Time-to-Digital Converter using
Single Time Amplifier
http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2012/v12n4/E1STAN_2012_v12n4_411.pdf

All Digital Time-to-Digital Converter with High Resolution and Wide
Detect Range
http://www.engineeringletters.com/issues_v19/issue_3/EL_19_3_16.pdf

Examples of 1 PPS Clock Measuring Systems
http://www.wriley.com/Examples%20of%201%20PPS%20Clock%20Measuring%20Systems.pdf

On-Chip Processing for the Wave Union TDC Implemented in FPGA
http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-275-e.pdf

18-channel FPGA Wave Union TDC for Time-of-Flight Applications
http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-573-ppd.pdf

A 96-channel FPGA-based Time-to-Digital Converter (TDC)
http://www.phys.sinica.edu.tw/~e906/WWW_public/Doc/TDC/FPGA_TDC.pdf

Design of FPGA-based TDC for the ICAL Detector of India-based
Neutrino Observatory
http://www.hecr.tifr.res.in/~sudeshnadg/publication/FPGA_TDC.pdf

FPGA based Time-to-Digital Converter
http://www.sympnp.org/proceedings/56/G7.pdf

A Flash Time-to-Digital Converter with Two Independent Time Coding
Lines
IMEKO-IWADC-2011-12.pdf
http://www.imeko.org/publications/iwadc-2011/IMEKO-IWADC-2011-12.pdf

A 17ps Time-to-Digital Converter Implemented in 65nm FPGA Technology
http://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf

A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 um CMOS Technology
http://www.eng.auburn.edu/~daifa01/Top/PubPapers/2010/Jpaper2010-02.pdf

A high-speed wide dynamic range time-to-digital converter
http://www.ssl.berkeley.edu/~mlampton/LamptonRaffanti.pdf

High Resolution Time-Interval Measurement Systems Applied To Flow
Measurement
http://www.metrology.pg.gda.pl/full/2014/M&MS_2014_077.pdf

Accurate time interval measurement electronics for pulsed time of
flight laser radar
http://www.ee.oulu.fi/~kari/Papers/Nantes1997.pdf

Signal Processing for Pico-second Resolution Timing Measurements
http://psec.uchicago.edu/Papers/NIM_v8b_final.pdf

High-Resolution Time-to-Digital Converter in Field Programmable Gate Array
http://cds.cern.ch/record/1158663/files/p383.pdf

Random Errors in Time Interval Measurement Based on SAW Filter Excitation
http://libgen.org/scimag/get.php?doi=10.1109/tim.2007.915465

A 96-channel, 500 ps resolution TDC board for the BaBar experiment at SLAC
http://www.ge.infn.it/babar/ITB/RT99/paper.pdf

A Cyclic Vernier TDC for ADPLLs Synthesized From a Standard Cell Library
http://wwweb.eecs.umich.edu/wics/publications/Park_TCASI2011.pdf

Nonlinearity Correction of the Integrated Time-to-Digital Converter
with Direct Coding
http://libgen.org/scimag/get.php?doi=10.1109/19.571882

PICTIC Interpolator Linearity
http://www.wriley.com/PICTIC%20Interpolator%20Linearity.pdf

Firmware-only Implementation of Time-to-Digital Converter (TDC) in
Field-Programmable Gate Array (FPGA)
http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID26522.pdf

High-Precise Portable Time Interval and Frequency Counter
http://tycho.usno.navy.mil/ptti/2012papers/PTTI2012.p247.pdf

FPGA-based time counters with a wander measurement mode
http://www.pwt.et.put.poznan.pl/PWT_2012/PWT%202012_2242.pdf

The Simple PICTIC
http://www.ko4bb.com/dokuwiki/lib/exe/fetch.php?id=precision_timing%3Apictic&cache=cache&media=precision_timing:simple_pictic.pdf

A Saw-tooth Wave Based Design of Time to Digital Converter
http://www.wseas.us/e-library/conferences/2009/budapest/SMO/SMO68.pdf

A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping
http://www.cppsim.org/Publications/JNL/straayer_jssc09.pdf

Micrel LVPECL, CML 5GHz - 7GHz Buffer
http://www.micrel.com/_PDF/Eval-Board/sy58011-12-13u_eb.pdf

Micrel LVPECL, CML 4GbpS - 10.7Gbps Multiplexer
http://www.micrel.com/_PDF/Eval-Board/sy58017-18-19u_eb.pdf

A flash high-precision Time-to-Digital Converter implemented in FPGA
technology
http://indico.cern.ch/event/49682/session/35/contribution/3/material/slides/0.ppt

FPGA-Based High Area Efficient Time-To-Digital IP Design
http://www.ifm.umich.mx/~villasen/TESIS/Mario/TDC.pdf

Firmware-only Implementation of Time-to-Digital Converter (TDC) in FPGA
http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/tdc1s.pdf

A Time-To-Digital Converter (TDC)
https://indico.phys.hawaii.edu/getFile.py/access?contribId=4&resId=0&materialId=slides&confId=392

96-Channel FPGA-Based Time-To-Digital Converter
http://hep.uchicago.edu/~frisch/TDC_NIM_v12.pdf

Texas Instruments THS788 Quad-Channel Time Measurement Unit (TMU)
http://www.ti.com/lit/ds/symlink/ths788.pdf

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA
on the GANDALF module
http://wwwhad.physik.uni-freiburg.de/gandalf/modules/download_gallery/dl.php?file=59

Vernier's Delay Line Time-to-Digital Converter
http://www.np.ac.rs/yu/preuzimanjasve/publications/vol1br1/181-verniers-delay-line-time-to-digital-converter/download

Time-to-Digit Converter Based on Radiation-Tolerant FPGA

A High-Resolution Time-to-Digital Converter Implemented in
Field-Programmable-Gate-Arrays
http://mi.sibet.cas.cn/zlgx/201310/W020131024537685817071.pdf

Picosecond Resolution Time-to-Digital Converter Using G m -C
Integrator and SAR-ADC
http://www.ssc.pe.titech.ac.jp/publications/2014/IEEE_trans/xu/Xu_GmTDC_Journal_Final_V5.pdf

A Design of Vernier Coarse-Fine Time-to-Digital Converter using
Single Time Amplifier
http://www.jsts.org/html/journal/journal_files/2012/12/Year2012Volume12_04_05.pdf

Patents

Burbeck METHOD AND APPARATUS FOR AUTOMATICALLY MEASURING TIME
INTERVALS
https://patentimages.storage.googleapis.com/pdfs/US2665410.pdf

Frady DOUBLE INTERPOLATION METHOD AND APPARATUS FOR MEASURING TIME
INTERVALS
https://patentimages.storage.googleapis.com/pdfs/US2665411.pdf

Bagley ELECTRONIC INTERPOLATING COUNTER FQR THE TIME INTERVAL AND
FREQUENCY MEASUREMENT
https://patentimages.storage.googleapis.com/pdfs/US3133189.pdf

Nutt DIGITAL INTERVALOMETER
https://patentimages.storage.googleapis.com/pdfs/US3983481.pdf

Janowitz TIME INTERVAL MEASUREMENT METHOD AND APPARATUS
https://patentimages.storage.googleapis.com/pdfs/US3999128.pdf

Thornton HIGH RESOLUTION DATA ACQUISITION
http://patentimages.storage.googleapis.com/pdfs/US5200933.pdf

Condreva HIGH RESOLUTION TIME INTERVAL COUNTER
https://patentimages.storage.googleapis.com/pdfs/US5333162.pdf

Kattan TIME INTERVAL ANALYZER HAVING MULTIPLE MEASUREMENT CIRCUITS
http://patentimages.storage.googleapis.com/pdfs/US6226231.pdf

Nair CORRECTION FOR PIPELINED ANALOG TO DIGITAL (A/D) CONVERTER
http://patentimages.storage.googleapis.com/pdfs/US6784814.pdf

Gao HIGH RESOLUTION SAMPLING-BASED TIME TO DIGITAL CONVERTER
http://patentimages.storage.googleapis.com/pdfs/US8564471.pdf

Thesis

An Integrated Cmos High Precision Time-To-Digital Converter Based On
Stabilised Three-Stage Delay Line Interpolation

Multi-Path Differential Delay Line based Time-to-Digital Converter
for ADPLL
http://www.diva-portal.org/smash/get/diva2:635168/FULLTEXT01.pdf

Noise Shaping Techniques for Analog and Time to Digital Converters
Using Voltage Controlled Oscillators
http://cppsim.org/Publications/Theses/straayer_phdthesis.pdf

Implementation of the high resolution high dynamic Time to Digital
Converter
https://www.politesi.polimi.it/bitstream/10589/92658/1/Thesis_V1.0.2_Build04031059.pdf

A Stabilized Multi- Channel Cmos Time-To- Digital Converter Based On
A Low Frequency Reference
http://herkules.oulu.fi/isbn9789514299322/isbn9789514299322.pdf

> Hi >> On Dec 10, 2014, at 11:12 PM, Mike Monett >> <timenuts@binsamp.e4ward.com> wrote: [...] >>>> Can you tell me some of the ones that do? >>> I have yet to see one for under $2K that does it correctly. I >>> don't have the cash to buy ones at those sort of prices. Some >>> have reported that the old Motorola UT's will do it. The samples >>> I have tried have not done very well. I may have not had them >>> running right who knows. >> OK, that pretty much eliminates the NIST data. > or means that more research is needed on single sat boards. There > are a *lot* of them out there. What is a "single sat board" and can you give some examples? >>>>> 5) Feed that into your control loop equation. >>>> There's another term I need to research! >>> It's not a simple control process, but it's not all that >>> terrible either. It just takes a bit of work to optimize. Figure >>> a few months to a few years for the optimization depending on >>> what you have for issues along the way. >>>> OK, so I figure out how to do this. How do I tell if this is >>>> making the gpsdo more accurate? In other words, how do I get >>>> the ADEV without having an H-Maser? >>> You get a Cs (or other atomic standard) or you compare several >>> different GPSDO's against each other. The preference would be >>> for groups of three so you can rule out ones that are not doing >>> what they should. > The ideal would be > 3 TBolts, > 3 same model Rb's, > 3 same model > OCXO's and more than three groups overall. Each has their own ADEV > curve. Comparing devices with vastly different ADEV is not the > best way to go. Yes, that makes good sense. [...] >> There are many new dacs, op amps, and bipolar microwave devices >> that offer much lower noise than current designs use. I think the >> performance can be improved in some areas with new components and >> design techniques, and I have equipment and time to explore. > There are only two points that system noise really comes into the > GPSDO design: > 1) The TDC must have enough resolution > 2) The DAC on the EFC must have noise below the OCXO I was more thinking of the Rubidium physics package. Most of the Rubidiums on eBay are pretty old. The lamp must have constant intensity. The null detector has to identify a very shallow drop. The microwave signal needs to have excellent phase noise. These all need low noise, low flicker components, and significant advances have been made in recent years. The surrounding circuitry could probably benefit from a redesign to take better advantage of low noise components. For example, SRD's are much noisier than NLTL's. Probably little can be done to improve the Rubidium cell, but it should be the limiting factor and not the electronics. > The TDC is limited by the basic resolution of the GPS system. It's > easy to build one that has far more resolution than needed / > useful. Some people have little faith:) > The DAC issue is normally solved with a < $4 part. Unless you have > an OCXO with a very wide EFC range, it's noise is unlikely to be > an issue. DAC resolution can be addressed to any desired level > with two DAC's (fine and coarse). (Once you get going, you only > use the fine DAC). > The real "fun and games" revolves around the software used to > implement the filtering / control loop between the GPS and the > OCXO (or Rb, or TCXO, or MEMS, or VCXO, or Cs or 
) > Focus on the software. > Bob I have a few Rubidiums and OCXOs I'd like to get running for a month or so to stabilize. During this time, I'd like to monitor the performance to discover any bad units and see which are the best ones. For example, TVB shows a 100:1 variation in ADEV in FE-405B Rubidiums. The section is titled "Variation in FE-405B" in http://leapsecond.com/pages/fe405/ Clearly, it would be futile to try to use a bad unit in setting up a gpsdo. I need some means of measuring the performance of these units while they are running. A dozen HP5370's would be out of the question. I did some research to find the different methods available and decide which has the lowest per-channel cost and best performance. Here are some of the references I found. I discarded most of the poor ones and tried to keep only the ones that talk about measurements in the picosecond or femtosecond range. I did not include DMTD since the concept is so simple. The Reviews help to get oriented, but sometimes it takes reading the papers and the patents to see the timing diagrams and understand what the author is trying to do. There are many different variations on the FPGA approach. I would be concerned about the development time, the large DNL, and the problems with crosstalk on multi-channel units. The TI THS788 looks good on paper, but it is single-source, not well stocked, and there is lttle information on crosstalk between channels. It is also quite expensive per channel. There are no application notes and little or no information on usage on the web. The Thesis generally have excellent reviews worth reading. Articles Simple PICTIC 250ps time interval counter http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:pictic Griffiths Time to Digital converters http://www.ko4bb.com/~bruce/TDC.html [time-nuts] Experience with THS788 from TI?- Attila Kinali's post on TDC methods https://www.febo.com/pipermail/time-nuts/2012-March/065337.html Reviews Review of methods for time interval measurements with picosecond resolution http://ztc.wel.wat.edu.pl/met4_1_004.pdf Low resource FPGA-based 32 Channel Time to Digital Converter - Excellent review of TDC techniques and measurement verification http://arxiv.org/vc/arxiv/papers/1206/1206.0679v3.pdf Design, construction and tests of a high resolution, high dynamic range Time to Digital Converter - Excellent review of TDC methods and test techniques http://inspirehep.net/record/1313667/files/getfile.pdf Review Of Sub-Nanosecond Time-Interval Measurements http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-1331.pdf Chapter 1 Time Interval Measurement Literature Review http://www.rrsg.ee.uct.ac.za/members/jon/activities/timcs.pdf Time intervals measurements and generation methods review http://www.ohwr.org/attachments/128/Time_Interval_Measurements_Techniques.pdf Papers A Cyclic CMOS Time-to-Digital Converter With Deep Sub-nanosecond Resolution http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021548/1/00777354.pdf A 96-Channel FPGA-based Time-to-Digital Converter http://arxiv.org/pdf/physics/0502062.pdf Complete and Compact 32-Channel System for Time-Correlated Single-Photon Counting Measurements http://ieeexplore.ieee.org/ielx7/4563994/6588410/06617673.pdf?arnumber=6617673 Design and Development of GPS Receiver for PNSS-1 http://www.suparco.gov.pk/pages/presentations-pdf/day-1/session-2/12C-II/1.pdf A Novel Ultra-fast High Resolution Time-domain EMI Measurement System based on Field Programmable Gate Arrays https://mediatum.ub.tum.de/doc/1163324/1163324.pdf High Precision Frequency Measurement System Based on Different Frequency Phase Processing (in Chinese) http://xbzrb.tjujournals.com/oa/pdfdow.aspx?Type=pdf&FileName=11acd53a-876d-4ab0-8906-572aa3836215.pdf A 51-dB SNDR DCO-Based TDC Using Two-Stage Second-Order Noise Shaping http://www28.cs.kobe-u.ac.jp/pdf/1205_konishi_iscas.pdf Integrated High-Resolution Multi-Channel Time-to-Digital Converters (TDCs) for PET Imaging - Discusses 100 fs Gated-ring-oscillator (GRO) http://cdn.intechopen.com/pdfs-wm/12913.pdf A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs http://arxiv.org/pdf/1303.6840v1.pdf A High-Resolution Flash Time-to-Digital Converter Taking Into Account Process Variability http://conferences.computer.org/async2007/PRS/15-minas-async07.pdf Principles and Instrumentation in Time-of-flight Mass Spectrometry http://www.wiley.com/legacy/wileychi/ms/articles/1519_a.pdf TEMPERATURE SENSING CRYSTAL HTS-206 - maybe more stable than thermistor http://www.abcelectronique.fr/composants/telechargement_datasheet.php?id=385911&part-number=HTS-206 A novel method of measurement of time and amplitude of analog signals based solely on FPGA units http://koza.if.uj.edu.pl/pet-symposium-2013/talks/17.pdf A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter in a Field Programmable Gate Array http://iopscience.iop.org/1748-0221/7/02/C02004/pdf/1748-0221_7_02_C02004.pdf A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA on the GANDALF module http://iopscience.iop.org/1748-0221/7/03/C03008/pdf/1748-0221_7_03_C03008.pdf FPGA Based Data Digitisation with Commercial Elements http://indico.scc.kit.edu/indico/getFile.py/access?contribId=4&sessionId=4&resId=0&materialId=slides&confId=21 Time-to-Digital Converter Architecture with Residue Arithmetic and its FPGA Implementation http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2014/2014-11li_congbing2.pdf An FPGA-Integrated Time-to-Digital Converter Based on a Ring Oscillator for Programmable Delay Line Resolution Measurement - 0.4 ps Xilinx FPGA http://downloads.hindawi.com/journals/jece/2014/230803.pdf First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter - Gated Ring Oscillator based TDC http://ims.unipv.it/~franco/ConferenceProc/313.pdf A High Resolution FPGA-based TDC with Nonlinearity Calibration http://www2.ess.nthu.edu.tw/~cwlu/conference/5_A%20High%20Resolution%20FPGA-based%20TDC%20with.pdf A Single-Slope 80MS/s ADC using Two-Step Time-to-Digital Conversion http://dspace.mit.edu/openaccess-disseminate/1721.1/60073 Simulation of ps-Detector Electronics http://hep.uchicago.edu/workshops/2005-picosecond/8-Fukun_Tang_ps_sim.ppt High Precision Time and Frequency Counter for Mobile Applications http://www.wseas.us/e-library/transactions/circuits/2010/89-747.pdf Time-to-Digital Converter based on Analog Time Expansion for 3D Time of Flight Cameras https://pure.ltu.se/portal/files/95016947/90220A.pdf A Pc-Based Time Interval Counter With 200 Ps Resolution http://www.dtic.mil/get-tr-doc/pdf?AD=ADA427911 The Development of Large-area, Picosecond Resolution, Time-of-Flight Detectors http://hep.uchicago.edu/~frisch/adr.pdf Low-Voltage High-Frequency Gated Ring Oscillator Using Bootstrap Technique http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2012/AMDE2012_Kamiyama.pdf High-resolution short time interval measurement system implemented in a single FPGA chip http://download.springer.com/static/pdf/727/art%253A10.1007%252Fs11434-011-4421-3.pdf?auth66=1418360984_e35e8a8588d3977c4d4d4d2109c1aaaa&ext=.pdf Implementation of sub-nanosecond time-to-digital convertor in field-programmable gate array https://hal.archives-ouvertes.fr/in2p3-00873192/PDF/articleMST_Marteau-et-al_v1.pdf New Jitter Measurement Technique Using TDC Principle in a FPGA Component http://www.inatel.br/biblioteca/component/docman/doc_download/3831-new-jitter-measurement-technique-using-tdc-principle High Resolution Modular Time Interval Counter http://ilrs.gsfc.nasa.gov/docs/timing/artyukh_time_interval_counter.pdf Using Dynamic Reconfiguration to Implement High-Resolution Programmable Delays on an FPGA http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDaigneaultDavidNEWCAS08.pdf A 2.6ps rms -Period-Jitter 900MHz All-Digital Fractional-N PLL Built with Standard Cells http://www-bsac.eecs.berkeley.edu/publications/search/send_publication_pdf2client.php?pubID=1307595132 C111 / P111 4 channel Time to Digital Converter User's manual http://www.esrf.eu/files/live/sites/www/files/Instrumentation/DetectorsAndElectronics/Units/Electronics/digital-electronics-lab/c111.pdf Carry-chain propagation delay impacts on resolution of FPGA-based TDC http://www.j.sinap.ac.cn/nst/EN/article/downloadArticleFile.do?attachType=PDF&id=457 A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source Applications http://ens.ewi.tudelft.nl/pubs/charbon12tcas_favi.pdf A data driven high performance Time to Digital Converter http://ph-collectif-lecc-workshops.web.cern.ch/ph-collectif-lecc-workshops/LEB00_Book/tracker/christiansen_track.pdf On-Chip Timing Measurement Architecture with Femtosecond Resolution http://eprints.soton.ac.uk/262543/1/collinsm_timemeasurement2.pdf A 13b 315fs rms 2mW 500MS/s 1MHz Bandwidth Highly Digital Time-to-Digital Converter Using Switched Ring Oscillators http://www.cse.psu.edu/~xydong/files/proceedings/ISSCC2012/files/D27_04.pdf A high resolution Time-to-Digital Converter on FPGA for Time-Correlated Single Photon Counting http://libgen.org/scimag/get.php?doi=10.1109/mwscas.2012.6292166 A Design of Vernier Coarse-Fine Time-to-Digital Converter using Single Time Amplifier http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2012/v12n4/E1STAN_2012_v12n4_411.pdf All Digital Time-to-Digital Converter with High Resolution and Wide Detect Range http://www.engineeringletters.com/issues_v19/issue_3/EL_19_3_16.pdf Examples of 1 PPS Clock Measuring Systems http://www.wriley.com/Examples%20of%201%20PPS%20Clock%20Measuring%20Systems.pdf On-Chip Processing for the Wave Union TDC Implemented in FPGA http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-275-e.pdf 18-channel FPGA Wave Union TDC for Time-of-Flight Applications http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-573-ppd.pdf A 96-channel FPGA-based Time-to-Digital Converter (TDC) http://www.phys.sinica.edu.tw/~e906/WWW_public/Doc/TDC/FPGA_TDC.pdf Design of FPGA-based TDC for the ICAL Detector of India-based Neutrino Observatory http://www.hecr.tifr.res.in/~sudeshnadg/publication/FPGA_TDC.pdf FPGA based Time-to-Digital Converter http://www.sympnp.org/proceedings/56/G7.pdf A Flash Time-to-Digital Converter with Two Independent Time Coding Lines IMEKO-IWADC-2011-12.pdf http://www.imeko.org/publications/iwadc-2011/IMEKO-IWADC-2011-12.pdf A 17ps Time-to-Digital Converter Implemented in 65nm FPGA Technology http://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 um CMOS Technology http://www.eng.auburn.edu/~daifa01/Top/PubPapers/2010/Jpaper2010-02.pdf A high-speed wide dynamic range time-to-digital converter http://www.ssl.berkeley.edu/~mlampton/LamptonRaffanti.pdf High Resolution Time-Interval Measurement Systems Applied To Flow Measurement http://www.metrology.pg.gda.pl/full/2014/M&MS_2014_077.pdf Accurate time interval measurement electronics for pulsed time of flight laser radar http://www.ee.oulu.fi/~kari/Papers/Nantes1997.pdf Signal Processing for Pico-second Resolution Timing Measurements http://psec.uchicago.edu/Papers/NIM_v8b_final.pdf High-Resolution Time-to-Digital Converter in Field Programmable Gate Array http://cds.cern.ch/record/1158663/files/p383.pdf Random Errors in Time Interval Measurement Based on SAW Filter Excitation http://libgen.org/scimag/get.php?doi=10.1109/tim.2007.915465 A 96-channel, 500 ps resolution TDC board for the BaBar experiment at SLAC http://www.ge.infn.it/babar/ITB/RT99/paper.pdf A Cyclic Vernier TDC for ADPLLs Synthesized From a Standard Cell Library http://wwweb.eecs.umich.edu/wics/publications/Park_TCASI2011.pdf Nonlinearity Correction of the Integrated Time-to-Digital Converter with Direct Coding http://libgen.org/scimag/get.php?doi=10.1109/19.571882 PICTIC Interpolator Linearity http://www.wriley.com/PICTIC%20Interpolator%20Linearity.pdf Firmware-only Implementation of Time-to-Digital Converter (TDC) in Field-Programmable Gate Array (FPGA) http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID26522.pdf High-Precise Portable Time Interval and Frequency Counter http://tycho.usno.navy.mil/ptti/2012papers/PTTI2012.p247.pdf FPGA-based time counters with a wander measurement mode http://www.pwt.et.put.poznan.pl/PWT_2012/PWT%202012_2242.pdf The Simple PICTIC http://www.ko4bb.com/dokuwiki/lib/exe/fetch.php?id=precision_timing%3Apictic&cache=cache&media=precision_timing:simple_pictic.pdf A Saw-tooth Wave Based Design of Time to Digital Converter http://www.wseas.us/e-library/conferences/2009/budapest/SMO/SMO68.pdf A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping http://www.cppsim.org/Publications/JNL/straayer_jssc09.pdf Micrel LVPECL, CML 5GHz - 7GHz Buffer http://www.micrel.com/_PDF/Eval-Board/sy58011-12-13u_eb.pdf Micrel LVPECL, CML 4GbpS - 10.7Gbps Multiplexer http://www.micrel.com/_PDF/Eval-Board/sy58017-18-19u_eb.pdf A flash high-precision Time-to-Digital Converter implemented in FPGA technology http://indico.cern.ch/event/49682/session/35/contribution/3/material/slides/0.ppt FPGA-Based High Area Efficient Time-To-Digital IP Design http://www.ifm.umich.mx/~villasen/TESIS/Mario/TDC.pdf Firmware-only Implementation of Time-to-Digital Converter (TDC) in FPGA http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/tdc1s.pdf A Time-To-Digital Converter (TDC) https://indico.phys.hawaii.edu/getFile.py/access?contribId=4&resId=0&materialId=slides&confId=392 96-Channel FPGA-Based Time-To-Digital Converter http://hep.uchicago.edu/~frisch/TDC_NIM_v12.pdf Texas Instruments THS788 Quad-Channel Time Measurement Unit (TMU) http://www.ti.com/lit/ds/symlink/ths788.pdf A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA on the GANDALF module http://wwwhad.physik.uni-freiburg.de/gandalf/modules/download_gallery/dl.php?file=59 Vernier's Delay Line Time-to-Digital Converter http://www.np.ac.rs/yu/preuzimanjasve/publications/vol1br1/181-verniers-delay-line-time-to-digital-converter/download Time-to-Digit Converter Based on Radiation-Tolerant FPGA - Interesting calibration analysis http://kmlinux.fjfi.cvut.cz/~vacekmic/docs/vzlu_tdc.pdf A High-Resolution Time-to-Digital Converter Implemented in Field-Programmable-Gate-Arrays http://mi.sibet.cas.cn/zlgx/201310/W020131024537685817071.pdf Picosecond Resolution Time-to-Digital Converter Using G m -C Integrator and SAR-ADC http://www.ssc.pe.titech.ac.jp/publications/2014/IEEE_trans/xu/Xu_GmTDC_Journal_Final_V5.pdf A Design of Vernier Coarse-Fine Time-to-Digital Converter using Single Time Amplifier http://www.jsts.org/html/journal/journal_files/2012/12/Year2012Volume12_04_05.pdf Patents Burbeck METHOD AND APPARATUS FOR AUTOMATICALLY MEASURING TIME INTERVALS https://patentimages.storage.googleapis.com/pdfs/US2665410.pdf Frady DOUBLE INTERPOLATION METHOD AND APPARATUS FOR MEASURING TIME INTERVALS https://patentimages.storage.googleapis.com/pdfs/US2665411.pdf Bagley ELECTRONIC INTERPOLATING COUNTER FQR THE TIME INTERVAL AND FREQUENCY MEASUREMENT https://patentimages.storage.googleapis.com/pdfs/US3133189.pdf Nutt DIGITAL INTERVALOMETER https://patentimages.storage.googleapis.com/pdfs/US3983481.pdf Janowitz TIME INTERVAL MEASUREMENT METHOD AND APPARATUS https://patentimages.storage.googleapis.com/pdfs/US3999128.pdf Thornton HIGH RESOLUTION DATA ACQUISITION http://patentimages.storage.googleapis.com/pdfs/US5200933.pdf Condreva HIGH RESOLUTION TIME INTERVAL COUNTER https://patentimages.storage.googleapis.com/pdfs/US5333162.pdf Kattan TIME INTERVAL ANALYZER HAVING MULTIPLE MEASUREMENT CIRCUITS http://patentimages.storage.googleapis.com/pdfs/US6226231.pdf Nair CORRECTION FOR PIPELINED ANALOG TO DIGITAL (A/D) CONVERTER http://patentimages.storage.googleapis.com/pdfs/US6784814.pdf Gao HIGH RESOLUTION SAMPLING-BASED TIME TO DIGITAL CONVERTER http://patentimages.storage.googleapis.com/pdfs/US8564471.pdf Thesis An Integrated Cmos High Precision Time-To-Digital Converter Based On Stabilised Three-Stage Delay Line Interpolation - Excellent review http://herkules.oulu.fi/isbn951427461X/isbn951427461X.pdf Multi-Path Differential Delay Line based Time-to-Digital Converter for ADPLL http://www.diva-portal.org/smash/get/diva2:635168/FULLTEXT01.pdf Noise Shaping Techniques for Analog and Time to Digital Converters Using Voltage Controlled Oscillators http://cppsim.org/Publications/Theses/straayer_phdthesis.pdf Implementation of the high resolution high dynamic Time to Digital Converter https://www.politesi.polimi.it/bitstream/10589/92658/1/Thesis_V1.0.2_Build04031059.pdf A Stabilized Multi- Channel Cmos Time-To- Digital Converter Based On A Low Frequency Reference http://herkules.oulu.fi/isbn9789514299322/isbn9789514299322.pdf
BC
Bob Camp
Mon, Dec 15, 2014 12:52 PM

On Dec 15, 2014, at 2:27 AM, Mike Monett timenuts@binsamp.e4ward.com wrote:

Hi

On Dec 10, 2014, at 11:12 PM, Mike Monett
timenuts@binsamp.e4ward.com wrote:

[...]

Can you tell me some of the ones that do?

I have yet to see one for under $2K that does it correctly. I
don't have the cash to buy ones at those sort of prices. Some
have reported that the old Motorola UT's will do it. The samples
I have tried have not done very well. I may have not had them
running right who knows.

OK, that pretty much eliminates the NIST data.

or means that more research is needed on single sat boards. There
are a lot of them out there.

What is a "single sat board" and can you give some examples?

A GPS module that will correctly and accurately report the time solutions for each and every satellite that it’s using as part of the total timing solution. An alternative might be to take RINEX data out of a module and post process that yourself. The intent is to be able to say “this sat told me I’m 15.32 ns fast”. You then look at somebody else’s data and they say “same sat told me I’m 17.82 ns slow”.

  1. Feed that into your control loop equation.

There's another term I need to research!

It's not a simple control process, but it's not all that
terrible either. It just takes a bit of work to optimize. Figure
a few months to a few years for the optimization depending on
what you have for issues along the way.

OK, so I figure out how to do this. How do I tell if this is
making the gpsdo more accurate? In other words, how do I get
the ADEV without having an H-Maser?

You get a Cs (or other atomic standard) or you compare several
different GPSDO's against each other. The preference would be
for groups of three so you can rule out ones that are not doing
what they should.

The ideal would be > 3 TBolts, > 3 same model Rb's, > 3 same model
OCXO's and more than three groups overall. Each has their own ADEV
curve. Comparing devices with vastly different ADEV is not the
best way to go.

Yes, that makes good sense.

[...]

There are many new dacs, op amps, and bipolar microwave devices
that offer much lower noise than current designs use. I think the
performance can be improved in some areas with new components and
design techniques, and I have equipment and time to explore.

There are only two points that system noise really comes into the
GPSDO design:

  1. The TDC must have enough resolution
  1. The DAC on the EFC must have noise below the OCXO

I was more thinking of the Rubidium physics package. Most of the
Rubidiums on eBay are pretty old.

The lamp must have constant intensity. The null detector has to
identify a very shallow drop. The microwave signal needs to have
excellent phase noise.

These all need low noise, low flicker components, and significant
advances have been made in recent years. The surrounding circuitry
could probably benefit from a redesign to take better advantage of
low noise components. For example, SRD's are much noisier than NLTL's.

Probably little can be done to improve the Rubidium cell, but it
should be the limiting factor and not the electronics.

The small Rb’s are designed for a target cost. There is very little interest in fancy Rb’s. That low cost target does indeed impact the physics package.

The TDC is limited by the basic resolution of the GPS system. It's
easy to build one that has far more resolution than needed /
useful.

Some people have little faith:)

Which is indeed a good thing at first. The GPS output is (at best) a 100 ps sort of thing. Each time I say that others will pop up and suggest that it’s closer to 1 ns. Either way, the demands on the TDC are not all that major. The long term (as opposed to 1 second) error on the GPS signal are likely closer to a couple of ns than to the number 0.1 or 1 ns level.

The DAC issue is normally solved with a < $4 part. Unless you have
an OCXO with a very wide EFC range, it's noise is unlikely to be
an issue. DAC resolution can be addressed to any desired level
with two DAC's (fine and coarse). (Once you get going, you only
use the fine DAC).

The real "fun and games" revolves around the software used to
implement the filtering / control loop between the GPS and the
OCXO (or Rb, or TCXO, or MEMS, or VCXO, or Cs or 
)

Focus on the software.

Bob

I have a few Rubidiums and OCXOs I'd like to get running for a month
or so to stabilize. During this time, I'd like to monitor the
performance to discover any bad units and see which are the best
ones.

For example, TVB shows a 100:1 variation in ADEV in FE-405B
Rubidiums. The section is titled "Variation in FE-405B" in

http://leapsecond.com/pages/fe405/

I’m not a 405 expert, but I believe the 405 is OCXO based.

Clearly, it would be futile to try to use a bad unit in setting up a
gpsdo.

I need some means of measuring the performance of these units while
they are running. A dozen HP5370's would be out of the question. I
did some research to find the different methods available and decide
which has the lowest per-channel cost and best performance.

Here are some of the references I found. I discarded most of the poor ones
and tried to keep only the ones that talk about measurements in the
picosecond or femtosecond range.

I did not include DMTD since the concept is so simple.

I would count on building at least a 4 channel version

The Reviews help to
get oriented, but sometimes it takes reading the papers and the patents to
see the timing diagrams and understand what the author is trying to do.

There are many different variations on the FPGA approach. I would be
concerned about the development time, the large DNL, and the problems with
crosstalk on multi-channel units.

Cross talk is a limit on any multi channel setup. The FPGA based stuff is quite temperature and voltage sensitive.

The TI THS788 looks good on paper, but it is single-source, not well
stocked, and there is lttle information on crosstalk between channels. It
is also quite expensive per channel. There are no application notes and
little or no information on usage on the web.

It works, but I don’t know how well. I got pulled off the board before the project completed.

Bob

The Thesis generally have excellent reviews worth reading.

Articles

Simple PICTIC 250ps time interval counter
http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:pictic

Griffiths Time to Digital converters
http://www.ko4bb.com/~bruce/TDC.html

[time-nuts] Experience with THS788 from TI?-
Attila Kinali's post on TDC methods
https://www.febo.com/pipermail/time-nuts/2012-March/065337.html

Reviews

Review of methods for time interval measurements with picosecond
resolution
http://ztc.wel.wat.edu.pl/met4_1_004.pdf

Low resource FPGA-based 32 Channel Time to Digital Converter

Design, construction and tests of a high resolution, high dynamic
range Time to Digital Converter

Review Of Sub-Nanosecond Time-Interval Measurements
http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-1331.pdf

Chapter 1 Time Interval Measurement Literature Review
http://www.rrsg.ee.uct.ac.za/members/jon/activities/timcs.pdf

Time intervals measurements and generation methods review
http://www.ohwr.org/attachments/128/Time_Interval_Measurements_Techniques.pdf

Papers

A Cyclic CMOS Time-to-Digital Converter With Deep Sub-nanosecond
Resolution
http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021548/1/00777354.pdf

A 96-Channel FPGA-based Time-to-Digital Converter
http://arxiv.org/pdf/physics/0502062.pdf

Complete and Compact 32-Channel System for Time-Correlated
Single-Photon Counting Measurements
http://ieeexplore.ieee.org/ielx7/4563994/6588410/06617673.pdf?arnumber=6617673

Design and Development of GPS Receiver for PNSS-1
http://www.suparco.gov.pk/pages/presentations-pdf/day-1/session-2/12C-II/1.pdf

A Novel Ultra-fast High Resolution Time-domain EMI Measurement
System based on Field Programmable Gate Arrays
https://mediatum.ub.tum.de/doc/1163324/1163324.pdf

High Precision Frequency Measurement System Based on Different
Frequency Phase Processing (in Chinese)
http://xbzrb.tjujournals.com/oa/pdfdow.aspx?Type=pdf&FileName=11acd53a-876d-4ab0-8906-572aa3836215.pdf

A 51-dB SNDR DCO-Based TDC Using Two-Stage Second-Order Noise Shaping
http://www28.cs.kobe-u.ac.jp/pdf/1205_konishi_iscas.pdf

Integrated High-Resolution Multi-Channel Time-to-Digital Converters
(TDCs) for PET Imaging

A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs
http://arxiv.org/pdf/1303.6840v1.pdf

A High-Resolution Flash Time-to-Digital Converter Taking Into
Account Process Variability
http://conferences.computer.org/async2007/PRS/15-minas-async07.pdf

Principles and Instrumentation in Time-of-flight Mass Spectrometry
http://www.wiley.com/legacy/wileychi/ms/articles/1519_a.pdf

TEMPERATURE SENSING CRYSTAL HTS-206

A novel method of measurement of time and amplitude of analog
signals based solely on FPGA units
http://koza.if.uj.edu.pl/pet-symposium-2013/talks/17.pdf

A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter
in a Field Programmable Gate Array
http://iopscience.iop.org/1748-0221/7/02/C02004/pdf/1748-0221_7_02_C02004.pdf

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA
on the GANDALF module
http://iopscience.iop.org/1748-0221/7/03/C03008/pdf/1748-0221_7_03_C03008.pdf

FPGA Based Data Digitisation with Commercial Elements
http://indico.scc.kit.edu/indico/getFile.py/access?contribId=4&sessionId=4&resId=0&materialId=slides&confId=21

Time-to-Digital Converter Architecture with Residue Arithmetic and
its FPGA Implementation
http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2014/2014-11li_congbing2.pdf

An FPGA-Integrated Time-to-Digital Converter Based on a Ring
Oscillator for Programmable Delay Line Resolution Measurement

First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter

A High Resolution FPGA-based TDC with Nonlinearity Calibration
http://www2.ess.nthu.edu.tw/~cwlu/conference/5_A%20High%20Resolution%20FPGA-based%20TDC%20with.pdf

A Single-Slope 80MS/s ADC using Two-Step Time-to-Digital Conversion
http://dspace.mit.edu/openaccess-disseminate/1721.1/60073

Simulation of ps-Detector Electronics
http://hep.uchicago.edu/workshops/2005-picosecond/8-Fukun_Tang_ps_sim.ppt

High Precision Time and Frequency Counter for Mobile Applications
http://www.wseas.us/e-library/transactions/circuits/2010/89-747.pdf

Time-to-Digital Converter based on Analog Time Expansion for 3D Time
of Flight Cameras
https://pure.ltu.se/portal/files/95016947/90220A.pdf

A Pc-Based Time Interval Counter With 200 Ps Resolution
http://www.dtic.mil/get-tr-doc/pdf?AD=ADA427911

The Development of Large-area, Picosecond Resolution, Time-of-Flight
Detectors
http://hep.uchicago.edu/~frisch/adr.pdf

Low-Voltage High-Frequency Gated Ring Oscillator Using Bootstrap
Technique
http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2012/AMDE2012_Kamiyama.pdf

High-resolution short time interval measurement system implemented
in a single FPGA chip
http://download.springer.com/static/pdf/727/art%253A10.1007%252Fs11434-011-4421-3.pdf?auth66=1418360984_e35e8a8588d3977c4d4d4d2109c1aaaa&ext=.pdf

Implementation of sub-nanosecond time-to-digital convertor in
field-programmable gate array
https://hal.archives-ouvertes.fr/in2p3-00873192/PDF/articleMST_Marteau-et-al_v1.pdf

New Jitter Measurement Technique Using TDC Principle in a FPGA
Component
http://www.inatel.br/biblioteca/component/docman/doc_download/3831-new-jitter-measurement-technique-using-tdc-principle

High Resolution Modular Time Interval Counter
http://ilrs.gsfc.nasa.gov/docs/timing/artyukh_time_interval_counter.pdf

Using Dynamic Reconfiguration to Implement High-Resolution
Programmable Delays on an FPGA
http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDaigneaultDavidNEWCAS08.pdf

A 2.6ps rms -Period-Jitter 900MHz All-Digital Fractional-N PLL Built
with Standard Cells
http://www-bsac.eecs.berkeley.edu/publications/search/send_publication_pdf2client.php?pubID=1307595132

C111 / P111 4 channel Time to Digital Converter User's manual
http://www.esrf.eu/files/live/sites/www/files/Instrumentation/DetectorsAndElectronics/Units/Electronics/digital-electronics-lab/c111.pdf

Carry-chain propagation delay impacts on resolution of FPGA-based TDC
http://www.j.sinap.ac.cn/nst/EN/article/downloadArticleFile.do?attachType=PDF&id=457

A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source
Applications
http://ens.ewi.tudelft.nl/pubs/charbon12tcas_favi.pdf

A data driven high performance Time to Digital Converter
http://ph-collectif-lecc-workshops.web.cern.ch/ph-collectif-lecc-workshops/LEB00_Book/tracker/christiansen_track.pdf

On-Chip Timing Measurement Architecture with Femtosecond Resolution
http://eprints.soton.ac.uk/262543/1/collinsm_timemeasurement2.pdf

A 13b 315fs rms 2mW 500MS/s 1MHz Bandwidth Highly Digital
Time-to-Digital Converter Using Switched Ring Oscillators
http://www.cse.psu.edu/~xydong/files/proceedings/ISSCC2012/files/D27_04.pdf

A high resolution Time-to-Digital Converter on FPGA for
Time-Correlated Single Photon Counting
http://libgen.org/scimag/get.php?doi=10.1109/mwscas.2012.6292166

A Design of Vernier Coarse-Fine Time-to-Digital Converter using
Single Time Amplifier
http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2012/v12n4/E1STAN_2012_v12n4_411.pdf

All Digital Time-to-Digital Converter with High Resolution and Wide
Detect Range
http://www.engineeringletters.com/issues_v19/issue_3/EL_19_3_16.pdf

Examples of 1 PPS Clock Measuring Systems
http://www.wriley.com/Examples%20of%201%20PPS%20Clock%20Measuring%20Systems.pdf

On-Chip Processing for the Wave Union TDC Implemented in FPGA
http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-275-e.pdf

18-channel FPGA Wave Union TDC for Time-of-Flight Applications
http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-573-ppd.pdf

A 96-channel FPGA-based Time-to-Digital Converter (TDC)
http://www.phys.sinica.edu.tw/~e906/WWW_public/Doc/TDC/FPGA_TDC.pdf

Design of FPGA-based TDC for the ICAL Detector of India-based
Neutrino Observatory
http://www.hecr.tifr.res.in/~sudeshnadg/publication/FPGA_TDC.pdf

FPGA based Time-to-Digital Converter
http://www.sympnp.org/proceedings/56/G7.pdf

A Flash Time-to-Digital Converter with Two Independent Time Coding
Lines
IMEKO-IWADC-2011-12.pdf
http://www.imeko.org/publications/iwadc-2011/IMEKO-IWADC-2011-12.pdf

A 17ps Time-to-Digital Converter Implemented in 65nm FPGA Technology
http://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf

A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 um CMOS Technology
http://www.eng.auburn.edu/~daifa01/Top/PubPapers/2010/Jpaper2010-02.pdf

A high-speed wide dynamic range time-to-digital converter
http://www.ssl.berkeley.edu/~mlampton/LamptonRaffanti.pdf

High Resolution Time-Interval Measurement Systems Applied To Flow
Measurement
http://www.metrology.pg.gda.pl/full/2014/M&MS_2014_077.pdf

Accurate time interval measurement electronics for pulsed time of
flight laser radar
http://www.ee.oulu.fi/~kari/Papers/Nantes1997.pdf

Signal Processing for Pico-second Resolution Timing Measurements
http://psec.uchicago.edu/Papers/NIM_v8b_final.pdf

High-Resolution Time-to-Digital Converter in Field Programmable Gate Array
http://cds.cern.ch/record/1158663/files/p383.pdf

Random Errors in Time Interval Measurement Based on SAW Filter Excitation
http://libgen.org/scimag/get.php?doi=10.1109/tim.2007.915465

A 96-channel, 500 ps resolution TDC board for the BaBar experiment at SLAC
http://www.ge.infn.it/babar/ITB/RT99/paper.pdf

A Cyclic Vernier TDC for ADPLLs Synthesized From a Standard Cell Library
http://wwweb.eecs.umich.edu/wics/publications/Park_TCASI2011.pdf

Nonlinearity Correction of the Integrated Time-to-Digital Converter
with Direct Coding
http://libgen.org/scimag/get.php?doi=10.1109/19.571882

PICTIC Interpolator Linearity
http://www.wriley.com/PICTIC%20Interpolator%20Linearity.pdf

Firmware-only Implementation of Time-to-Digital Converter (TDC) in
Field-Programmable Gate Array (FPGA)
http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID26522.pdf

High-Precise Portable Time Interval and Frequency Counter
http://tycho.usno.navy.mil/ptti/2012papers/PTTI2012.p247.pdf

FPGA-based time counters with a wander measurement mode
http://www.pwt.et.put.poznan.pl/PWT_2012/PWT%202012_2242.pdf

The Simple PICTIC
http://www.ko4bb.com/dokuwiki/lib/exe/fetch.php?id=precision_timing%3Apictic&cache=cache&media=precision_timing:simple_pictic.pdf

A Saw-tooth Wave Based Design of Time to Digital Converter
http://www.wseas.us/e-library/conferences/2009/budapest/SMO/SMO68.pdf

A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping
http://www.cppsim.org/Publications/JNL/straayer_jssc09.pdf

Micrel LVPECL, CML 5GHz - 7GHz Buffer
http://www.micrel.com/_PDF/Eval-Board/sy58011-12-13u_eb.pdf

Micrel LVPECL, CML 4GbpS - 10.7Gbps Multiplexer
http://www.micrel.com/_PDF/Eval-Board/sy58017-18-19u_eb.pdf

A flash high-precision Time-to-Digital Converter implemented in FPGA
technology
http://indico.cern.ch/event/49682/session/35/contribution/3/material/slides/0.ppt

FPGA-Based High Area Efficient Time-To-Digital IP Design
http://www.ifm.umich.mx/~villasen/TESIS/Mario/TDC.pdf

Firmware-only Implementation of Time-to-Digital Converter (TDC) in FPGA
http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/tdc1s.pdf

A Time-To-Digital Converter (TDC)
https://indico.phys.hawaii.edu/getFile.py/access?contribId=4&resId=0&materialId=slides&confId=392

96-Channel FPGA-Based Time-To-Digital Converter
http://hep.uchicago.edu/~frisch/TDC_NIM_v12.pdf

Texas Instruments THS788 Quad-Channel Time Measurement Unit (TMU)
http://www.ti.com/lit/ds/symlink/ths788.pdf

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA
on the GANDALF module
http://wwwhad.physik.uni-freiburg.de/gandalf/modules/download_gallery/dl.php?file=59

Vernier's Delay Line Time-to-Digital Converter
http://www.np.ac.rs/yu/preuzimanjasve/publications/vol1br1/181-verniers-delay-line-time-to-digital-converter/download

Time-to-Digit Converter Based on Radiation-Tolerant FPGA

A High-Resolution Time-to-Digital Converter Implemented in
Field-Programmable-Gate-Arrays
http://mi.sibet.cas.cn/zlgx/201310/W020131024537685817071.pdf

Picosecond Resolution Time-to-Digital Converter Using G m -C
Integrator and SAR-ADC
http://www.ssc.pe.titech.ac.jp/publications/2014/IEEE_trans/xu/Xu_GmTDC_Journal_Final_V5.pdf

A Design of Vernier Coarse-Fine Time-to-Digital Converter using
Single Time Amplifier
http://www.jsts.org/html/journal/journal_files/2012/12/Year2012Volume12_04_05.pdf

Patents

Burbeck METHOD AND APPARATUS FOR AUTOMATICALLY MEASURING TIME
INTERVALS
https://patentimages.storage.googleapis.com/pdfs/US2665410.pdf

Frady DOUBLE INTERPOLATION METHOD AND APPARATUS FOR MEASURING TIME
INTERVALS
https://patentimages.storage.googleapis.com/pdfs/US2665411.pdf

Bagley ELECTRONIC INTERPOLATING COUNTER FQR THE TIME INTERVAL AND
FREQUENCY MEASUREMENT
https://patentimages.storage.googleapis.com/pdfs/US3133189.pdf

Nutt DIGITAL INTERVALOMETER
https://patentimages.storage.googleapis.com/pdfs/US3983481.pdf

Janowitz TIME INTERVAL MEASUREMENT METHOD AND APPARATUS
https://patentimages.storage.googleapis.com/pdfs/US3999128.pdf

Thornton HIGH RESOLUTION DATA ACQUISITION
http://patentimages.storage.googleapis.com/pdfs/US5200933.pdf

Condreva HIGH RESOLUTION TIME INTERVAL COUNTER
https://patentimages.storage.googleapis.com/pdfs/US5333162.pdf

Kattan TIME INTERVAL ANALYZER HAVING MULTIPLE MEASUREMENT CIRCUITS
http://patentimages.storage.googleapis.com/pdfs/US6226231.pdf

Nair CORRECTION FOR PIPELINED ANALOG TO DIGITAL (A/D) CONVERTER
http://patentimages.storage.googleapis.com/pdfs/US6784814.pdf

Gao HIGH RESOLUTION SAMPLING-BASED TIME TO DIGITAL CONVERTER
http://patentimages.storage.googleapis.com/pdfs/US8564471.pdf

Thesis

An Integrated Cmos High Precision Time-To-Digital Converter Based On
Stabilised Three-Stage Delay Line Interpolation

Multi-Path Differential Delay Line based Time-to-Digital Converter
for ADPLL
http://www.diva-portal.org/smash/get/diva2:635168/FULLTEXT01.pdf

Noise Shaping Techniques for Analog and Time to Digital Converters
Using Voltage Controlled Oscillators
http://cppsim.org/Publications/Theses/straayer_phdthesis.pdf

Implementation of the high resolution high dynamic Time to Digital
Converter
https://www.politesi.polimi.it/bitstream/10589/92658/1/Thesis_V1.0.2_Build04031059.pdf

A Stabilized Multi- Channel Cmos Time-To- Digital Converter Based On
A Low Frequency Reference
http://herkules.oulu.fi/isbn9789514299322/isbn9789514299322.pdf


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.

> On Dec 15, 2014, at 2:27 AM, Mike Monett <timenuts@binsamp.e4ward.com> wrote: > >> Hi > >>> On Dec 10, 2014, at 11:12 PM, Mike Monett >>> <timenuts@binsamp.e4ward.com> wrote: > > [...] > >>>>> Can you tell me some of the ones that do? > >>>> I have yet to see one for under $2K that does it correctly. I >>>> don't have the cash to buy ones at those sort of prices. Some >>>> have reported that the old Motorola UT's will do it. The samples >>>> I have tried have not done very well. I may have not had them >>>> running right who knows. > >>> OK, that pretty much eliminates the NIST data. > >> or means that more research is needed on single sat boards. There >> are a *lot* of them out there. > > What is a "single sat board" and can you give some examples? A GPS module that will correctly and accurately report the time solutions for each and every satellite that it’s using as part of the total timing solution. An alternative might be to take RINEX data out of a module and post process that yourself. The intent is to be able to say “this sat told me I’m 15.32 ns fast”. You then look at somebody else’s data and they say “same sat told me I’m 17.82 ns slow”. > >>>>>> 5) Feed that into your control loop equation. > >>>>> There's another term I need to research! > >>>> It's not a simple control process, but it's not all that >>>> terrible either. It just takes a bit of work to optimize. Figure >>>> a few months to a few years for the optimization depending on >>>> what you have for issues along the way. > >>>>> OK, so I figure out how to do this. How do I tell if this is >>>>> making the gpsdo more accurate? In other words, how do I get >>>>> the ADEV without having an H-Maser? > >>>> You get a Cs (or other atomic standard) or you compare several >>>> different GPSDO's against each other. The preference would be >>>> for groups of three so you can rule out ones that are not doing >>>> what they should. > >> The ideal would be > 3 TBolts, > 3 same model Rb's, > 3 same model >> OCXO's and more than three groups overall. Each has their own ADEV >> curve. Comparing devices with vastly different ADEV is not the >> best way to go. > > Yes, that makes good sense. > > [...] > >>> There are many new dacs, op amps, and bipolar microwave devices >>> that offer much lower noise than current designs use. I think the >>> performance can be improved in some areas with new components and >>> design techniques, and I have equipment and time to explore. > >> There are only two points that system noise really comes into the >> GPSDO design: > >> 1) The TDC must have enough resolution > >> 2) The DAC on the EFC must have noise below the OCXO > > I was more thinking of the Rubidium physics package. Most of the > Rubidiums on eBay are pretty old. > > The lamp must have constant intensity. The null detector has to > identify a very shallow drop. The microwave signal needs to have > excellent phase noise. > > These all need low noise, low flicker components, and significant > advances have been made in recent years. The surrounding circuitry > could probably benefit from a redesign to take better advantage of > low noise components. For example, SRD's are much noisier than NLTL's. > > Probably little can be done to improve the Rubidium cell, but it > should be the limiting factor and not the electronics. The small Rb’s are designed for a target cost. There is very little interest in fancy Rb’s. That low cost target does indeed impact the physics package. > >> The TDC is limited by the basic resolution of the GPS system. It's >> easy to build one that has far more resolution than needed / >> useful. > > Some people have little faith:) Which is indeed a good thing at first. The GPS output is (at best) a 100 ps sort of thing. Each time I say that others will pop up and suggest that it’s closer to 1 ns. Either way, the demands on the TDC are not all that major. The long term (as opposed to 1 second) error on the GPS signal are likely closer to a couple of ns than to the number 0.1 or 1 ns level. > >> The DAC issue is normally solved with a < $4 part. Unless you have >> an OCXO with a very wide EFC range, it's noise is unlikely to be >> an issue. DAC resolution can be addressed to any desired level >> with two DAC's (fine and coarse). (Once you get going, you only >> use the fine DAC). > >> The real "fun and games" revolves around the software used to >> implement the filtering / control loop between the GPS and the >> OCXO (or Rb, or TCXO, or MEMS, or VCXO, or Cs or 
) > >> Focus on the software. > >> Bob > > I have a few Rubidiums and OCXOs I'd like to get running for a month > or so to stabilize. During this time, I'd like to monitor the > performance to discover any bad units and see which are the best > ones. > > For example, TVB shows a 100:1 variation in ADEV in FE-405B > Rubidiums. The section is titled "Variation in FE-405B" in > > http://leapsecond.com/pages/fe405/ I’m not a 405 expert, but I believe the 405 is OCXO based. > > Clearly, it would be futile to try to use a bad unit in setting up a > gpsdo. > > I need some means of measuring the performance of these units while > they are running. A dozen HP5370's would be out of the question. I > did some research to find the different methods available and decide > which has the lowest per-channel cost and best performance. > > Here are some of the references I found. I discarded most of the poor ones > and tried to keep only the ones that talk about measurements in the > picosecond or femtosecond range. > > I did not include DMTD since the concept is so simple. I would count on building at least a 4 channel version > The Reviews help to > get oriented, but sometimes it takes reading the papers and the patents to > see the timing diagrams and understand what the author is trying to do. > > There are many different variations on the FPGA approach. I would be > concerned about the development time, the large DNL, and the problems with > crosstalk on multi-channel units. Cross talk is a limit on any multi channel setup. The FPGA based stuff is quite temperature and voltage sensitive. > > The TI THS788 looks good on paper, but it is single-source, not well > stocked, and there is lttle information on crosstalk between channels. It > is also quite expensive per channel. There are no application notes and > little or no information on usage on the web. It works, but I don’t know how well. I got pulled off the board before the project completed. Bob > > The Thesis generally have excellent reviews worth reading. > > Articles > > Simple PICTIC 250ps time interval counter > http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:pictic > > Griffiths Time to Digital converters > http://www.ko4bb.com/~bruce/TDC.html > > [time-nuts] Experience with THS788 from TI?- > Attila Kinali's post on TDC methods > https://www.febo.com/pipermail/time-nuts/2012-March/065337.html > > Reviews > > Review of methods for time interval measurements with picosecond > resolution > http://ztc.wel.wat.edu.pl/met4_1_004.pdf > > Low resource FPGA-based 32 Channel Time to Digital Converter > - Excellent review of TDC techniques and measurement verification > http://arxiv.org/vc/arxiv/papers/1206/1206.0679v3.pdf > > Design, construction and tests of a high resolution, high dynamic > range Time to Digital Converter > - Excellent review of TDC methods and test techniques > http://inspirehep.net/record/1313667/files/getfile.pdf > > Review Of Sub-Nanosecond Time-Interval Measurements > http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-1331.pdf > > Chapter 1 Time Interval Measurement Literature Review > http://www.rrsg.ee.uct.ac.za/members/jon/activities/timcs.pdf > > Time intervals measurements and generation methods review > http://www.ohwr.org/attachments/128/Time_Interval_Measurements_Techniques.pdf > > Papers > > A Cyclic CMOS Time-to-Digital Converter With Deep Sub-nanosecond > Resolution > http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021548/1/00777354.pdf > > A 96-Channel FPGA-based Time-to-Digital Converter > http://arxiv.org/pdf/physics/0502062.pdf > > Complete and Compact 32-Channel System for Time-Correlated > Single-Photon Counting Measurements > http://ieeexplore.ieee.org/ielx7/4563994/6588410/06617673.pdf?arnumber=6617673 > > Design and Development of GPS Receiver for PNSS-1 > http://www.suparco.gov.pk/pages/presentations-pdf/day-1/session-2/12C-II/1.pdf > > A Novel Ultra-fast High Resolution Time-domain EMI Measurement > System based on Field Programmable Gate Arrays > https://mediatum.ub.tum.de/doc/1163324/1163324.pdf > > High Precision Frequency Measurement System Based on Different > Frequency Phase Processing (in Chinese) > http://xbzrb.tjujournals.com/oa/pdfdow.aspx?Type=pdf&FileName=11acd53a-876d-4ab0-8906-572aa3836215.pdf > > A 51-dB SNDR DCO-Based TDC Using Two-Stage Second-Order Noise Shaping > http://www28.cs.kobe-u.ac.jp/pdf/1205_konishi_iscas.pdf > > Integrated High-Resolution Multi-Channel Time-to-Digital Converters > (TDCs) for PET Imaging > - Discusses 100 fs Gated-ring-oscillator (GRO) > http://cdn.intechopen.com/pdfs-wm/12913.pdf > > A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs > http://arxiv.org/pdf/1303.6840v1.pdf > > A High-Resolution Flash Time-to-Digital Converter Taking Into > Account Process Variability > http://conferences.computer.org/async2007/PRS/15-minas-async07.pdf > > Principles and Instrumentation in Time-of-flight Mass Spectrometry > http://www.wiley.com/legacy/wileychi/ms/articles/1519_a.pdf > > TEMPERATURE SENSING CRYSTAL HTS-206 > - maybe more stable than thermistor > http://www.abcelectronique.fr/composants/telechargement_datasheet.php?id=385911&part-number=HTS-206 > > A novel method of measurement of time and amplitude of analog > signals based solely on FPGA units > http://koza.if.uj.edu.pl/pet-symposium-2013/talks/17.pdf > > A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter > in a Field Programmable Gate Array > http://iopscience.iop.org/1748-0221/7/02/C02004/pdf/1748-0221_7_02_C02004.pdf > > A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA > on the GANDALF module > http://iopscience.iop.org/1748-0221/7/03/C03008/pdf/1748-0221_7_03_C03008.pdf > > FPGA Based Data Digitisation with Commercial Elements > http://indico.scc.kit.edu/indico/getFile.py/access?contribId=4&sessionId=4&resId=0&materialId=slides&confId=21 > > Time-to-Digital Converter Architecture with Residue Arithmetic and > its FPGA Implementation > http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2014/2014-11li_congbing2.pdf > > An FPGA-Integrated Time-to-Digital Converter Based on a Ring > Oscillator for Programmable Delay Line Resolution Measurement > - 0.4 ps Xilinx FPGA > http://downloads.hindawi.com/journals/jece/2014/230803.pdf > > First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter > - Gated Ring Oscillator based TDC > http://ims.unipv.it/~franco/ConferenceProc/313.pdf > > A High Resolution FPGA-based TDC with Nonlinearity Calibration > http://www2.ess.nthu.edu.tw/~cwlu/conference/5_A%20High%20Resolution%20FPGA-based%20TDC%20with.pdf > > A Single-Slope 80MS/s ADC using Two-Step Time-to-Digital Conversion > http://dspace.mit.edu/openaccess-disseminate/1721.1/60073 > > Simulation of ps-Detector Electronics > http://hep.uchicago.edu/workshops/2005-picosecond/8-Fukun_Tang_ps_sim.ppt > > High Precision Time and Frequency Counter for Mobile Applications > http://www.wseas.us/e-library/transactions/circuits/2010/89-747.pdf > > Time-to-Digital Converter based on Analog Time Expansion for 3D Time > of Flight Cameras > https://pure.ltu.se/portal/files/95016947/90220A.pdf > > A Pc-Based Time Interval Counter With 200 Ps Resolution > http://www.dtic.mil/get-tr-doc/pdf?AD=ADA427911 > > The Development of Large-area, Picosecond Resolution, Time-of-Flight > Detectors > http://hep.uchicago.edu/~frisch/adr.pdf > > Low-Voltage High-Frequency Gated Ring Oscillator Using Bootstrap > Technique > http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2012/AMDE2012_Kamiyama.pdf > > High-resolution short time interval measurement system implemented > in a single FPGA chip > http://download.springer.com/static/pdf/727/art%253A10.1007%252Fs11434-011-4421-3.pdf?auth66=1418360984_e35e8a8588d3977c4d4d4d2109c1aaaa&ext=.pdf > > Implementation of sub-nanosecond time-to-digital convertor in > field-programmable gate array > https://hal.archives-ouvertes.fr/in2p3-00873192/PDF/articleMST_Marteau-et-al_v1.pdf > > New Jitter Measurement Technique Using TDC Principle in a FPGA > Component > http://www.inatel.br/biblioteca/component/docman/doc_download/3831-new-jitter-measurement-technique-using-tdc-principle > > High Resolution Modular Time Interval Counter > http://ilrs.gsfc.nasa.gov/docs/timing/artyukh_time_interval_counter.pdf > > Using Dynamic Reconfiguration to Implement High-Resolution > Programmable Delays on an FPGA > http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDaigneaultDavidNEWCAS08.pdf > > A 2.6ps rms -Period-Jitter 900MHz All-Digital Fractional-N PLL Built > with Standard Cells > http://www-bsac.eecs.berkeley.edu/publications/search/send_publication_pdf2client.php?pubID=1307595132 > > C111 / P111 4 channel Time to Digital Converter User's manual > http://www.esrf.eu/files/live/sites/www/files/Instrumentation/DetectorsAndElectronics/Units/Electronics/digital-electronics-lab/c111.pdf > > Carry-chain propagation delay impacts on resolution of FPGA-based TDC > http://www.j.sinap.ac.cn/nst/EN/article/downloadArticleFile.do?attachType=PDF&id=457 > > A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source > Applications > http://ens.ewi.tudelft.nl/pubs/charbon12tcas_favi.pdf > > A data driven high performance Time to Digital Converter > http://ph-collectif-lecc-workshops.web.cern.ch/ph-collectif-lecc-workshops/LEB00_Book/tracker/christiansen_track.pdf > > On-Chip Timing Measurement Architecture with Femtosecond Resolution > http://eprints.soton.ac.uk/262543/1/collinsm_timemeasurement2.pdf > > A 13b 315fs rms 2mW 500MS/s 1MHz Bandwidth Highly Digital > Time-to-Digital Converter Using Switched Ring Oscillators > http://www.cse.psu.edu/~xydong/files/proceedings/ISSCC2012/files/D27_04.pdf > > A high resolution Time-to-Digital Converter on FPGA for > Time-Correlated Single Photon Counting > http://libgen.org/scimag/get.php?doi=10.1109/mwscas.2012.6292166 > > A Design of Vernier Coarse-Fine Time-to-Digital Converter using > Single Time Amplifier > http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2012/v12n4/E1STAN_2012_v12n4_411.pdf > > All Digital Time-to-Digital Converter with High Resolution and Wide > Detect Range > http://www.engineeringletters.com/issues_v19/issue_3/EL_19_3_16.pdf > > Examples of 1 PPS Clock Measuring Systems > http://www.wriley.com/Examples%20of%201%20PPS%20Clock%20Measuring%20Systems.pdf > > On-Chip Processing for the Wave Union TDC Implemented in FPGA > http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-275-e.pdf > > 18-channel FPGA Wave Union TDC for Time-of-Flight Applications > http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-573-ppd.pdf > > A 96-channel FPGA-based Time-to-Digital Converter (TDC) > http://www.phys.sinica.edu.tw/~e906/WWW_public/Doc/TDC/FPGA_TDC.pdf > > Design of FPGA-based TDC for the ICAL Detector of India-based > Neutrino Observatory > http://www.hecr.tifr.res.in/~sudeshnadg/publication/FPGA_TDC.pdf > > FPGA based Time-to-Digital Converter > http://www.sympnp.org/proceedings/56/G7.pdf > > A Flash Time-to-Digital Converter with Two Independent Time Coding > Lines > IMEKO-IWADC-2011-12.pdf > http://www.imeko.org/publications/iwadc-2011/IMEKO-IWADC-2011-12.pdf > > A 17ps Time-to-Digital Converter Implemented in 65nm FPGA Technology > http://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf > > A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 um CMOS Technology > http://www.eng.auburn.edu/~daifa01/Top/PubPapers/2010/Jpaper2010-02.pdf > > A high-speed wide dynamic range time-to-digital converter > http://www.ssl.berkeley.edu/~mlampton/LamptonRaffanti.pdf > > High Resolution Time-Interval Measurement Systems Applied To Flow > Measurement > http://www.metrology.pg.gda.pl/full/2014/M&MS_2014_077.pdf > > Accurate time interval measurement electronics for pulsed time of > flight laser radar > http://www.ee.oulu.fi/~kari/Papers/Nantes1997.pdf > > Signal Processing for Pico-second Resolution Timing Measurements > http://psec.uchicago.edu/Papers/NIM_v8b_final.pdf > > High-Resolution Time-to-Digital Converter in Field Programmable Gate Array > http://cds.cern.ch/record/1158663/files/p383.pdf > > Random Errors in Time Interval Measurement Based on SAW Filter Excitation > http://libgen.org/scimag/get.php?doi=10.1109/tim.2007.915465 > > A 96-channel, 500 ps resolution TDC board for the BaBar experiment at SLAC > http://www.ge.infn.it/babar/ITB/RT99/paper.pdf > > A Cyclic Vernier TDC for ADPLLs Synthesized From a Standard Cell Library > http://wwweb.eecs.umich.edu/wics/publications/Park_TCASI2011.pdf > > Nonlinearity Correction of the Integrated Time-to-Digital Converter > with Direct Coding > http://libgen.org/scimag/get.php?doi=10.1109/19.571882 > > PICTIC Interpolator Linearity > http://www.wriley.com/PICTIC%20Interpolator%20Linearity.pdf > > Firmware-only Implementation of Time-to-Digital Converter (TDC) in > Field-Programmable Gate Array (FPGA) > http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID26522.pdf > > High-Precise Portable Time Interval and Frequency Counter > http://tycho.usno.navy.mil/ptti/2012papers/PTTI2012.p247.pdf > > FPGA-based time counters with a wander measurement mode > http://www.pwt.et.put.poznan.pl/PWT_2012/PWT%202012_2242.pdf > > The Simple PICTIC > http://www.ko4bb.com/dokuwiki/lib/exe/fetch.php?id=precision_timing%3Apictic&cache=cache&media=precision_timing:simple_pictic.pdf > > A Saw-tooth Wave Based Design of Time to Digital Converter > http://www.wseas.us/e-library/conferences/2009/budapest/SMO/SMO68.pdf > > A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping > http://www.cppsim.org/Publications/JNL/straayer_jssc09.pdf > > Micrel LVPECL, CML 5GHz - 7GHz Buffer > http://www.micrel.com/_PDF/Eval-Board/sy58011-12-13u_eb.pdf > > Micrel LVPECL, CML 4GbpS - 10.7Gbps Multiplexer > http://www.micrel.com/_PDF/Eval-Board/sy58017-18-19u_eb.pdf > > A flash high-precision Time-to-Digital Converter implemented in FPGA > technology > http://indico.cern.ch/event/49682/session/35/contribution/3/material/slides/0.ppt > > FPGA-Based High Area Efficient Time-To-Digital IP Design > http://www.ifm.umich.mx/~villasen/TESIS/Mario/TDC.pdf > > Firmware-only Implementation of Time-to-Digital Converter (TDC) in FPGA > http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/tdc1s.pdf > > A Time-To-Digital Converter (TDC) > https://indico.phys.hawaii.edu/getFile.py/access?contribId=4&resId=0&materialId=slides&confId=392 > > 96-Channel FPGA-Based Time-To-Digital Converter > http://hep.uchicago.edu/~frisch/TDC_NIM_v12.pdf > > Texas Instruments THS788 Quad-Channel Time Measurement Unit (TMU) > http://www.ti.com/lit/ds/symlink/ths788.pdf > > A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA > on the GANDALF module > http://wwwhad.physik.uni-freiburg.de/gandalf/modules/download_gallery/dl.php?file=59 > > Vernier's Delay Line Time-to-Digital Converter > http://www.np.ac.rs/yu/preuzimanjasve/publications/vol1br1/181-verniers-delay-line-time-to-digital-converter/download > > Time-to-Digit Converter Based on Radiation-Tolerant FPGA > - Interesting calibration analysis > http://kmlinux.fjfi.cvut.cz/~vacekmic/docs/vzlu_tdc.pdf > > A High-Resolution Time-to-Digital Converter Implemented in > Field-Programmable-Gate-Arrays > http://mi.sibet.cas.cn/zlgx/201310/W020131024537685817071.pdf > > Picosecond Resolution Time-to-Digital Converter Using G m -C > Integrator and SAR-ADC > http://www.ssc.pe.titech.ac.jp/publications/2014/IEEE_trans/xu/Xu_GmTDC_Journal_Final_V5.pdf > > A Design of Vernier Coarse-Fine Time-to-Digital Converter using > Single Time Amplifier > http://www.jsts.org/html/journal/journal_files/2012/12/Year2012Volume12_04_05.pdf > > Patents > > Burbeck METHOD AND APPARATUS FOR AUTOMATICALLY MEASURING TIME > INTERVALS > https://patentimages.storage.googleapis.com/pdfs/US2665410.pdf > > Frady DOUBLE INTERPOLATION METHOD AND APPARATUS FOR MEASURING TIME > INTERVALS > https://patentimages.storage.googleapis.com/pdfs/US2665411.pdf > > Bagley ELECTRONIC INTERPOLATING COUNTER FQR THE TIME INTERVAL AND > FREQUENCY MEASUREMENT > https://patentimages.storage.googleapis.com/pdfs/US3133189.pdf > > Nutt DIGITAL INTERVALOMETER > https://patentimages.storage.googleapis.com/pdfs/US3983481.pdf > > Janowitz TIME INTERVAL MEASUREMENT METHOD AND APPARATUS > https://patentimages.storage.googleapis.com/pdfs/US3999128.pdf > > Thornton HIGH RESOLUTION DATA ACQUISITION > http://patentimages.storage.googleapis.com/pdfs/US5200933.pdf > > Condreva HIGH RESOLUTION TIME INTERVAL COUNTER > https://patentimages.storage.googleapis.com/pdfs/US5333162.pdf > > Kattan TIME INTERVAL ANALYZER HAVING MULTIPLE MEASUREMENT CIRCUITS > http://patentimages.storage.googleapis.com/pdfs/US6226231.pdf > > Nair CORRECTION FOR PIPELINED ANALOG TO DIGITAL (A/D) CONVERTER > http://patentimages.storage.googleapis.com/pdfs/US6784814.pdf > > Gao HIGH RESOLUTION SAMPLING-BASED TIME TO DIGITAL CONVERTER > http://patentimages.storage.googleapis.com/pdfs/US8564471.pdf > > Thesis > > An Integrated Cmos High Precision Time-To-Digital Converter Based On > Stabilised Three-Stage Delay Line Interpolation > - Excellent review > http://herkules.oulu.fi/isbn951427461X/isbn951427461X.pdf > > Multi-Path Differential Delay Line based Time-to-Digital Converter > for ADPLL > http://www.diva-portal.org/smash/get/diva2:635168/FULLTEXT01.pdf > > Noise Shaping Techniques for Analog and Time to Digital Converters > Using Voltage Controlled Oscillators > http://cppsim.org/Publications/Theses/straayer_phdthesis.pdf > > Implementation of the high resolution high dynamic Time to Digital > Converter > https://www.politesi.polimi.it/bitstream/10589/92658/1/Thesis_V1.0.2_Build04031059.pdf > > A Stabilized Multi- Channel Cmos Time-To- Digital Converter Based On > A Low Frequency Reference > http://herkules.oulu.fi/isbn9789514299322/isbn9789514299322.pdf > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
BC
Bob Camp
Tue, Dec 16, 2014 1:30 AM

Hi

Here’s another way to sort this all out:

For ADEV, you probably want to get down to ~ 1x10^-13 at 1 second. If the system improves by 1/tau, it will be adequate for anything else you want to do. It’s a system that would need to resolve 100 fs, so most of the “counter” devices that die out around 10 ps would be ruled out.

For long term, you might decide on 1x10^-15 at 100,000 seconds. If it also goes as 1/tau you would have 1x10^-13 at 1,000 seconds. Not good enough for ADEV, but quite adequate for things like aging. Any of the 10 to 100 ps range devices would do fine in this case.

Sort into two piles and then sub-sort.

Bob

On Dec 15, 2014, at 2:27 AM, Mike Monett timenuts@binsamp.e4ward.com wrote:

Hi

On Dec 10, 2014, at 11:12 PM, Mike Monett
timenuts@binsamp.e4ward.com wrote:

[...]

Can you tell me some of the ones that do?

I have yet to see one for under $2K that does it correctly. I
don't have the cash to buy ones at those sort of prices. Some
have reported that the old Motorola UT's will do it. The samples
I have tried have not done very well. I may have not had them
running right who knows.

OK, that pretty much eliminates the NIST data.

or means that more research is needed on single sat boards. There
are a lot of them out there.

What is a "single sat board" and can you give some examples?

  1. Feed that into your control loop equation.

There's another term I need to research!

It's not a simple control process, but it's not all that
terrible either. It just takes a bit of work to optimize. Figure
a few months to a few years for the optimization depending on
what you have for issues along the way.

OK, so I figure out how to do this. How do I tell if this is
making the gpsdo more accurate? In other words, how do I get
the ADEV without having an H-Maser?

You get a Cs (or other atomic standard) or you compare several
different GPSDO's against each other. The preference would be
for groups of three so you can rule out ones that are not doing
what they should.

The ideal would be > 3 TBolts, > 3 same model Rb's, > 3 same model
OCXO's and more than three groups overall. Each has their own ADEV
curve. Comparing devices with vastly different ADEV is not the
best way to go.

Yes, that makes good sense.

[...]

There are many new dacs, op amps, and bipolar microwave devices
that offer much lower noise than current designs use. I think the
performance can be improved in some areas with new components and
design techniques, and I have equipment and time to explore.

There are only two points that system noise really comes into the
GPSDO design:

  1. The TDC must have enough resolution
  1. The DAC on the EFC must have noise below the OCXO

I was more thinking of the Rubidium physics package. Most of the
Rubidiums on eBay are pretty old.

The lamp must have constant intensity. The null detector has to
identify a very shallow drop. The microwave signal needs to have
excellent phase noise.

These all need low noise, low flicker components, and significant
advances have been made in recent years. The surrounding circuitry
could probably benefit from a redesign to take better advantage of
low noise components. For example, SRD's are much noisier than NLTL's.

Probably little can be done to improve the Rubidium cell, but it
should be the limiting factor and not the electronics.

The TDC is limited by the basic resolution of the GPS system. It's
easy to build one that has far more resolution than needed /
useful.

Some people have little faith:)

The DAC issue is normally solved with a < $4 part. Unless you have
an OCXO with a very wide EFC range, it's noise is unlikely to be
an issue. DAC resolution can be addressed to any desired level
with two DAC's (fine and coarse). (Once you get going, you only
use the fine DAC).

The real "fun and games" revolves around the software used to
implement the filtering / control loop between the GPS and the
OCXO (or Rb, or TCXO, or MEMS, or VCXO, or Cs or 
)

Focus on the software.

Bob

I have a few Rubidiums and OCXOs I'd like to get running for a month
or so to stabilize. During this time, I'd like to monitor the
performance to discover any bad units and see which are the best
ones.

For example, TVB shows a 100:1 variation in ADEV in FE-405B
Rubidiums. The section is titled "Variation in FE-405B" in

http://leapsecond.com/pages/fe405/

Clearly, it would be futile to try to use a bad unit in setting up a
gpsdo.

I need some means of measuring the performance of these units while
they are running. A dozen HP5370's would be out of the question. I
did some research to find the different methods available and decide
which has the lowest per-channel cost and best performance.

Here are some of the references I found. I discarded most of the poor ones
and tried to keep only the ones that talk about measurements in the
picosecond or femtosecond range.

I did not include DMTD since the concept is so simple. The Reviews help to
get oriented, but sometimes it takes reading the papers and the patents to
see the timing diagrams and understand what the author is trying to do.

There are many different variations on the FPGA approach. I would be
concerned about the development time, the large DNL, and the problems with
crosstalk on multi-channel units.

The TI THS788 looks good on paper, but it is single-source, not well
stocked, and there is lttle information on crosstalk between channels. It
is also quite expensive per channel. There are no application notes and
little or no information on usage on the web.

The Thesis generally have excellent reviews worth reading.

Articles

Simple PICTIC 250ps time interval counter
http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:pictic

Griffiths Time to Digital converters
http://www.ko4bb.com/~bruce/TDC.html

[time-nuts] Experience with THS788 from TI?-
Attila Kinali's post on TDC methods
https://www.febo.com/pipermail/time-nuts/2012-March/065337.html

Reviews

Review of methods for time interval measurements with picosecond
resolution
http://ztc.wel.wat.edu.pl/met4_1_004.pdf

Low resource FPGA-based 32 Channel Time to Digital Converter

Design, construction and tests of a high resolution, high dynamic
range Time to Digital Converter

Review Of Sub-Nanosecond Time-Interval Measurements
http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-1331.pdf

Chapter 1 Time Interval Measurement Literature Review
http://www.rrsg.ee.uct.ac.za/members/jon/activities/timcs.pdf

Time intervals measurements and generation methods review
http://www.ohwr.org/attachments/128/Time_Interval_Measurements_Techniques.pdf

Papers

A Cyclic CMOS Time-to-Digital Converter With Deep Sub-nanosecond
Resolution
http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021548/1/00777354.pdf

A 96-Channel FPGA-based Time-to-Digital Converter
http://arxiv.org/pdf/physics/0502062.pdf

Complete and Compact 32-Channel System for Time-Correlated
Single-Photon Counting Measurements
http://ieeexplore.ieee.org/ielx7/4563994/6588410/06617673.pdf?arnumber=6617673

Design and Development of GPS Receiver for PNSS-1
http://www.suparco.gov.pk/pages/presentations-pdf/day-1/session-2/12C-II/1.pdf

A Novel Ultra-fast High Resolution Time-domain EMI Measurement
System based on Field Programmable Gate Arrays
https://mediatum.ub.tum.de/doc/1163324/1163324.pdf

High Precision Frequency Measurement System Based on Different
Frequency Phase Processing (in Chinese)
http://xbzrb.tjujournals.com/oa/pdfdow.aspx?Type=pdf&FileName=11acd53a-876d-4ab0-8906-572aa3836215.pdf

A 51-dB SNDR DCO-Based TDC Using Two-Stage Second-Order Noise Shaping
http://www28.cs.kobe-u.ac.jp/pdf/1205_konishi_iscas.pdf

Integrated High-Resolution Multi-Channel Time-to-Digital Converters
(TDCs) for PET Imaging

A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs
http://arxiv.org/pdf/1303.6840v1.pdf

A High-Resolution Flash Time-to-Digital Converter Taking Into
Account Process Variability
http://conferences.computer.org/async2007/PRS/15-minas-async07.pdf

Principles and Instrumentation in Time-of-flight Mass Spectrometry
http://www.wiley.com/legacy/wileychi/ms/articles/1519_a.pdf

TEMPERATURE SENSING CRYSTAL HTS-206

A novel method of measurement of time and amplitude of analog
signals based solely on FPGA units
http://koza.if.uj.edu.pl/pet-symposium-2013/talks/17.pdf

A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter
in a Field Programmable Gate Array
http://iopscience.iop.org/1748-0221/7/02/C02004/pdf/1748-0221_7_02_C02004.pdf

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA
on the GANDALF module
http://iopscience.iop.org/1748-0221/7/03/C03008/pdf/1748-0221_7_03_C03008.pdf

FPGA Based Data Digitisation with Commercial Elements
http://indico.scc.kit.edu/indico/getFile.py/access?contribId=4&sessionId=4&resId=0&materialId=slides&confId=21

Time-to-Digital Converter Architecture with Residue Arithmetic and
its FPGA Implementation
http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2014/2014-11li_congbing2.pdf

An FPGA-Integrated Time-to-Digital Converter Based on a Ring
Oscillator for Programmable Delay Line Resolution Measurement

First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter

A High Resolution FPGA-based TDC with Nonlinearity Calibration
http://www2.ess.nthu.edu.tw/~cwlu/conference/5_A%20High%20Resolution%20FPGA-based%20TDC%20with.pdf

A Single-Slope 80MS/s ADC using Two-Step Time-to-Digital Conversion
http://dspace.mit.edu/openaccess-disseminate/1721.1/60073

Simulation of ps-Detector Electronics
http://hep.uchicago.edu/workshops/2005-picosecond/8-Fukun_Tang_ps_sim.ppt

High Precision Time and Frequency Counter for Mobile Applications
http://www.wseas.us/e-library/transactions/circuits/2010/89-747.pdf

Time-to-Digital Converter based on Analog Time Expansion for 3D Time
of Flight Cameras
https://pure.ltu.se/portal/files/95016947/90220A.pdf

A Pc-Based Time Interval Counter With 200 Ps Resolution
http://www.dtic.mil/get-tr-doc/pdf?AD=ADA427911

The Development of Large-area, Picosecond Resolution, Time-of-Flight
Detectors
http://hep.uchicago.edu/~frisch/adr.pdf

Low-Voltage High-Frequency Gated Ring Oscillator Using Bootstrap
Technique
http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2012/AMDE2012_Kamiyama.pdf

High-resolution short time interval measurement system implemented
in a single FPGA chip
http://download.springer.com/static/pdf/727/art%253A10.1007%252Fs11434-011-4421-3.pdf?auth66=1418360984_e35e8a8588d3977c4d4d4d2109c1aaaa&ext=.pdf

Implementation of sub-nanosecond time-to-digital convertor in
field-programmable gate array
https://hal.archives-ouvertes.fr/in2p3-00873192/PDF/articleMST_Marteau-et-al_v1.pdf

New Jitter Measurement Technique Using TDC Principle in a FPGA
Component
http://www.inatel.br/biblioteca/component/docman/doc_download/3831-new-jitter-measurement-technique-using-tdc-principle

High Resolution Modular Time Interval Counter
http://ilrs.gsfc.nasa.gov/docs/timing/artyukh_time_interval_counter.pdf

Using Dynamic Reconfiguration to Implement High-Resolution
Programmable Delays on an FPGA
http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDaigneaultDavidNEWCAS08.pdf

A 2.6ps rms -Period-Jitter 900MHz All-Digital Fractional-N PLL Built
with Standard Cells
http://www-bsac.eecs.berkeley.edu/publications/search/send_publication_pdf2client.php?pubID=1307595132

C111 / P111 4 channel Time to Digital Converter User's manual
http://www.esrf.eu/files/live/sites/www/files/Instrumentation/DetectorsAndElectronics/Units/Electronics/digital-electronics-lab/c111.pdf

Carry-chain propagation delay impacts on resolution of FPGA-based TDC
http://www.j.sinap.ac.cn/nst/EN/article/downloadArticleFile.do?attachType=PDF&id=457

A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source
Applications
http://ens.ewi.tudelft.nl/pubs/charbon12tcas_favi.pdf

A data driven high performance Time to Digital Converter
http://ph-collectif-lecc-workshops.web.cern.ch/ph-collectif-lecc-workshops/LEB00_Book/tracker/christiansen_track.pdf

On-Chip Timing Measurement Architecture with Femtosecond Resolution
http://eprints.soton.ac.uk/262543/1/collinsm_timemeasurement2.pdf

A 13b 315fs rms 2mW 500MS/s 1MHz Bandwidth Highly Digital
Time-to-Digital Converter Using Switched Ring Oscillators
http://www.cse.psu.edu/~xydong/files/proceedings/ISSCC2012/files/D27_04.pdf

A high resolution Time-to-Digital Converter on FPGA for
Time-Correlated Single Photon Counting
http://libgen.org/scimag/get.php?doi=10.1109/mwscas.2012.6292166

A Design of Vernier Coarse-Fine Time-to-Digital Converter using
Single Time Amplifier
http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2012/v12n4/E1STAN_2012_v12n4_411.pdf

All Digital Time-to-Digital Converter with High Resolution and Wide
Detect Range
http://www.engineeringletters.com/issues_v19/issue_3/EL_19_3_16.pdf

Examples of 1 PPS Clock Measuring Systems
http://www.wriley.com/Examples%20of%201%20PPS%20Clock%20Measuring%20Systems.pdf

On-Chip Processing for the Wave Union TDC Implemented in FPGA
http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-275-e.pdf

18-channel FPGA Wave Union TDC for Time-of-Flight Applications
http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-573-ppd.pdf

A 96-channel FPGA-based Time-to-Digital Converter (TDC)
http://www.phys.sinica.edu.tw/~e906/WWW_public/Doc/TDC/FPGA_TDC.pdf

Design of FPGA-based TDC for the ICAL Detector of India-based
Neutrino Observatory
http://www.hecr.tifr.res.in/~sudeshnadg/publication/FPGA_TDC.pdf

FPGA based Time-to-Digital Converter
http://www.sympnp.org/proceedings/56/G7.pdf

A Flash Time-to-Digital Converter with Two Independent Time Coding
Lines
IMEKO-IWADC-2011-12.pdf
http://www.imeko.org/publications/iwadc-2011/IMEKO-IWADC-2011-12.pdf

A 17ps Time-to-Digital Converter Implemented in 65nm FPGA Technology
http://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf

A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 um CMOS Technology
http://www.eng.auburn.edu/~daifa01/Top/PubPapers/2010/Jpaper2010-02.pdf

A high-speed wide dynamic range time-to-digital converter
http://www.ssl.berkeley.edu/~mlampton/LamptonRaffanti.pdf

High Resolution Time-Interval Measurement Systems Applied To Flow
Measurement
http://www.metrology.pg.gda.pl/full/2014/M&MS_2014_077.pdf

Accurate time interval measurement electronics for pulsed time of
flight laser radar
http://www.ee.oulu.fi/~kari/Papers/Nantes1997.pdf

Signal Processing for Pico-second Resolution Timing Measurements
http://psec.uchicago.edu/Papers/NIM_v8b_final.pdf

High-Resolution Time-to-Digital Converter in Field Programmable Gate Array
http://cds.cern.ch/record/1158663/files/p383.pdf

Random Errors in Time Interval Measurement Based on SAW Filter Excitation
http://libgen.org/scimag/get.php?doi=10.1109/tim.2007.915465

A 96-channel, 500 ps resolution TDC board for the BaBar experiment at SLAC
http://www.ge.infn.it/babar/ITB/RT99/paper.pdf

A Cyclic Vernier TDC for ADPLLs Synthesized From a Standard Cell Library
http://wwweb.eecs.umich.edu/wics/publications/Park_TCASI2011.pdf

Nonlinearity Correction of the Integrated Time-to-Digital Converter
with Direct Coding
http://libgen.org/scimag/get.php?doi=10.1109/19.571882

PICTIC Interpolator Linearity
http://www.wriley.com/PICTIC%20Interpolator%20Linearity.pdf

Firmware-only Implementation of Time-to-Digital Converter (TDC) in
Field-Programmable Gate Array (FPGA)
http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID26522.pdf

High-Precise Portable Time Interval and Frequency Counter
http://tycho.usno.navy.mil/ptti/2012papers/PTTI2012.p247.pdf

FPGA-based time counters with a wander measurement mode
http://www.pwt.et.put.poznan.pl/PWT_2012/PWT%202012_2242.pdf

The Simple PICTIC
http://www.ko4bb.com/dokuwiki/lib/exe/fetch.php?id=precision_timing%3Apictic&cache=cache&media=precision_timing:simple_pictic.pdf

A Saw-tooth Wave Based Design of Time to Digital Converter
http://www.wseas.us/e-library/conferences/2009/budapest/SMO/SMO68.pdf

A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping
http://www.cppsim.org/Publications/JNL/straayer_jssc09.pdf

Micrel LVPECL, CML 5GHz - 7GHz Buffer
http://www.micrel.com/_PDF/Eval-Board/sy58011-12-13u_eb.pdf

Micrel LVPECL, CML 4GbpS - 10.7Gbps Multiplexer
http://www.micrel.com/_PDF/Eval-Board/sy58017-18-19u_eb.pdf

A flash high-precision Time-to-Digital Converter implemented in FPGA
technology
http://indico.cern.ch/event/49682/session/35/contribution/3/material/slides/0.ppt

FPGA-Based High Area Efficient Time-To-Digital IP Design
http://www.ifm.umich.mx/~villasen/TESIS/Mario/TDC.pdf

Firmware-only Implementation of Time-to-Digital Converter (TDC) in FPGA
http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/tdc1s.pdf

A Time-To-Digital Converter (TDC)
https://indico.phys.hawaii.edu/getFile.py/access?contribId=4&resId=0&materialId=slides&confId=392

96-Channel FPGA-Based Time-To-Digital Converter
http://hep.uchicago.edu/~frisch/TDC_NIM_v12.pdf

Texas Instruments THS788 Quad-Channel Time Measurement Unit (TMU)
http://www.ti.com/lit/ds/symlink/ths788.pdf

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA
on the GANDALF module
http://wwwhad.physik.uni-freiburg.de/gandalf/modules/download_gallery/dl.php?file=59

Vernier's Delay Line Time-to-Digital Converter
http://www.np.ac.rs/yu/preuzimanjasve/publications/vol1br1/181-verniers-delay-line-time-to-digital-converter/download

Time-to-Digit Converter Based on Radiation-Tolerant FPGA

A High-Resolution Time-to-Digital Converter Implemented in
Field-Programmable-Gate-Arrays
http://mi.sibet.cas.cn/zlgx/201310/W020131024537685817071.pdf

Picosecond Resolution Time-to-Digital Converter Using G m -C
Integrator and SAR-ADC
http://www.ssc.pe.titech.ac.jp/publications/2014/IEEE_trans/xu/Xu_GmTDC_Journal_Final_V5.pdf

A Design of Vernier Coarse-Fine Time-to-Digital Converter using
Single Time Amplifier
http://www.jsts.org/html/journal/journal_files/2012/12/Year2012Volume12_04_05.pdf

Patents

Burbeck METHOD AND APPARATUS FOR AUTOMATICALLY MEASURING TIME
INTERVALS
https://patentimages.storage.googleapis.com/pdfs/US2665410.pdf

Frady DOUBLE INTERPOLATION METHOD AND APPARATUS FOR MEASURING TIME
INTERVALS
https://patentimages.storage.googleapis.com/pdfs/US2665411.pdf

Bagley ELECTRONIC INTERPOLATING COUNTER FQR THE TIME INTERVAL AND
FREQUENCY MEASUREMENT
https://patentimages.storage.googleapis.com/pdfs/US3133189.pdf

Nutt DIGITAL INTERVALOMETER
https://patentimages.storage.googleapis.com/pdfs/US3983481.pdf

Janowitz TIME INTERVAL MEASUREMENT METHOD AND APPARATUS
https://patentimages.storage.googleapis.com/pdfs/US3999128.pdf

Thornton HIGH RESOLUTION DATA ACQUISITION
http://patentimages.storage.googleapis.com/pdfs/US5200933.pdf

Condreva HIGH RESOLUTION TIME INTERVAL COUNTER
https://patentimages.storage.googleapis.com/pdfs/US5333162.pdf

Kattan TIME INTERVAL ANALYZER HAVING MULTIPLE MEASUREMENT CIRCUITS
http://patentimages.storage.googleapis.com/pdfs/US6226231.pdf

Nair CORRECTION FOR PIPELINED ANALOG TO DIGITAL (A/D) CONVERTER
http://patentimages.storage.googleapis.com/pdfs/US6784814.pdf

Gao HIGH RESOLUTION SAMPLING-BASED TIME TO DIGITAL CONVERTER
http://patentimages.storage.googleapis.com/pdfs/US8564471.pdf

Thesis

An Integrated Cmos High Precision Time-To-Digital Converter Based On
Stabilised Three-Stage Delay Line Interpolation

Multi-Path Differential Delay Line based Time-to-Digital Converter
for ADPLL
http://www.diva-portal.org/smash/get/diva2:635168/FULLTEXT01.pdf

Noise Shaping Techniques for Analog and Time to Digital Converters
Using Voltage Controlled Oscillators
http://cppsim.org/Publications/Theses/straayer_phdthesis.pdf

Implementation of the high resolution high dynamic Time to Digital
Converter
https://www.politesi.polimi.it/bitstream/10589/92658/1/Thesis_V1.0.2_Build04031059.pdf

A Stabilized Multi- Channel Cmos Time-To- Digital Converter Based On
A Low Frequency Reference
http://herkules.oulu.fi/isbn9789514299322/isbn9789514299322.pdf


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.

Hi Here’s another way to sort this all out: For ADEV, you probably want to get down to ~ 1x10^-13 at 1 second. If the system improves by 1/tau, it will be adequate for anything else you want to do. It’s a system that would need to resolve 100 fs, so most of the “counter” devices that die out around 10 ps would be ruled out. For long term, you might decide on 1x10^-15 at 100,000 seconds. If it also goes as 1/tau you would have 1x10^-13 at 1,000 seconds. Not good enough for ADEV, but quite adequate for things like aging. Any of the 10 to 100 ps range devices would do fine in this case. Sort into two piles and then sub-sort. Bob > On Dec 15, 2014, at 2:27 AM, Mike Monett <timenuts@binsamp.e4ward.com> wrote: > >> Hi > >>> On Dec 10, 2014, at 11:12 PM, Mike Monett >>> <timenuts@binsamp.e4ward.com> wrote: > > [...] > >>>>> Can you tell me some of the ones that do? > >>>> I have yet to see one for under $2K that does it correctly. I >>>> don't have the cash to buy ones at those sort of prices. Some >>>> have reported that the old Motorola UT's will do it. The samples >>>> I have tried have not done very well. I may have not had them >>>> running right who knows. > >>> OK, that pretty much eliminates the NIST data. > >> or means that more research is needed on single sat boards. There >> are a *lot* of them out there. > > What is a "single sat board" and can you give some examples? > >>>>>> 5) Feed that into your control loop equation. > >>>>> There's another term I need to research! > >>>> It's not a simple control process, but it's not all that >>>> terrible either. It just takes a bit of work to optimize. Figure >>>> a few months to a few years for the optimization depending on >>>> what you have for issues along the way. > >>>>> OK, so I figure out how to do this. How do I tell if this is >>>>> making the gpsdo more accurate? In other words, how do I get >>>>> the ADEV without having an H-Maser? > >>>> You get a Cs (or other atomic standard) or you compare several >>>> different GPSDO's against each other. The preference would be >>>> for groups of three so you can rule out ones that are not doing >>>> what they should. > >> The ideal would be > 3 TBolts, > 3 same model Rb's, > 3 same model >> OCXO's and more than three groups overall. Each has their own ADEV >> curve. Comparing devices with vastly different ADEV is not the >> best way to go. > > Yes, that makes good sense. > > [...] > >>> There are many new dacs, op amps, and bipolar microwave devices >>> that offer much lower noise than current designs use. I think the >>> performance can be improved in some areas with new components and >>> design techniques, and I have equipment and time to explore. > >> There are only two points that system noise really comes into the >> GPSDO design: > >> 1) The TDC must have enough resolution > >> 2) The DAC on the EFC must have noise below the OCXO > > I was more thinking of the Rubidium physics package. Most of the > Rubidiums on eBay are pretty old. > > The lamp must have constant intensity. The null detector has to > identify a very shallow drop. The microwave signal needs to have > excellent phase noise. > > These all need low noise, low flicker components, and significant > advances have been made in recent years. The surrounding circuitry > could probably benefit from a redesign to take better advantage of > low noise components. For example, SRD's are much noisier than NLTL's. > > Probably little can be done to improve the Rubidium cell, but it > should be the limiting factor and not the electronics. > >> The TDC is limited by the basic resolution of the GPS system. It's >> easy to build one that has far more resolution than needed / >> useful. > > Some people have little faith:) > >> The DAC issue is normally solved with a < $4 part. Unless you have >> an OCXO with a very wide EFC range, it's noise is unlikely to be >> an issue. DAC resolution can be addressed to any desired level >> with two DAC's (fine and coarse). (Once you get going, you only >> use the fine DAC). > >> The real "fun and games" revolves around the software used to >> implement the filtering / control loop between the GPS and the >> OCXO (or Rb, or TCXO, or MEMS, or VCXO, or Cs or 
) > >> Focus on the software. > >> Bob > > I have a few Rubidiums and OCXOs I'd like to get running for a month > or so to stabilize. During this time, I'd like to monitor the > performance to discover any bad units and see which are the best > ones. > > For example, TVB shows a 100:1 variation in ADEV in FE-405B > Rubidiums. The section is titled "Variation in FE-405B" in > > http://leapsecond.com/pages/fe405/ > > Clearly, it would be futile to try to use a bad unit in setting up a > gpsdo. > > I need some means of measuring the performance of these units while > they are running. A dozen HP5370's would be out of the question. I > did some research to find the different methods available and decide > which has the lowest per-channel cost and best performance. > > Here are some of the references I found. I discarded most of the poor ones > and tried to keep only the ones that talk about measurements in the > picosecond or femtosecond range. > > I did not include DMTD since the concept is so simple. The Reviews help to > get oriented, but sometimes it takes reading the papers and the patents to > see the timing diagrams and understand what the author is trying to do. > > There are many different variations on the FPGA approach. I would be > concerned about the development time, the large DNL, and the problems with > crosstalk on multi-channel units. > > The TI THS788 looks good on paper, but it is single-source, not well > stocked, and there is lttle information on crosstalk between channels. It > is also quite expensive per channel. There are no application notes and > little or no information on usage on the web. > > The Thesis generally have excellent reviews worth reading. > > Articles > > Simple PICTIC 250ps time interval counter > http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:pictic > > Griffiths Time to Digital converters > http://www.ko4bb.com/~bruce/TDC.html > > [time-nuts] Experience with THS788 from TI?- > Attila Kinali's post on TDC methods > https://www.febo.com/pipermail/time-nuts/2012-March/065337.html > > Reviews > > Review of methods for time interval measurements with picosecond > resolution > http://ztc.wel.wat.edu.pl/met4_1_004.pdf > > Low resource FPGA-based 32 Channel Time to Digital Converter > - Excellent review of TDC techniques and measurement verification > http://arxiv.org/vc/arxiv/papers/1206/1206.0679v3.pdf > > Design, construction and tests of a high resolution, high dynamic > range Time to Digital Converter > - Excellent review of TDC methods and test techniques > http://inspirehep.net/record/1313667/files/getfile.pdf > > Review Of Sub-Nanosecond Time-Interval Measurements > http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-1331.pdf > > Chapter 1 Time Interval Measurement Literature Review > http://www.rrsg.ee.uct.ac.za/members/jon/activities/timcs.pdf > > Time intervals measurements and generation methods review > http://www.ohwr.org/attachments/128/Time_Interval_Measurements_Techniques.pdf > > Papers > > A Cyclic CMOS Time-to-Digital Converter With Deep Sub-nanosecond > Resolution > http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021548/1/00777354.pdf > > A 96-Channel FPGA-based Time-to-Digital Converter > http://arxiv.org/pdf/physics/0502062.pdf > > Complete and Compact 32-Channel System for Time-Correlated > Single-Photon Counting Measurements > http://ieeexplore.ieee.org/ielx7/4563994/6588410/06617673.pdf?arnumber=6617673 > > Design and Development of GPS Receiver for PNSS-1 > http://www.suparco.gov.pk/pages/presentations-pdf/day-1/session-2/12C-II/1.pdf > > A Novel Ultra-fast High Resolution Time-domain EMI Measurement > System based on Field Programmable Gate Arrays > https://mediatum.ub.tum.de/doc/1163324/1163324.pdf > > High Precision Frequency Measurement System Based on Different > Frequency Phase Processing (in Chinese) > http://xbzrb.tjujournals.com/oa/pdfdow.aspx?Type=pdf&FileName=11acd53a-876d-4ab0-8906-572aa3836215.pdf > > A 51-dB SNDR DCO-Based TDC Using Two-Stage Second-Order Noise Shaping > http://www28.cs.kobe-u.ac.jp/pdf/1205_konishi_iscas.pdf > > Integrated High-Resolution Multi-Channel Time-to-Digital Converters > (TDCs) for PET Imaging > - Discusses 100 fs Gated-ring-oscillator (GRO) > http://cdn.intechopen.com/pdfs-wm/12913.pdf > > A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs > http://arxiv.org/pdf/1303.6840v1.pdf > > A High-Resolution Flash Time-to-Digital Converter Taking Into > Account Process Variability > http://conferences.computer.org/async2007/PRS/15-minas-async07.pdf > > Principles and Instrumentation in Time-of-flight Mass Spectrometry > http://www.wiley.com/legacy/wileychi/ms/articles/1519_a.pdf > > TEMPERATURE SENSING CRYSTAL HTS-206 > - maybe more stable than thermistor > http://www.abcelectronique.fr/composants/telechargement_datasheet.php?id=385911&part-number=HTS-206 > > A novel method of measurement of time and amplitude of analog > signals based solely on FPGA units > http://koza.if.uj.edu.pl/pet-symposium-2013/talks/17.pdf > > A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter > in a Field Programmable Gate Array > http://iopscience.iop.org/1748-0221/7/02/C02004/pdf/1748-0221_7_02_C02004.pdf > > A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA > on the GANDALF module > http://iopscience.iop.org/1748-0221/7/03/C03008/pdf/1748-0221_7_03_C03008.pdf > > FPGA Based Data Digitisation with Commercial Elements > http://indico.scc.kit.edu/indico/getFile.py/access?contribId=4&sessionId=4&resId=0&materialId=slides&confId=21 > > Time-to-Digital Converter Architecture with Residue Arithmetic and > its FPGA Implementation > http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2014/2014-11li_congbing2.pdf > > An FPGA-Integrated Time-to-Digital Converter Based on a Ring > Oscillator for Programmable Delay Line Resolution Measurement > - 0.4 ps Xilinx FPGA > http://downloads.hindawi.com/journals/jece/2014/230803.pdf > > First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter > - Gated Ring Oscillator based TDC > http://ims.unipv.it/~franco/ConferenceProc/313.pdf > > A High Resolution FPGA-based TDC with Nonlinearity Calibration > http://www2.ess.nthu.edu.tw/~cwlu/conference/5_A%20High%20Resolution%20FPGA-based%20TDC%20with.pdf > > A Single-Slope 80MS/s ADC using Two-Step Time-to-Digital Conversion > http://dspace.mit.edu/openaccess-disseminate/1721.1/60073 > > Simulation of ps-Detector Electronics > http://hep.uchicago.edu/workshops/2005-picosecond/8-Fukun_Tang_ps_sim.ppt > > High Precision Time and Frequency Counter for Mobile Applications > http://www.wseas.us/e-library/transactions/circuits/2010/89-747.pdf > > Time-to-Digital Converter based on Analog Time Expansion for 3D Time > of Flight Cameras > https://pure.ltu.se/portal/files/95016947/90220A.pdf > > A Pc-Based Time Interval Counter With 200 Ps Resolution > http://www.dtic.mil/get-tr-doc/pdf?AD=ADA427911 > > The Development of Large-area, Picosecond Resolution, Time-of-Flight > Detectors > http://hep.uchicago.edu/~frisch/adr.pdf > > Low-Voltage High-Frequency Gated Ring Oscillator Using Bootstrap > Technique > http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2012/AMDE2012_Kamiyama.pdf > > High-resolution short time interval measurement system implemented > in a single FPGA chip > http://download.springer.com/static/pdf/727/art%253A10.1007%252Fs11434-011-4421-3.pdf?auth66=1418360984_e35e8a8588d3977c4d4d4d2109c1aaaa&ext=.pdf > > Implementation of sub-nanosecond time-to-digital convertor in > field-programmable gate array > https://hal.archives-ouvertes.fr/in2p3-00873192/PDF/articleMST_Marteau-et-al_v1.pdf > > New Jitter Measurement Technique Using TDC Principle in a FPGA > Component > http://www.inatel.br/biblioteca/component/docman/doc_download/3831-new-jitter-measurement-technique-using-tdc-principle > > High Resolution Modular Time Interval Counter > http://ilrs.gsfc.nasa.gov/docs/timing/artyukh_time_interval_counter.pdf > > Using Dynamic Reconfiguration to Implement High-Resolution > Programmable Delays on an FPGA > http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDaigneaultDavidNEWCAS08.pdf > > A 2.6ps rms -Period-Jitter 900MHz All-Digital Fractional-N PLL Built > with Standard Cells > http://www-bsac.eecs.berkeley.edu/publications/search/send_publication_pdf2client.php?pubID=1307595132 > > C111 / P111 4 channel Time to Digital Converter User's manual > http://www.esrf.eu/files/live/sites/www/files/Instrumentation/DetectorsAndElectronics/Units/Electronics/digital-electronics-lab/c111.pdf > > Carry-chain propagation delay impacts on resolution of FPGA-based TDC > http://www.j.sinap.ac.cn/nst/EN/article/downloadArticleFile.do?attachType=PDF&id=457 > > A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source > Applications > http://ens.ewi.tudelft.nl/pubs/charbon12tcas_favi.pdf > > A data driven high performance Time to Digital Converter > http://ph-collectif-lecc-workshops.web.cern.ch/ph-collectif-lecc-workshops/LEB00_Book/tracker/christiansen_track.pdf > > On-Chip Timing Measurement Architecture with Femtosecond Resolution > http://eprints.soton.ac.uk/262543/1/collinsm_timemeasurement2.pdf > > A 13b 315fs rms 2mW 500MS/s 1MHz Bandwidth Highly Digital > Time-to-Digital Converter Using Switched Ring Oscillators > http://www.cse.psu.edu/~xydong/files/proceedings/ISSCC2012/files/D27_04.pdf > > A high resolution Time-to-Digital Converter on FPGA for > Time-Correlated Single Photon Counting > http://libgen.org/scimag/get.php?doi=10.1109/mwscas.2012.6292166 > > A Design of Vernier Coarse-Fine Time-to-Digital Converter using > Single Time Amplifier > http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2012/v12n4/E1STAN_2012_v12n4_411.pdf > > All Digital Time-to-Digital Converter with High Resolution and Wide > Detect Range > http://www.engineeringletters.com/issues_v19/issue_3/EL_19_3_16.pdf > > Examples of 1 PPS Clock Measuring Systems > http://www.wriley.com/Examples%20of%201%20PPS%20Clock%20Measuring%20Systems.pdf > > On-Chip Processing for the Wave Union TDC Implemented in FPGA > http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-275-e.pdf > > 18-channel FPGA Wave Union TDC for Time-of-Flight Applications > http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-573-ppd.pdf > > A 96-channel FPGA-based Time-to-Digital Converter (TDC) > http://www.phys.sinica.edu.tw/~e906/WWW_public/Doc/TDC/FPGA_TDC.pdf > > Design of FPGA-based TDC for the ICAL Detector of India-based > Neutrino Observatory > http://www.hecr.tifr.res.in/~sudeshnadg/publication/FPGA_TDC.pdf > > FPGA based Time-to-Digital Converter > http://www.sympnp.org/proceedings/56/G7.pdf > > A Flash Time-to-Digital Converter with Two Independent Time Coding > Lines > IMEKO-IWADC-2011-12.pdf > http://www.imeko.org/publications/iwadc-2011/IMEKO-IWADC-2011-12.pdf > > A 17ps Time-to-Digital Converter Implemented in 65nm FPGA Technology > http://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf > > A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 um CMOS Technology > http://www.eng.auburn.edu/~daifa01/Top/PubPapers/2010/Jpaper2010-02.pdf > > A high-speed wide dynamic range time-to-digital converter > http://www.ssl.berkeley.edu/~mlampton/LamptonRaffanti.pdf > > High Resolution Time-Interval Measurement Systems Applied To Flow > Measurement > http://www.metrology.pg.gda.pl/full/2014/M&MS_2014_077.pdf > > Accurate time interval measurement electronics for pulsed time of > flight laser radar > http://www.ee.oulu.fi/~kari/Papers/Nantes1997.pdf > > Signal Processing for Pico-second Resolution Timing Measurements > http://psec.uchicago.edu/Papers/NIM_v8b_final.pdf > > High-Resolution Time-to-Digital Converter in Field Programmable Gate Array > http://cds.cern.ch/record/1158663/files/p383.pdf > > Random Errors in Time Interval Measurement Based on SAW Filter Excitation > http://libgen.org/scimag/get.php?doi=10.1109/tim.2007.915465 > > A 96-channel, 500 ps resolution TDC board for the BaBar experiment at SLAC > http://www.ge.infn.it/babar/ITB/RT99/paper.pdf > > A Cyclic Vernier TDC for ADPLLs Synthesized From a Standard Cell Library > http://wwweb.eecs.umich.edu/wics/publications/Park_TCASI2011.pdf > > Nonlinearity Correction of the Integrated Time-to-Digital Converter > with Direct Coding > http://libgen.org/scimag/get.php?doi=10.1109/19.571882 > > PICTIC Interpolator Linearity > http://www.wriley.com/PICTIC%20Interpolator%20Linearity.pdf > > Firmware-only Implementation of Time-to-Digital Converter (TDC) in > Field-Programmable Gate Array (FPGA) > http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID26522.pdf > > High-Precise Portable Time Interval and Frequency Counter > http://tycho.usno.navy.mil/ptti/2012papers/PTTI2012.p247.pdf > > FPGA-based time counters with a wander measurement mode > http://www.pwt.et.put.poznan.pl/PWT_2012/PWT%202012_2242.pdf > > The Simple PICTIC > http://www.ko4bb.com/dokuwiki/lib/exe/fetch.php?id=precision_timing%3Apictic&cache=cache&media=precision_timing:simple_pictic.pdf > > A Saw-tooth Wave Based Design of Time to Digital Converter > http://www.wseas.us/e-library/conferences/2009/budapest/SMO/SMO68.pdf > > A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping > http://www.cppsim.org/Publications/JNL/straayer_jssc09.pdf > > Micrel LVPECL, CML 5GHz - 7GHz Buffer > http://www.micrel.com/_PDF/Eval-Board/sy58011-12-13u_eb.pdf > > Micrel LVPECL, CML 4GbpS - 10.7Gbps Multiplexer > http://www.micrel.com/_PDF/Eval-Board/sy58017-18-19u_eb.pdf > > A flash high-precision Time-to-Digital Converter implemented in FPGA > technology > http://indico.cern.ch/event/49682/session/35/contribution/3/material/slides/0.ppt > > FPGA-Based High Area Efficient Time-To-Digital IP Design > http://www.ifm.umich.mx/~villasen/TESIS/Mario/TDC.pdf > > Firmware-only Implementation of Time-to-Digital Converter (TDC) in FPGA > http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/tdc1s.pdf > > A Time-To-Digital Converter (TDC) > https://indico.phys.hawaii.edu/getFile.py/access?contribId=4&resId=0&materialId=slides&confId=392 > > 96-Channel FPGA-Based Time-To-Digital Converter > http://hep.uchicago.edu/~frisch/TDC_NIM_v12.pdf > > Texas Instruments THS788 Quad-Channel Time Measurement Unit (TMU) > http://www.ti.com/lit/ds/symlink/ths788.pdf > > A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA > on the GANDALF module > http://wwwhad.physik.uni-freiburg.de/gandalf/modules/download_gallery/dl.php?file=59 > > Vernier's Delay Line Time-to-Digital Converter > http://www.np.ac.rs/yu/preuzimanjasve/publications/vol1br1/181-verniers-delay-line-time-to-digital-converter/download > > Time-to-Digit Converter Based on Radiation-Tolerant FPGA > - Interesting calibration analysis > http://kmlinux.fjfi.cvut.cz/~vacekmic/docs/vzlu_tdc.pdf > > A High-Resolution Time-to-Digital Converter Implemented in > Field-Programmable-Gate-Arrays > http://mi.sibet.cas.cn/zlgx/201310/W020131024537685817071.pdf > > Picosecond Resolution Time-to-Digital Converter Using G m -C > Integrator and SAR-ADC > http://www.ssc.pe.titech.ac.jp/publications/2014/IEEE_trans/xu/Xu_GmTDC_Journal_Final_V5.pdf > > A Design of Vernier Coarse-Fine Time-to-Digital Converter using > Single Time Amplifier > http://www.jsts.org/html/journal/journal_files/2012/12/Year2012Volume12_04_05.pdf > > Patents > > Burbeck METHOD AND APPARATUS FOR AUTOMATICALLY MEASURING TIME > INTERVALS > https://patentimages.storage.googleapis.com/pdfs/US2665410.pdf > > Frady DOUBLE INTERPOLATION METHOD AND APPARATUS FOR MEASURING TIME > INTERVALS > https://patentimages.storage.googleapis.com/pdfs/US2665411.pdf > > Bagley ELECTRONIC INTERPOLATING COUNTER FQR THE TIME INTERVAL AND > FREQUENCY MEASUREMENT > https://patentimages.storage.googleapis.com/pdfs/US3133189.pdf > > Nutt DIGITAL INTERVALOMETER > https://patentimages.storage.googleapis.com/pdfs/US3983481.pdf > > Janowitz TIME INTERVAL MEASUREMENT METHOD AND APPARATUS > https://patentimages.storage.googleapis.com/pdfs/US3999128.pdf > > Thornton HIGH RESOLUTION DATA ACQUISITION > http://patentimages.storage.googleapis.com/pdfs/US5200933.pdf > > Condreva HIGH RESOLUTION TIME INTERVAL COUNTER > https://patentimages.storage.googleapis.com/pdfs/US5333162.pdf > > Kattan TIME INTERVAL ANALYZER HAVING MULTIPLE MEASUREMENT CIRCUITS > http://patentimages.storage.googleapis.com/pdfs/US6226231.pdf > > Nair CORRECTION FOR PIPELINED ANALOG TO DIGITAL (A/D) CONVERTER > http://patentimages.storage.googleapis.com/pdfs/US6784814.pdf > > Gao HIGH RESOLUTION SAMPLING-BASED TIME TO DIGITAL CONVERTER > http://patentimages.storage.googleapis.com/pdfs/US8564471.pdf > > Thesis > > An Integrated Cmos High Precision Time-To-Digital Converter Based On > Stabilised Three-Stage Delay Line Interpolation > - Excellent review > http://herkules.oulu.fi/isbn951427461X/isbn951427461X.pdf > > Multi-Path Differential Delay Line based Time-to-Digital Converter > for ADPLL > http://www.diva-portal.org/smash/get/diva2:635168/FULLTEXT01.pdf > > Noise Shaping Techniques for Analog and Time to Digital Converters > Using Voltage Controlled Oscillators > http://cppsim.org/Publications/Theses/straayer_phdthesis.pdf > > Implementation of the high resolution high dynamic Time to Digital > Converter > https://www.politesi.polimi.it/bitstream/10589/92658/1/Thesis_V1.0.2_Build04031059.pdf > > A Stabilized Multi- Channel Cmos Time-To- Digital Converter Based On > A Low Frequency Reference > http://herkules.oulu.fi/isbn9789514299322/isbn9789514299322.pdf > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
MD
Magnus Danielson
Sun, Dec 21, 2014 2:23 PM

Mike,

That was a nice set of homework reading you provided for us.
People might have missed it.

Cheers,
Magnus

I have a few Rubidiums and OCXOs I'd like to get running for a month
or so to stabilize. During this time, I'd like to monitor the
performance to discover any bad units and see which are the best
ones.

For example, TVB shows a 100:1 variation in ADEV in FE-405B
Rubidiums. The section is titled "Variation in FE-405B" in

http://leapsecond.com/pages/fe405/

Clearly, it would be futile to try to use a bad unit in setting up a
gpsdo.

I need some means of measuring the performance of these units while
they are running. A dozen HP5370's would be out of the question. I
did some research to find the different methods available and decide
which has the lowest per-channel cost and best performance.

Here are some of the references I found. I discarded most of the poor ones
and tried to keep only the ones that talk about measurements in the
picosecond or femtosecond range.

I did not include DMTD since the concept is so simple. The Reviews help to
get oriented, but sometimes it takes reading the papers and the patents to
see the timing diagrams and understand what the author is trying to do.

There are many different variations on the FPGA approach. I would be
concerned about the development time, the large DNL, and the problems with
crosstalk on multi-channel units.

The TI THS788 looks good on paper, but it is single-source, not well
stocked, and there is lttle information on crosstalk between channels. It
is also quite expensive per channel. There are no application notes and
little or no information on usage on the web.

The Thesis generally have excellent reviews worth reading.

Articles

Simple PICTIC 250ps time interval counter
http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:pictic

Griffiths Time to Digital converters
http://www.ko4bb.com/~bruce/TDC.html

[time-nuts] Experience with THS788 from TI?-
Attila Kinali's post on TDC methods
https://www.febo.com/pipermail/time-nuts/2012-March/065337.html

Reviews

Review of methods for time interval measurements with picosecond
resolution
http://ztc.wel.wat.edu.pl/met4_1_004.pdf

Low resource FPGA-based 32 Channel Time to Digital Converter

Design, construction and tests of a high resolution, high dynamic
range Time to Digital Converter

Review Of Sub-Nanosecond Time-Interval Measurements
http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-1331.pdf

Chapter 1 Time Interval Measurement Literature Review
http://www.rrsg.ee.uct.ac.za/members/jon/activities/timcs.pdf

Time intervals measurements and generation methods review
http://www.ohwr.org/attachments/128/Time_Interval_Measurements_Techniques.pdf

Papers

A Cyclic CMOS Time-to-Digital Converter With Deep Sub-nanosecond
Resolution
http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021548/1/00777354.pdf

A 96-Channel FPGA-based Time-to-Digital Converter
http://arxiv.org/pdf/physics/0502062.pdf

Complete and Compact 32-Channel System for Time-Correlated
Single-Photon Counting Measurements
http://ieeexplore.ieee.org/ielx7/4563994/6588410/06617673.pdf?arnumber=6617673

Design and Development of GPS Receiver for PNSS-1
http://www.suparco.gov.pk/pages/presentations-pdf/day-1/session-2/12C-II/1.pdf

A Novel Ultra-fast High Resolution Time-domain EMI Measurement
System based on Field Programmable Gate Arrays
https://mediatum.ub.tum.de/doc/1163324/1163324.pdf

High Precision Frequency Measurement System Based on Different
Frequency Phase Processing (in Chinese)
http://xbzrb.tjujournals.com/oa/pdfdow.aspx?Type=pdf&FileName=11acd53a-876d-4ab0-8906-572aa3836215.pdf

A 51-dB SNDR DCO-Based TDC Using Two-Stage Second-Order Noise Shaping
http://www28.cs.kobe-u.ac.jp/pdf/1205_konishi_iscas.pdf

Integrated High-Resolution Multi-Channel Time-to-Digital Converters
(TDCs) for PET Imaging

A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs
http://arxiv.org/pdf/1303.6840v1.pdf

A High-Resolution Flash Time-to-Digital Converter Taking Into
Account Process Variability
http://conferences.computer.org/async2007/PRS/15-minas-async07.pdf

Principles and Instrumentation in Time-of-flight Mass Spectrometry
http://www.wiley.com/legacy/wileychi/ms/articles/1519_a.pdf

TEMPERATURE SENSING CRYSTAL HTS-206

A novel method of measurement of time and amplitude of analog
signals based solely on FPGA units
http://koza.if.uj.edu.pl/pet-symposium-2013/talks/17.pdf

A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter
in a Field Programmable Gate Array
http://iopscience.iop.org/1748-0221/7/02/C02004/pdf/1748-0221_7_02_C02004.pdf

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA
on the GANDALF module
http://iopscience.iop.org/1748-0221/7/03/C03008/pdf/1748-0221_7_03_C03008.pdf

FPGA Based Data Digitisation with Commercial Elements
http://indico.scc.kit.edu/indico/getFile.py/access?contribId=4&sessionId=4&resId=0&materialId=slides&confId=21

Time-to-Digital Converter Architecture with Residue Arithmetic and
its FPGA Implementation
http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2014/2014-11li_congbing2.pdf

An FPGA-Integrated Time-to-Digital Converter Based on a Ring
Oscillator for Programmable Delay Line Resolution Measurement

First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter

A High Resolution FPGA-based TDC with Nonlinearity Calibration
http://www2.ess.nthu.edu.tw/~cwlu/conference/5_A%20High%20Resolution%20FPGA-based%20TDC%20with.pdf

A Single-Slope 80MS/s ADC using Two-Step Time-to-Digital Conversion
http://dspace.mit.edu/openaccess-disseminate/1721.1/60073

Simulation of ps-Detector Electronics
http://hep.uchicago.edu/workshops/2005-picosecond/8-Fukun_Tang_ps_sim.ppt

High Precision Time and Frequency Counter for Mobile Applications
http://www.wseas.us/e-library/transactions/circuits/2010/89-747.pdf

Time-to-Digital Converter based on Analog Time Expansion for 3D Time
of Flight Cameras
https://pure.ltu.se/portal/files/95016947/90220A.pdf

A Pc-Based Time Interval Counter With 200 Ps Resolution
http://www.dtic.mil/get-tr-doc/pdf?AD=ADA427911

The Development of Large-area, Picosecond Resolution, Time-of-Flight
Detectors
http://hep.uchicago.edu/~frisch/adr.pdf

Low-Voltage High-Frequency Gated Ring Oscillator Using Bootstrap
Technique
http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2012/AMDE2012_Kamiyama.pdf

High-resolution short time interval measurement system implemented
in a single FPGA chip
http://download.springer.com/static/pdf/727/art%253A10.1007%252Fs11434-011-4421-3.pdf?auth66=1418360984_e35e8a8588d3977c4d4d4d2109c1aaaa&ext=.pdf

Implementation of sub-nanosecond time-to-digital convertor in
field-programmable gate array
https://hal.archives-ouvertes.fr/in2p3-00873192/PDF/articleMST_Marteau-et-al_v1.pdf

New Jitter Measurement Technique Using TDC Principle in a FPGA
Component
http://www.inatel.br/biblioteca/component/docman/doc_download/3831-new-jitter-measurement-technique-using-tdc-principle

High Resolution Modular Time Interval Counter
http://ilrs.gsfc.nasa.gov/docs/timing/artyukh_time_interval_counter.pdf

Using Dynamic Reconfiguration to Implement High-Resolution
Programmable Delays on an FPGA
http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDaigneaultDavidNEWCAS08.pdf

A 2.6ps rms -Period-Jitter 900MHz All-Digital Fractional-N PLL Built
with Standard Cells
http://www-bsac.eecs.berkeley.edu/publications/search/send_publication_pdf2client.php?pubID=1307595132

C111 / P111 4 channel Time to Digital Converter User's manual
http://www.esrf.eu/files/live/sites/www/files/Instrumentation/DetectorsAndElectronics/Units/Electronics/digital-electronics-lab/c111.pdf

Carry-chain propagation delay impacts on resolution of FPGA-based TDC
http://www.j.sinap.ac.cn/nst/EN/article/downloadArticleFile.do?attachType=PDF&id=457

A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source
Applications
http://ens.ewi.tudelft.nl/pubs/charbon12tcas_favi.pdf

A data driven high performance Time to Digital Converter
http://ph-collectif-lecc-workshops.web.cern.ch/ph-collectif-lecc-workshops/LEB00_Book/tracker/christiansen_track.pdf

On-Chip Timing Measurement Architecture with Femtosecond Resolution
http://eprints.soton.ac.uk/262543/1/collinsm_timemeasurement2.pdf

A 13b 315fs rms 2mW 500MS/s 1MHz Bandwidth Highly Digital
Time-to-Digital Converter Using Switched Ring Oscillators
http://www.cse.psu.edu/~xydong/files/proceedings/ISSCC2012/files/D27_04.pdf

A high resolution Time-to-Digital Converter on FPGA for
Time-Correlated Single Photon Counting
http://libgen.org/scimag/get.php?doi=10.1109/mwscas.2012.6292166

A Design of Vernier Coarse-Fine Time-to-Digital Converter using
Single Time Amplifier
http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2012/v12n4/E1STAN_2012_v12n4_411.pdf

All Digital Time-to-Digital Converter with High Resolution and Wide
Detect Range
http://www.engineeringletters.com/issues_v19/issue_3/EL_19_3_16.pdf

Examples of 1 PPS Clock Measuring Systems
http://www.wriley.com/Examples%20of%201%20PPS%20Clock%20Measuring%20Systems.pdf

On-Chip Processing for the Wave Union TDC Implemented in FPGA
http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-275-e.pdf

18-channel FPGA Wave Union TDC for Time-of-Flight Applications
http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-573-ppd.pdf

A 96-channel FPGA-based Time-to-Digital Converter (TDC)
http://www.phys.sinica.edu.tw/~e906/WWW_public/Doc/TDC/FPGA_TDC.pdf

Design of FPGA-based TDC for the ICAL Detector of India-based
Neutrino Observatory
http://www.hecr.tifr.res.in/~sudeshnadg/publication/FPGA_TDC.pdf

FPGA based Time-to-Digital Converter
http://www.sympnp.org/proceedings/56/G7.pdf

A Flash Time-to-Digital Converter with Two Independent Time Coding
Lines
IMEKO-IWADC-2011-12.pdf
http://www.imeko.org/publications/iwadc-2011/IMEKO-IWADC-2011-12.pdf

A 17ps Time-to-Digital Converter Implemented in 65nm FPGA Technology
http://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf

A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 um CMOS Technology
http://www.eng.auburn.edu/~daifa01/Top/PubPapers/2010/Jpaper2010-02.pdf

A high-speed wide dynamic range time-to-digital converter
http://www.ssl.berkeley.edu/~mlampton/LamptonRaffanti.pdf

High Resolution Time-Interval Measurement Systems Applied To Flow
Measurement
http://www.metrology.pg.gda.pl/full/2014/M&MS_2014_077.pdf

Accurate time interval measurement electronics for pulsed time of
flight laser radar
http://www.ee.oulu.fi/~kari/Papers/Nantes1997.pdf

Signal Processing for Pico-second Resolution Timing Measurements
http://psec.uchicago.edu/Papers/NIM_v8b_final.pdf

High-Resolution Time-to-Digital Converter in Field Programmable Gate Array
http://cds.cern.ch/record/1158663/files/p383.pdf

Random Errors in Time Interval Measurement Based on SAW Filter Excitation
http://libgen.org/scimag/get.php?doi=10.1109/tim.2007.915465

A 96-channel, 500 ps resolution TDC board for the BaBar experiment at SLAC
http://www.ge.infn.it/babar/ITB/RT99/paper.pdf

A Cyclic Vernier TDC for ADPLLs Synthesized From a Standard Cell Library
http://wwweb.eecs.umich.edu/wics/publications/Park_TCASI2011.pdf

Nonlinearity Correction of the Integrated Time-to-Digital Converter
with Direct Coding
http://libgen.org/scimag/get.php?doi=10.1109/19.571882

PICTIC Interpolator Linearity
http://www.wriley.com/PICTIC%20Interpolator%20Linearity.pdf

Firmware-only Implementation of Time-to-Digital Converter (TDC) in
Field-Programmable Gate Array (FPGA)
http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID26522.pdf

High-Precise Portable Time Interval and Frequency Counter
http://tycho.usno.navy.mil/ptti/2012papers/PTTI2012.p247.pdf

FPGA-based time counters with a wander measurement mode
http://www.pwt.et.put.poznan.pl/PWT_2012/PWT%202012_2242.pdf

The Simple PICTIC
http://www.ko4bb.com/dokuwiki/lib/exe/fetch.php?id=precision_timing%3Apictic&cache=cache&media=precision_timing:simple_pictic.pdf

A Saw-tooth Wave Based Design of Time to Digital Converter
http://www.wseas.us/e-library/conferences/2009/budapest/SMO/SMO68.pdf

A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping
http://www.cppsim.org/Publications/JNL/straayer_jssc09.pdf

Micrel LVPECL, CML 5GHz - 7GHz Buffer
http://www.micrel.com/_PDF/Eval-Board/sy58011-12-13u_eb.pdf

Micrel LVPECL, CML 4GbpS - 10.7Gbps Multiplexer
http://www.micrel.com/_PDF/Eval-Board/sy58017-18-19u_eb.pdf

A flash high-precision Time-to-Digital Converter implemented in FPGA
technology
http://indico.cern.ch/event/49682/session/35/contribution/3/material/slides/0.ppt

FPGA-Based High Area Efficient Time-To-Digital IP Design
http://www.ifm.umich.mx/~villasen/TESIS/Mario/TDC.pdf

Firmware-only Implementation of Time-to-Digital Converter (TDC) in FPGA
http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/tdc1s.pdf

A Time-To-Digital Converter (TDC)
https://indico.phys.hawaii.edu/getFile.py/access?contribId=4&resId=0&materialId=slides&confId=392

96-Channel FPGA-Based Time-To-Digital Converter
http://hep.uchicago.edu/~frisch/TDC_NIM_v12.pdf

Texas Instruments THS788 Quad-Channel Time Measurement Unit (TMU)
http://www.ti.com/lit/ds/symlink/ths788.pdf

A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA
on the GANDALF module
http://wwwhad.physik.uni-freiburg.de/gandalf/modules/download_gallery/dl.php?file=59

Vernier's Delay Line Time-to-Digital Converter
http://www.np.ac.rs/yu/preuzimanjasve/publications/vol1br1/181-verniers-delay-line-time-to-digital-converter/download

Time-to-Digit Converter Based on Radiation-Tolerant FPGA

A High-Resolution Time-to-Digital Converter Implemented in
Field-Programmable-Gate-Arrays
http://mi.sibet.cas.cn/zlgx/201310/W020131024537685817071.pdf

Picosecond Resolution Time-to-Digital Converter Using G m -C
Integrator and SAR-ADC
http://www.ssc.pe.titech.ac.jp/publications/2014/IEEE_trans/xu/Xu_GmTDC_Journal_Final_V5.pdf

A Design of Vernier Coarse-Fine Time-to-Digital Converter using
Single Time Amplifier
http://www.jsts.org/html/journal/journal_files/2012/12/Year2012Volume12_04_05.pdf

Patents

Burbeck METHOD AND APPARATUS FOR AUTOMATICALLY MEASURING TIME
INTERVALS
https://patentimages.storage.googleapis.com/pdfs/US2665410.pdf

Frady DOUBLE INTERPOLATION METHOD AND APPARATUS FOR MEASURING TIME
INTERVALS
https://patentimages.storage.googleapis.com/pdfs/US2665411.pdf

Bagley ELECTRONIC INTERPOLATING COUNTER FQR THE TIME INTERVAL AND
FREQUENCY MEASUREMENT
https://patentimages.storage.googleapis.com/pdfs/US3133189.pdf

Nutt DIGITAL INTERVALOMETER
https://patentimages.storage.googleapis.com/pdfs/US3983481.pdf

Janowitz TIME INTERVAL MEASUREMENT METHOD AND APPARATUS
https://patentimages.storage.googleapis.com/pdfs/US3999128.pdf

Thornton HIGH RESOLUTION DATA ACQUISITION
http://patentimages.storage.googleapis.com/pdfs/US5200933.pdf

Condreva HIGH RESOLUTION TIME INTERVAL COUNTER
https://patentimages.storage.googleapis.com/pdfs/US5333162.pdf

Kattan TIME INTERVAL ANALYZER HAVING MULTIPLE MEASUREMENT CIRCUITS
http://patentimages.storage.googleapis.com/pdfs/US6226231.pdf

Nair CORRECTION FOR PIPELINED ANALOG TO DIGITAL (A/D) CONVERTER
http://patentimages.storage.googleapis.com/pdfs/US6784814.pdf

Gao HIGH RESOLUTION SAMPLING-BASED TIME TO DIGITAL CONVERTER
http://patentimages.storage.googleapis.com/pdfs/US8564471.pdf

Thesis

An Integrated Cmos High Precision Time-To-Digital Converter Based On
Stabilised Three-Stage Delay Line Interpolation

Multi-Path Differential Delay Line based Time-to-Digital Converter
for ADPLL
http://www.diva-portal.org/smash/get/diva2:635168/FULLTEXT01.pdf

Noise Shaping Techniques for Analog and Time to Digital Converters
Using Voltage Controlled Oscillators
http://cppsim.org/Publications/Theses/straayer_phdthesis.pdf

Implementation of the high resolution high dynamic Time to Digital
Converter
https://www.politesi.polimi.it/bitstream/10589/92658/1/Thesis_V1.0.2_Build04031059.pdf

A Stabilized Multi- Channel Cmos Time-To- Digital Converter Based On
A Low Frequency Reference
http://herkules.oulu.fi/isbn9789514299322/isbn9789514299322.pdf


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.

Mike, That was a nice set of homework reading you provided for us. People might have missed it. Cheers, Magnus > > I have a few Rubidiums and OCXOs I'd like to get running for a month > or so to stabilize. During this time, I'd like to monitor the > performance to discover any bad units and see which are the best > ones. > > For example, TVB shows a 100:1 variation in ADEV in FE-405B > Rubidiums. The section is titled "Variation in FE-405B" in > > http://leapsecond.com/pages/fe405/ > > Clearly, it would be futile to try to use a bad unit in setting up a > gpsdo. > > I need some means of measuring the performance of these units while > they are running. A dozen HP5370's would be out of the question. I > did some research to find the different methods available and decide > which has the lowest per-channel cost and best performance. > > Here are some of the references I found. I discarded most of the poor ones > and tried to keep only the ones that talk about measurements in the > picosecond or femtosecond range. > > I did not include DMTD since the concept is so simple. The Reviews help to > get oriented, but sometimes it takes reading the papers and the patents to > see the timing diagrams and understand what the author is trying to do. > > There are many different variations on the FPGA approach. I would be > concerned about the development time, the large DNL, and the problems with > crosstalk on multi-channel units. > > The TI THS788 looks good on paper, but it is single-source, not well > stocked, and there is lttle information on crosstalk between channels. It > is also quite expensive per channel. There are no application notes and > little or no information on usage on the web. > > The Thesis generally have excellent reviews worth reading. > > Articles > > Simple PICTIC 250ps time interval counter > http://www.ko4bb.com/dokuwiki/doku.php?id=precision_timing:pictic > > Griffiths Time to Digital converters > http://www.ko4bb.com/~bruce/TDC.html > > [time-nuts] Experience with THS788 from TI?- > Attila Kinali's post on TDC methods > https://www.febo.com/pipermail/time-nuts/2012-March/065337.html > > Reviews > > Review of methods for time interval measurements with picosecond > resolution > http://ztc.wel.wat.edu.pl/met4_1_004.pdf > > Low resource FPGA-based 32 Channel Time to Digital Converter > - Excellent review of TDC techniques and measurement verification > http://arxiv.org/vc/arxiv/papers/1206/1206.0679v3.pdf > > Design, construction and tests of a high resolution, high dynamic > range Time to Digital Converter > - Excellent review of TDC methods and test techniques > http://inspirehep.net/record/1313667/files/getfile.pdf > > Review Of Sub-Nanosecond Time-Interval Measurements > http://www.slac.stanford.edu/cgi-wrap/getdoc/slac-pub-1331.pdf > > Chapter 1 Time Interval Measurement Literature Review > http://www.rrsg.ee.uct.ac.za/members/jon/activities/timcs.pdf > > Time intervals measurements and generation methods review > http://www.ohwr.org/attachments/128/Time_Interval_Measurements_Techniques.pdf > > Papers > > A Cyclic CMOS Time-to-Digital Converter With Deep Sub-nanosecond > Resolution > http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021548/1/00777354.pdf > > A 96-Channel FPGA-based Time-to-Digital Converter > http://arxiv.org/pdf/physics/0502062.pdf > > Complete and Compact 32-Channel System for Time-Correlated > Single-Photon Counting Measurements > http://ieeexplore.ieee.org/ielx7/4563994/6588410/06617673.pdf?arnumber=6617673 > > Design and Development of GPS Receiver for PNSS-1 > http://www.suparco.gov.pk/pages/presentations-pdf/day-1/session-2/12C-II/1.pdf > > A Novel Ultra-fast High Resolution Time-domain EMI Measurement > System based on Field Programmable Gate Arrays > https://mediatum.ub.tum.de/doc/1163324/1163324.pdf > > High Precision Frequency Measurement System Based on Different > Frequency Phase Processing (in Chinese) > http://xbzrb.tjujournals.com/oa/pdfdow.aspx?Type=pdf&FileName=11acd53a-876d-4ab0-8906-572aa3836215.pdf > > A 51-dB SNDR DCO-Based TDC Using Two-Stage Second-Order Noise Shaping > http://www28.cs.kobe-u.ac.jp/pdf/1205_konishi_iscas.pdf > > Integrated High-Resolution Multi-Channel Time-to-Digital Converters > (TDCs) for PET Imaging > - Discusses 100 fs Gated-ring-oscillator (GRO) > http://cdn.intechopen.com/pdfs-wm/12913.pdf > > A 26 ps RMS time-to-digital converter core for Spartan-6 FPGAs > http://arxiv.org/pdf/1303.6840v1.pdf > > A High-Resolution Flash Time-to-Digital Converter Taking Into > Account Process Variability > http://conferences.computer.org/async2007/PRS/15-minas-async07.pdf > > Principles and Instrumentation in Time-of-flight Mass Spectrometry > http://www.wiley.com/legacy/wileychi/ms/articles/1519_a.pdf > > TEMPERATURE SENSING CRYSTAL HTS-206 > - maybe more stable than thermistor > http://www.abcelectronique.fr/composants/telechargement_datasheet.php?id=385911&part-number=HTS-206 > > A novel method of measurement of time and amplitude of analog > signals based solely on FPGA units > http://koza.if.uj.edu.pl/pet-symposium-2013/talks/17.pdf > > A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter > in a Field Programmable Gate Array > http://iopscience.iop.org/1748-0221/7/02/C02004/pdf/1748-0221_7_02_C02004.pdf > > A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA > on the GANDALF module > http://iopscience.iop.org/1748-0221/7/03/C03008/pdf/1748-0221_7_03_C03008.pdf > > FPGA Based Data Digitisation with Commercial Elements > http://indico.scc.kit.edu/indico/getFile.py/access?contribId=4&sessionId=4&resId=0&materialId=slides&confId=21 > > Time-to-Digital Converter Architecture with Residue Arithmetic and > its FPGA Implementation > http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2014/2014-11li_congbing2.pdf > > An FPGA-Integrated Time-to-Digital Converter Based on a Ring > Oscillator for Programmable Delay Line Resolution Measurement > - 0.4 ps Xilinx FPGA > http://downloads.hindawi.com/journals/jece/2014/230803.pdf > > First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter > - Gated Ring Oscillator based TDC > http://ims.unipv.it/~franco/ConferenceProc/313.pdf > > A High Resolution FPGA-based TDC with Nonlinearity Calibration > http://www2.ess.nthu.edu.tw/~cwlu/conference/5_A%20High%20Resolution%20FPGA-based%20TDC%20with.pdf > > A Single-Slope 80MS/s ADC using Two-Step Time-to-Digital Conversion > http://dspace.mit.edu/openaccess-disseminate/1721.1/60073 > > Simulation of ps-Detector Electronics > http://hep.uchicago.edu/workshops/2005-picosecond/8-Fukun_Tang_ps_sim.ppt > > High Precision Time and Frequency Counter for Mobile Applications > http://www.wseas.us/e-library/transactions/circuits/2010/89-747.pdf > > Time-to-Digital Converter based on Analog Time Expansion for 3D Time > of Flight Cameras > https://pure.ltu.se/portal/files/95016947/90220A.pdf > > A Pc-Based Time Interval Counter With 200 Ps Resolution > http://www.dtic.mil/get-tr-doc/pdf?AD=ADA427911 > > The Development of Large-area, Picosecond Resolution, Time-of-Flight > Detectors > http://hep.uchicago.edu/~frisch/adr.pdf > > Low-Voltage High-Frequency Gated Ring Oscillator Using Bootstrap > Technique > http://www.el.gunma-u.ac.jp/~kobaweb/news/pdf/2012/AMDE2012_Kamiyama.pdf > > High-resolution short time interval measurement system implemented > in a single FPGA chip > http://download.springer.com/static/pdf/727/art%253A10.1007%252Fs11434-011-4421-3.pdf?auth66=1418360984_e35e8a8588d3977c4d4d4d2109c1aaaa&ext=.pdf > > Implementation of sub-nanosecond time-to-digital convertor in > field-programmable gate array > https://hal.archives-ouvertes.fr/in2p3-00873192/PDF/articleMST_Marteau-et-al_v1.pdf > > New Jitter Measurement Technique Using TDC Principle in a FPGA > Component > http://www.inatel.br/biblioteca/component/docman/doc_download/3831-new-jitter-measurement-technique-using-tdc-principle > > High Resolution Modular Time Interval Counter > http://ilrs.gsfc.nasa.gov/docs/timing/artyukh_time_interval_counter.pdf > > Using Dynamic Reconfiguration to Implement High-Resolution > Programmable Delays on an FPGA > http://www.iro.umontreal.ca/~feeley/papers/BergeronFeeleyDaigneaultDavidNEWCAS08.pdf > > A 2.6ps rms -Period-Jitter 900MHz All-Digital Fractional-N PLL Built > with Standard Cells > http://www-bsac.eecs.berkeley.edu/publications/search/send_publication_pdf2client.php?pubID=1307595132 > > C111 / P111 4 channel Time to Digital Converter User's manual > http://www.esrf.eu/files/live/sites/www/files/Instrumentation/DetectorsAndElectronics/Units/Electronics/digital-electronics-lab/c111.pdf > > Carry-chain propagation delay impacts on resolution of FPGA-based TDC > http://www.j.sinap.ac.cn/nst/EN/article/downloadArticleFile.do?attachType=PDF&id=457 > > A 19.6 ps, FPGA-Based TDC With Multiple Channels for Open Source > Applications > http://ens.ewi.tudelft.nl/pubs/charbon12tcas_favi.pdf > > A data driven high performance Time to Digital Converter > http://ph-collectif-lecc-workshops.web.cern.ch/ph-collectif-lecc-workshops/LEB00_Book/tracker/christiansen_track.pdf > > On-Chip Timing Measurement Architecture with Femtosecond Resolution > http://eprints.soton.ac.uk/262543/1/collinsm_timemeasurement2.pdf > > A 13b 315fs rms 2mW 500MS/s 1MHz Bandwidth Highly Digital > Time-to-Digital Converter Using Switched Ring Oscillators > http://www.cse.psu.edu/~xydong/files/proceedings/ISSCC2012/files/D27_04.pdf > > A high resolution Time-to-Digital Converter on FPGA for > Time-Correlated Single Photon Counting > http://libgen.org/scimag/get.php?doi=10.1109/mwscas.2012.6292166 > > A Design of Vernier Coarse-Fine Time-to-Digital Converter using > Single Time Amplifier > http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2012/v12n4/E1STAN_2012_v12n4_411.pdf > > All Digital Time-to-Digital Converter with High Resolution and Wide > Detect Range > http://www.engineeringletters.com/issues_v19/issue_3/EL_19_3_16.pdf > > Examples of 1 PPS Clock Measuring Systems > http://www.wriley.com/Examples%20of%201%20PPS%20Clock%20Measuring%20Systems.pdf > > On-Chip Processing for the Wave Union TDC Implemented in FPGA > http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-275-e.pdf > > 18-channel FPGA Wave Union TDC for Time-of-Flight Applications > http://lss.fnal.gov/archive/2009/conf/fermilab-conf-09-573-ppd.pdf > > A 96-channel FPGA-based Time-to-Digital Converter (TDC) > http://www.phys.sinica.edu.tw/~e906/WWW_public/Doc/TDC/FPGA_TDC.pdf > > Design of FPGA-based TDC for the ICAL Detector of India-based > Neutrino Observatory > http://www.hecr.tifr.res.in/~sudeshnadg/publication/FPGA_TDC.pdf > > FPGA based Time-to-Digital Converter > http://www.sympnp.org/proceedings/56/G7.pdf > > A Flash Time-to-Digital Converter with Two Independent Time Coding > Lines > IMEKO-IWADC-2011-12.pdf > http://www.imeko.org/publications/iwadc-2011/IMEKO-IWADC-2011-12.pdf > > A 17ps Time-to-Digital Converter Implemented in 65nm FPGA Technology > http://infoscience.epfl.ch/record/139431/files/isfpga09-cfavi.pdf > > A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 um CMOS Technology > http://www.eng.auburn.edu/~daifa01/Top/PubPapers/2010/Jpaper2010-02.pdf > > A high-speed wide dynamic range time-to-digital converter > http://www.ssl.berkeley.edu/~mlampton/LamptonRaffanti.pdf > > High Resolution Time-Interval Measurement Systems Applied To Flow > Measurement > http://www.metrology.pg.gda.pl/full/2014/M&MS_2014_077.pdf > > Accurate time interval measurement electronics for pulsed time of > flight laser radar > http://www.ee.oulu.fi/~kari/Papers/Nantes1997.pdf > > Signal Processing for Pico-second Resolution Timing Measurements > http://psec.uchicago.edu/Papers/NIM_v8b_final.pdf > > High-Resolution Time-to-Digital Converter in Field Programmable Gate Array > http://cds.cern.ch/record/1158663/files/p383.pdf > > Random Errors in Time Interval Measurement Based on SAW Filter Excitation > http://libgen.org/scimag/get.php?doi=10.1109/tim.2007.915465 > > A 96-channel, 500 ps resolution TDC board for the BaBar experiment at SLAC > http://www.ge.infn.it/babar/ITB/RT99/paper.pdf > > A Cyclic Vernier TDC for ADPLLs Synthesized From a Standard Cell Library > http://wwweb.eecs.umich.edu/wics/publications/Park_TCASI2011.pdf > > Nonlinearity Correction of the Integrated Time-to-Digital Converter > with Direct Coding > http://libgen.org/scimag/get.php?doi=10.1109/19.571882 > > PICTIC Interpolator Linearity > http://www.wriley.com/PICTIC%20Interpolator%20Linearity.pdf > > Firmware-only Implementation of Time-to-Digital Converter (TDC) in > Field-Programmable Gate Array (FPGA) > http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/PID26522.pdf > > High-Precise Portable Time Interval and Frequency Counter > http://tycho.usno.navy.mil/ptti/2012papers/PTTI2012.p247.pdf > > FPGA-based time counters with a wander measurement mode > http://www.pwt.et.put.poznan.pl/PWT_2012/PWT%202012_2242.pdf > > The Simple PICTIC > http://www.ko4bb.com/dokuwiki/lib/exe/fetch.php?id=precision_timing%3Apictic&cache=cache&media=precision_timing:simple_pictic.pdf > > A Saw-tooth Wave Based Design of Time to Digital Converter > http://www.wseas.us/e-library/conferences/2009/budapest/SMO/SMO68.pdf > > A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping > http://www.cppsim.org/Publications/JNL/straayer_jssc09.pdf > > Micrel LVPECL, CML 5GHz - 7GHz Buffer > http://www.micrel.com/_PDF/Eval-Board/sy58011-12-13u_eb.pdf > > Micrel LVPECL, CML 4GbpS - 10.7Gbps Multiplexer > http://www.micrel.com/_PDF/Eval-Board/sy58017-18-19u_eb.pdf > > A flash high-precision Time-to-Digital Converter implemented in FPGA > technology > http://indico.cern.ch/event/49682/session/35/contribution/3/material/slides/0.ppt > > FPGA-Based High Area Efficient Time-To-Digital IP Design > http://www.ifm.umich.mx/~villasen/TESIS/Mario/TDC.pdf > > Firmware-only Implementation of Time-to-Digital Converter (TDC) in FPGA > http://www-ppd.fnal.gov/EEDOffice-W/Projects/ckm/comadc/tdc1s.pdf > > A Time-To-Digital Converter (TDC) > https://indico.phys.hawaii.edu/getFile.py/access?contribId=4&resId=0&materialId=slides&confId=392 > > 96-Channel FPGA-Based Time-To-Digital Converter > http://hep.uchicago.edu/~frisch/TDC_NIM_v12.pdf > > Texas Instruments THS788 Quad-Channel Time Measurement Unit (TMU) > http://www.ti.com/lit/ds/symlink/ths788.pdf > > A 128-channel Time-to-Digital Converter (TDC) inside a Virtex-5 FPGA > on the GANDALF module > http://wwwhad.physik.uni-freiburg.de/gandalf/modules/download_gallery/dl.php?file=59 > > Vernier's Delay Line Time-to-Digital Converter > http://www.np.ac.rs/yu/preuzimanjasve/publications/vol1br1/181-verniers-delay-line-time-to-digital-converter/download > > Time-to-Digit Converter Based on Radiation-Tolerant FPGA > - Interesting calibration analysis > http://kmlinux.fjfi.cvut.cz/~vacekmic/docs/vzlu_tdc.pdf > > A High-Resolution Time-to-Digital Converter Implemented in > Field-Programmable-Gate-Arrays > http://mi.sibet.cas.cn/zlgx/201310/W020131024537685817071.pdf > > Picosecond Resolution Time-to-Digital Converter Using G m -C > Integrator and SAR-ADC > http://www.ssc.pe.titech.ac.jp/publications/2014/IEEE_trans/xu/Xu_GmTDC_Journal_Final_V5.pdf > > A Design of Vernier Coarse-Fine Time-to-Digital Converter using > Single Time Amplifier > http://www.jsts.org/html/journal/journal_files/2012/12/Year2012Volume12_04_05.pdf > > Patents > > Burbeck METHOD AND APPARATUS FOR AUTOMATICALLY MEASURING TIME > INTERVALS > https://patentimages.storage.googleapis.com/pdfs/US2665410.pdf > > Frady DOUBLE INTERPOLATION METHOD AND APPARATUS FOR MEASURING TIME > INTERVALS > https://patentimages.storage.googleapis.com/pdfs/US2665411.pdf > > Bagley ELECTRONIC INTERPOLATING COUNTER FQR THE TIME INTERVAL AND > FREQUENCY MEASUREMENT > https://patentimages.storage.googleapis.com/pdfs/US3133189.pdf > > Nutt DIGITAL INTERVALOMETER > https://patentimages.storage.googleapis.com/pdfs/US3983481.pdf > > Janowitz TIME INTERVAL MEASUREMENT METHOD AND APPARATUS > https://patentimages.storage.googleapis.com/pdfs/US3999128.pdf > > Thornton HIGH RESOLUTION DATA ACQUISITION > http://patentimages.storage.googleapis.com/pdfs/US5200933.pdf > > Condreva HIGH RESOLUTION TIME INTERVAL COUNTER > https://patentimages.storage.googleapis.com/pdfs/US5333162.pdf > > Kattan TIME INTERVAL ANALYZER HAVING MULTIPLE MEASUREMENT CIRCUITS > http://patentimages.storage.googleapis.com/pdfs/US6226231.pdf > > Nair CORRECTION FOR PIPELINED ANALOG TO DIGITAL (A/D) CONVERTER > http://patentimages.storage.googleapis.com/pdfs/US6784814.pdf > > Gao HIGH RESOLUTION SAMPLING-BASED TIME TO DIGITAL CONVERTER > http://patentimages.storage.googleapis.com/pdfs/US8564471.pdf > > Thesis > > An Integrated Cmos High Precision Time-To-Digital Converter Based On > Stabilised Three-Stage Delay Line Interpolation > - Excellent review > http://herkules.oulu.fi/isbn951427461X/isbn951427461X.pdf > > Multi-Path Differential Delay Line based Time-to-Digital Converter > for ADPLL > http://www.diva-portal.org/smash/get/diva2:635168/FULLTEXT01.pdf > > Noise Shaping Techniques for Analog and Time to Digital Converters > Using Voltage Controlled Oscillators > http://cppsim.org/Publications/Theses/straayer_phdthesis.pdf > > Implementation of the high resolution high dynamic Time to Digital > Converter > https://www.politesi.polimi.it/bitstream/10589/92658/1/Thesis_V1.0.2_Build04031059.pdf > > A Stabilized Multi- Channel Cmos Time-To- Digital Converter Based On > A Low Frequency Reference > http://herkules.oulu.fi/isbn9789514299322/isbn9789514299322.pdf > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. >