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What phase variations to expect in a DMTD due to temperature fluctuations?

EK
Erik Kaashoek
Sun, Oct 23, 2022 4:05 PM

During the testing of a DMTD there appears to be a "large" sensitivity
to temperature variations.
Opening a door in the room with the DMTD causes changes in the phase
difference in the order of 1 ps
Blowing cold air over the encased DMTD causes phase variations up to 10 ps.
The analog part of the DMTD exists out of some coax, SMA connectors,
active mixers and ADC's. The rest is digital and not expected to be
temperature sensitive.
Its not clear yet which parts are causing the temperature sensitivity
As the design is symmetric (both inputs have the same components almost
the same layout) I did not expect this.
Are these levels to be expected?
Erik.

During the testing of a DMTD there appears to be a "large" sensitivity to temperature variations. Opening a door in the room with the DMTD causes changes in the phase difference in the order of 1 ps Blowing cold air over the encased DMTD causes phase variations up to 10 ps. The analog part of the DMTD exists out of some coax, SMA connectors, active mixers and ADC's. The rest is digital and not expected to be temperature sensitive. Its not clear yet which parts are causing the temperature sensitivity As the design is symmetric (both inputs have the same components almost the same layout) I did not expect this. Are these levels to be expected? Erik.
PK
Poul-Henning Kamp
Sun, Oct 23, 2022 7:58 PM

Erik Kaashoek via time-nuts writes:

The rest is digital and not expected to be temperature sensitive.

At a 1ps level of interest, that is not a well-founded expectation.

In particular look out for power-supply variations, which will transpose the trigger point for your "digital" clock-signals.

PS: Do not ignore mechanics either: At the speed of light 1ps takes you only 0.3mm.

--
Poul-Henning Kamp      | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG        | TCP/IP since RFC 956
FreeBSD committer      | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

-------- Erik Kaashoek via time-nuts writes: > The rest is digital and not expected to be temperature sensitive. At a 1ps level of interest, that is not a well-founded expectation. In particular look out for power-supply variations, which will transpose the trigger point for your "digital" clock-signals. PS: Do not ignore mechanics either: At the speed of light 1ps takes you only 0.3mm. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk@FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence.
EK
Erik Kaashoek
Sun, Oct 23, 2022 8:15 PM

The down converted input signals are converted to digital using an ADC. The
rest is DSP. No digital circuit triggering timers. Can the clock of the MCU
still have an impact? For sure the clock of the ADC can have an impact.

The mechanics are very nasty. No touching of the table with the DMTD on it.
Worst are the coax cables. BNC connectors are terribly unstable.

Is 1 to 10 ps to be expected in the electronics? Or should I invest in semi
rigid coax?
Erik

On Sun, Oct 23, 2022, 21:58 Poul-Henning Kamp phk@phk.freebsd.dk wrote:


Erik Kaashoek via time-nuts writes:

The rest is digital and not expected to be temperature sensitive.

At a 1ps level of interest, that is not a well-founded expectation.

In particular look out for power-supply variations, which will transpose
the trigger point for your "digital" clock-signals.

PS: Do not ignore mechanics either: At the speed of light 1ps takes you
only 0.3mm.

--
Poul-Henning Kamp      | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG        | TCP/IP since RFC 956
FreeBSD committer      | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

The down converted input signals are converted to digital using an ADC. The rest is DSP. No digital circuit triggering timers. Can the clock of the MCU still have an impact? For sure the clock of the ADC can have an impact. The mechanics are very nasty. No touching of the table with the DMTD on it. Worst are the coax cables. BNC connectors are terribly unstable. Is 1 to 10 ps to be expected in the electronics? Or should I invest in semi rigid coax? Erik On Sun, Oct 23, 2022, 21:58 Poul-Henning Kamp <phk@phk.freebsd.dk> wrote: > -------- > Erik Kaashoek via time-nuts writes: > > > The rest is digital and not expected to be temperature sensitive. > > At a 1ps level of interest, that is not a well-founded expectation. > > In particular look out for power-supply variations, which will transpose > the trigger point for your "digital" clock-signals. > > PS: Do not ignore mechanics either: At the speed of light 1ps takes you > only 0.3mm. > > -- > Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 > phk@FreeBSD.ORG | TCP/IP since RFC 956 > FreeBSD committer | BSD since 4.3-tahoe > Never attribute to malice what can adequately be explained by incompetence. >
PK
Poul-Henning Kamp
Sun, Oct 23, 2022 8:48 PM

Erik Kaashoek writes:

Or should I invest in semirigid coax?

I think you are at the level where you have to treat everything as
suspect, and through well designed experiments try to isolate where
to spend money.

Some randomish input:

  1. Take photos of the setup of /all/ your experiments, so you
    later can figure out which ones were affected by the magnetized
    screwdriver or whatever.

  2. Make your circuit/experiment constant power.  Having separate
    "idle" and "measure" modes, forces you to wait for thermal
    balance every time you start a measurement.  (One of the few
    things HP only got /almost/ right with the HP3458A)

  3. Characterize your sensitivities.  Modulate the power-supply,
    see what happens.  Module the temperature, see what happens.
    kick the table, see what happens.  Turn the experiment 90, 180 and
    270 degrees around as many axis as you can/dare, see what happens.
    Run the experiment in full light and darkness, see what happens.
    If you dont know your sensitivities, you dont know if your
    readings are real or noise, even if they reach statistical
    significance.

  4. Pre-owned fridges and freezers make good cheap shielded thermal
    chambers, if you do not plug them in.  If the experiment produces
    too much heat, run constant temperature water through the coils.
    If there is space, add a couple of bricks to add thermal impedance.

And good luck :-)

--
Poul-Henning Kamp      | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG        | TCP/IP since RFC 956
FreeBSD committer      | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.

-------- Erik Kaashoek writes: > Or should I invest in semirigid coax? I think you are at the level where you have to treat everything as suspect, and through well designed experiments try to isolate where to spend money. Some randomish input: 1. Take photos of the setup of /all/ your experiments, so you later can figure out which ones were affected by the magnetized screwdriver or whatever. 2. Make your circuit/experiment constant power. Having separate "idle" and "measure" modes, forces you to wait for thermal balance every time you start a measurement. (One of the few things HP only got /almost/ right with the HP3458A) 3. Characterize your sensitivities. Modulate the power-supply, see what happens. Module the temperature, see what happens. kick the table, see what happens. Turn the experiment 90, 180 and 270 degrees around as many axis as you can/dare, see what happens. Run the experiment in full light and darkness, see what happens. If you dont know your sensitivities, you dont know if your readings are real or noise, even if they reach statistical significance. 4. Pre-owned fridges and freezers make good cheap shielded thermal chambers, if you do not plug them in. If the experiment produces too much heat, run constant temperature water through the coils. If there is space, add a couple of bricks to add thermal impedance. And good luck :-) -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk@FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence.
BK
Bob kb8tq
Sun, Oct 23, 2022 11:06 PM

Hi

When you blow cold air over this or that, you likely create a temperature
gradient. Sensitivities of various parts are actually higher to gradients
than to temperature offsets. It’s typically a stress / strain relation that relaxes
out in steady state.

In addition to ( as noted above ) suspecting everything in the circuit. You
also have to suspect the measurement technique……

Bob

On Oct 23, 2022, at 12:05 PM, Erik Kaashoek via time-nuts time-nuts@lists.febo.com wrote:

During the testing of a DMTD there appears to be a "large" sensitivity to temperature variations.
Opening a door in the room with the DMTD causes changes in the phase difference in the order of 1 ps
Blowing cold air over the encased DMTD causes phase variations up to 10 ps.
The analog part of the DMTD exists out of some coax, SMA connectors, active mixers and ADC's. The rest is digital and not expected to be temperature sensitive.
Its not clear yet which parts are causing the temperature sensitivity
As the design is symmetric (both inputs have the same components almost the same layout) I did not expect this.
Are these levels to be expected?
Erik.


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Hi When you blow cold air over this or that, you likely create a temperature gradient. Sensitivities of various parts are actually higher to gradients than to temperature offsets. It’s typically a stress / strain relation that relaxes out in steady state. In addition to ( as noted above ) suspecting everything in the circuit. You also have to suspect the measurement technique…… Bob > On Oct 23, 2022, at 12:05 PM, Erik Kaashoek via time-nuts <time-nuts@lists.febo.com> wrote: > > During the testing of a DMTD there appears to be a "large" sensitivity to temperature variations. > Opening a door in the room with the DMTD causes changes in the phase difference in the order of 1 ps > Blowing cold air over the encased DMTD causes phase variations up to 10 ps. > The analog part of the DMTD exists out of some coax, SMA connectors, active mixers and ADC's. The rest is digital and not expected to be temperature sensitive. > Its not clear yet which parts are causing the temperature sensitivity > As the design is symmetric (both inputs have the same components almost the same layout) I did not expect this. > Are these levels to be expected? > Erik. > _______________________________________________ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe send an email to time-nuts-leave@lists.febo.com
JF
jeanmichel.friedt@femto-st.fr
Mon, Oct 24, 2022 5:19 AM

The down converted input signals are converted to digital using an ADC. The
rest is DSP. No digital circuit triggering timers. Can the clock of the MCU
still have an impact? For sure the clock of the ADC can have an impact.

I realized when completing http://jmfriedt.free.fr/ifcs2021.pdf that the only
clock that matters in Software Defined Radio is the ADC clock which timestamps
each and every sample, from which subsequent digital processing can recover the
acquisition time. The digital processing system can be asynchronous, buffered, pipelined
but the latency between acquisition and processing will not matter in an open
loop analysis of the radiofrequency data. In the cited work we mistakenly believed
initially that the CPU clock had to be steered, before realizing it was only the clock
referencing the ADC (and the FPGA) that mattered.

Best, JM

> The down converted input signals are converted to digital using an ADC. The > rest is DSP. No digital circuit triggering timers. Can the clock of the MCU > still have an impact? For sure the clock of the ADC can have an impact. I realized when completing http://jmfriedt.free.fr/ifcs2021.pdf that the only clock that matters in Software Defined Radio is the ADC clock which timestamps each and every sample, from which subsequent digital processing can recover the acquisition time. The digital processing system can be asynchronous, buffered, pipelined but the latency between acquisition and processing will not matter in an open loop analysis of the radiofrequency data. In the cited work we mistakenly believed initially that the CPU clock had to be steered, before realizing it was only the clock referencing the ADC (and the FPGA) that mattered. Best, JM
JH
Javier Herrero
Mon, Oct 24, 2022 6:02 AM

Hello,

PTFE cables have quite a phase variation vs temperature, with the worse
slope just around 20ºC. Better alternatives are the Huber+Suhner CT
cables. The catalog shows some nice curves on phase variation vs
temperature:
https://literature.hubersuhner.com/Technologies/Radiofrequency/ct-product-family-en/?page=1

Best regards,

Javier

On 10/23/22 22:15, Erik Kaashoek via time-nuts wrote:

The down converted input signals are converted to digital using an ADC. The
rest is DSP. No digital circuit triggering timers. Can the clock of the MCU
still have an impact? For sure the clock of the ADC can have an impact.

The mechanics are very nasty. No touching of the table with the DMTD on it.
Worst are the coax cables. BNC connectors are terribly unstable.

Is 1 to 10 ps to be expected in the electronics? Or should I invest in semi
rigid coax?
Erik

On Sun, Oct 23, 2022, 21:58 Poul-Henning Kamp phk@phk.freebsd.dk wrote:


Erik Kaashoek via time-nuts writes:

The rest is digital and not expected to be temperature sensitive.

At a 1ps level of interest, that is not a well-founded expectation.

In particular look out for power-supply variations, which will transpose
the trigger point for your "digital" clock-signals.

PS: Do not ignore mechanics either: At the speed of light 1ps takes you
only 0.3mm.

--
Poul-Henning Kamp      | UNIX since Zilog Zeus 3.20
phk@FreeBSD.ORG        | TCP/IP since RFC 956
FreeBSD committer      | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.


time-nuts mailing list -- time-nuts@lists.febo.com
To unsubscribe send an email to time-nuts-leave@lists.febo.com

Hello, PTFE cables have quite a phase variation vs temperature, with the worse slope just around 20ºC. Better alternatives are the Huber+Suhner CT cables. The catalog shows some nice curves on phase variation vs temperature: https://literature.hubersuhner.com/Technologies/Radiofrequency/ct-product-family-en/?page=1 Best regards, Javier On 10/23/22 22:15, Erik Kaashoek via time-nuts wrote: > The down converted input signals are converted to digital using an ADC. The > rest is DSP. No digital circuit triggering timers. Can the clock of the MCU > still have an impact? For sure the clock of the ADC can have an impact. > > The mechanics are very nasty. No touching of the table with the DMTD on it. > Worst are the coax cables. BNC connectors are terribly unstable. > > Is 1 to 10 ps to be expected in the electronics? Or should I invest in semi > rigid coax? > Erik > > On Sun, Oct 23, 2022, 21:58 Poul-Henning Kamp <phk@phk.freebsd.dk> wrote: > >> -------- >> Erik Kaashoek via time-nuts writes: >> >>> The rest is digital and not expected to be temperature sensitive. >> At a 1ps level of interest, that is not a well-founded expectation. >> >> In particular look out for power-supply variations, which will transpose >> the trigger point for your "digital" clock-signals. >> >> PS: Do not ignore mechanics either: At the speed of light 1ps takes you >> only 0.3mm. >> >> -- >> Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 >> phk@FreeBSD.ORG | TCP/IP since RFC 956 >> FreeBSD committer | BSD since 4.3-tahoe >> Never attribute to malice what can adequately be explained by incompetence. >> > _______________________________________________ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe send an email to time-nuts-leave@lists.febo.com
CA
Carsten Andrich
Mon, Oct 24, 2022 8:10 AM

Hi Erik,

only the ADC clock should matter and the used ADC should be of the
simultaneous sampling type. If it's not, its multiplexer may have a
detrimental temperature-dependent effect on the phase measurement.

I've implemented a fully digital DMTD using USRP N210 with LFRX
daughterboards [1]. To analyze stability of the system itself, I
compared a split 10 MHz signal. Over the course of 4 days, the measured
standard deviation was 359 fs [1, Fig. 11]. I don't have temperature
measurements available, but the lab wasn't air conditioned, populated,
and diurnal difference between two SRS FS725 was clearly observable
(another measurement not in the paper).

The high stability could be explained by the N210's dual-channel ADC
that directly sampled both 10 MHz signals. I believe, temperature
differences between the preceding analog components (most importantly
the LFRX daughterboard) probably have a very limited effect on account
of the negligible relative bandwidth of the measured 10 MHz signals'
true frequency (a few (dozen) mHz vs. 10 MHz). If the 10 MHz were
down-mixed to a few Hz in the analog domain, the relative bandwidth
would increase substantially. Of course, that's just an educated guess.
I did not investigate temperature stability when I wrote the paper.

Best regards,
Carsten

[1] https://arxiv.org/pdf/1803.01438.pdf

On 24.10.22 07:19, jeanmichel.friedt--- via time-nuts wrote:

The down converted input signals are converted to digital using an ADC. The
rest is DSP. No digital circuit triggering timers. Can the clock of the MCU
still have an impact? For sure the clock of the ADC can have an impact.

I realized when completing http://jmfriedt.free.fr/ifcs2021.pdf that the only
clock that matters in Software Defined Radio is the ADC clock which timestamps
each and every sample, from which subsequent digital processing can recover the
acquisition time. The digital processing system can be asynchronous, buffered, pipelined
but the latency between acquisition and processing will not matter in an open
loop analysis of the radiofrequency data. In the cited work we mistakenly believed
initially that the CPU clock had to be steered, before realizing it was only the clock
referencing the ADC (and the FPGA) that mattered.

Best, JM


time-nuts mailing list -- time-nuts@lists.febo.com
To unsubscribe send an email to time-nuts-leave@lists.febo.com

Hi Erik, only the ADC clock should matter and the used ADC should be of the simultaneous sampling type. If it's not, its multiplexer may have a detrimental temperature-dependent effect on the phase measurement. I've implemented a fully digital DMTD using USRP N210 with LFRX daughterboards [1]. To analyze stability of the system itself, I compared a split 10 MHz signal. Over the course of 4 days, the measured standard deviation was 359 fs [1, Fig. 11]. I don't have temperature measurements available, but the lab wasn't air conditioned, populated, and diurnal difference between two SRS FS725 was clearly observable (another measurement not in the paper). The high stability could be explained by the N210's dual-channel ADC that directly sampled both 10 MHz signals. I believe, temperature differences between the preceding analog components (most importantly the LFRX daughterboard) probably have a very limited effect on account of the negligible relative bandwidth of the measured 10 MHz signals' true frequency (a few (dozen) mHz vs. 10 MHz). If the 10 MHz were down-mixed to a few Hz in the analog domain, the relative bandwidth would increase substantially. Of course, that's just an educated guess. I did not investigate temperature stability when I wrote the paper. Best regards, Carsten [1] https://arxiv.org/pdf/1803.01438.pdf On 24.10.22 07:19, jeanmichel.friedt--- via time-nuts wrote: >> The down converted input signals are converted to digital using an ADC. The >> rest is DSP. No digital circuit triggering timers. Can the clock of the MCU >> still have an impact? For sure the clock of the ADC can have an impact. > I realized when completing http://jmfriedt.free.fr/ifcs2021.pdf that the only > clock that matters in Software Defined Radio is the ADC clock which timestamps > each and every sample, from which subsequent digital processing can recover the > acquisition time. The digital processing system can be asynchronous, buffered, pipelined > but the latency between acquisition and processing will not matter in an open > loop analysis of the radiofrequency data. In the cited work we mistakenly believed > initially that the CPU clock had to be steered, before realizing it was only the clock > referencing the ADC (and the FPGA) that mattered. > > Best, JM > _______________________________________________ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe send an email to time-nuts-leave@lists.febo.com
TV
Tom Van Baak
Mon, Oct 24, 2022 8:33 AM

Are these levels to be expected?

I'd say 1 ps / C is fine, but the 10 ps number seems high so you may
want to identify the source of that. For some context look at the specs
of a metrology grade distribution amp:

https://spectradynamics.com/products/hpda-15rmi-high-performance-distribution-amplifier-1-50mhz/

Its tempco spec is 1.5 ps/C, which sounds good enough for a professional
timing lab to me. Even if you had 3 C modulation of temperature that's
under 5e-15 @1000 s so it would be in the noise. And if better
performance was required you can simply keep the room to 0.3 C instead
of 3 C. That way everything in your lab -- cables, connectors, power
supplies, oscillator references, measurement instruments -- improves
accordingly.

Another example is John Miles' TimePod [1] and PhaseStation [2]. Note
these are not spec'd explicitly in ps/C but rather ps/hour. I had not
seen that before.

/tvb

[1] https://www.miles.io/TimePod_5330A_user_manual.pdf

[2]
http://ww1.microchip.com/downloads/en/AppNotes/AN3526-Dual-Reference-Noise-and-Stability-Measurements-with-the-53100A-PNA-DS00003526A.pdf

On 10/23/2022 9:05 AM, Erik Kaashoek via time-nuts wrote:

During the testing of a DMTD there appears to be a "large" sensitivity
to temperature variations.
Opening a door in the room with the DMTD causes changes in the phase
difference in the order of 1 ps
Blowing cold air over the encased DMTD causes phase variations up to
10 ps.
The analog part of the DMTD exists out of some coax, SMA connectors,
active mixers and ADC's. The rest is digital and not expected to be
temperature sensitive.
Its not clear yet which parts are causing the temperature sensitivity
As the design is symmetric (both inputs have the same components
almost the same layout) I did not expect this.
Are these levels to be expected?
Erik.

> Are these levels to be expected? I'd say 1 ps / C is fine, but the 10 ps number seems high so you may want to identify the source of that. For some context look at the specs of a metrology grade distribution amp: https://spectradynamics.com/products/hpda-15rmi-high-performance-distribution-amplifier-1-50mhz/ Its tempco spec is 1.5 ps/C, which sounds good enough for a professional timing lab to me. Even if you had 3 C modulation of temperature that's under 5e-15 @1000 s so it would be in the noise. And if better performance was required you can simply keep the room to 0.3 C instead of 3 C. That way everything in your lab -- cables, connectors, power supplies, oscillator references, measurement instruments -- improves accordingly. Another example is John Miles' TimePod [1] and PhaseStation [2]. Note these are not spec'd explicitly in ps/C but rather ps/hour. I had not seen that before. /tvb [1] https://www.miles.io/TimePod_5330A_user_manual.pdf [2] http://ww1.microchip.com/downloads/en/AppNotes/AN3526-Dual-Reference-Noise-and-Stability-Measurements-with-the-53100A-PNA-DS00003526A.pdf On 10/23/2022 9:05 AM, Erik Kaashoek via time-nuts wrote: > During the testing of a DMTD there appears to be a "large" sensitivity > to temperature variations. > Opening a door in the room with the DMTD causes changes in the phase > difference in the order of 1 ps > Blowing cold air over the encased DMTD causes phase variations up to > 10 ps. > The analog part of the DMTD exists out of some coax, SMA connectors, > active mixers and ADC's. The rest is digital and not expected to be > temperature sensitive. > Its not clear yet which parts are causing the temperature sensitivity > As the design is symmetric (both inputs have the same components > almost the same layout) I did not expect this. > Are these levels to be expected? > Erik.
EK
Erik Kaashoek
Mon, Oct 24, 2022 12:43 PM

Hi Javier,
The PTFE cables have been replaced with semi-rigid coax cables and the
stability, both mechanical and temperature, have improved.
Thanks.
Erik.
On 24-10-2022 8:02, Javier Herrero via time-nuts wrote:

Hello,

PTFE cables have quite a phase variation vs temperature, with the
worse slope just around 20ºC. Better alternatives are the Huber+Suhner
CT cables. The catalog shows some nice curves on phase variation vs
temperature:
https://literature.hubersuhner.com/Technologies/Radiofrequency/ct-product-family-en/?page=1

Best regards,

Javier

Hi Javier, The PTFE cables have been replaced with semi-rigid coax cables and the stability, both mechanical and temperature, have improved. Thanks. Erik. On 24-10-2022 8:02, Javier Herrero via time-nuts wrote: > Hello, > > PTFE cables have quite a phase variation vs temperature, with the > worse slope just around 20ºC. Better alternatives are the Huber+Suhner > CT cables. The catalog shows some nice curves on phase variation vs > temperature: > https://literature.hubersuhner.com/Technologies/Radiofrequency/ct-product-family-en/?page=1 > > Best regards, > > Javier >