LA
Li Ang
Wed, Dec 24, 2014 4:19 PM
http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current board.
I'm not a hardware guy, feel free to correct my mistakes. :)
http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of cnt90
aka pm6690
Happy holidays
Li Ang
http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current board.
I'm not a hardware guy, feel free to correct my mistakes. :)
http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of cnt90
aka pm6690
Happy holidays
Li Ang
PS
paul swed
Wed, Dec 24, 2014 6:36 PM
Li
I had not been following the thread and for some reason followed your links.
Very nice to see your work.
Regards
Paul
WB8TSL
On Wed, Dec 24, 2014 at 11:19 AM, Li Ang lllaaa@gmail.com wrote:
Li
I had not been following the thread and for some reason followed your links.
Very nice to see your work.
Regards
Paul
WB8TSL
On Wed, Dec 24, 2014 at 11:19 AM, Li Ang <lllaaa@gmail.com> wrote:
> http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current board.
> I'm not a hardware guy, feel free to correct my mistakes. :)
>
>
> http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of cnt90
> aka pm6690
>
>
> Happy holidays
>
>
> Li Ang
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>
BC
Bob Camp
Wed, Dec 24, 2014 8:32 PM
Hi
Very interesting !! Thanks for sharing.
As you can see from the Fluke schematics, the input amplifiers on counters can get quite complex. I would definitely recommend playing a bit with the input channels on your board. Here’s what I would do, there are many other approaches:
-
Set up a high speed CMOS biased gate limiter with an OCXO. Quick approach is two 10K ohm resistors for bias (one to B+ one to ground), AC couple the sine wave into the junction. Junction also goes to the gate input.
-
Assume that the signal is good. (it may not be).
-
Compare the CMOS signal on one channel to your input amplifier on the other channel.
-
Attenuate the signal to the input amplifier and see what happens.
Again, there are lots of different ways to do the same sort of thing. I would not go overboard doing this with complicated circuits. You simply want a way to figure out what the input circuits are doing.
Have Fun!
Bob
Hi
Very interesting !! Thanks for sharing.
As you can see from the Fluke schematics, the input amplifiers on counters can get quite complex. I would definitely recommend playing a bit with the input channels on your board. Here’s what I would do, there are many other approaches:
1) Set up a high speed CMOS biased gate limiter with an OCXO. Quick approach is two 10K ohm resistors for bias (one to B+ one to ground), AC couple the sine wave into the junction. Junction also goes to the gate input.
2) Assume that the signal is good. (it may not be).
3) Compare the CMOS signal on one channel to your input amplifier on the other channel.
4) Attenuate the signal to the input amplifier and see what happens.
Again, there are *lots* of different ways to do the same sort of thing. I would not go overboard doing this with complicated circuits. You simply want a way to figure out what the input circuits are doing.
Have Fun!
Bob
> On Dec 24, 2014, at 11:19 AM, Li Ang <lllaaa@gmail.com> wrote:
>
> http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current board.
> I'm not a hardware guy, feel free to correct my mistakes. :)
>
>
> http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of cnt90
> aka pm6690
>
>
> Happy holidays
>
>
> Li Ang
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
BG
Bruce Griffiths
Wed, Dec 24, 2014 8:59 PM
The CLK1 input circuit produces an output incompatiblr with the 3.3V CMOS deice it drives.A pair of pnp transistors in an otherwise similar circuit is capable of producing a 3.3V CMOS compatible output signal.
Using independent voltage dividers to bias the transistor bases is a bad idea in that resistor tolerances may lead to a dc input offset of seeeveral tens of millivolts even with 1% resistors,
Bruce
On Thursday, 25 December 2014 6:13 AM, Li Ang <lllaaa@gmail.com> wrote:
http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current board.
I'm not a hardware guy, feel free to correct my mistakes. :)
http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of cnt90
aka pm6690
Happy holidays
Li Ang
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
The CLK1 input circuit produces an output incompatiblr with the 3.3V CMOS deice it drives.A pair of pnp transistors in an otherwise similar circuit is capable of producing a 3.3V CMOS compatible output signal.
Using independent voltage dividers to bias the transistor bases is a bad idea in that resistor tolerances may lead to a dc input offset of seeeveral tens of millivolts even with 1% resistors,
Bruce
On Thursday, 25 December 2014 6:13 AM, Li Ang <lllaaa@gmail.com> wrote:
http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current board.
I'm not a hardware guy, feel free to correct my mistakes. :)
http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of cnt90
aka pm6690
Happy holidays
Li Ang
_______________________________________________
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
LA
Li Ang
Fri, Dec 26, 2014 1:21 PM
Hi
Thanks for the suggestion. I will do some experiments with the front
end :)
2014-12-25 4:32 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi
Very interesting !! Thanks for sharing.
As you can see from the Fluke schematics, the input amplifiers on counters
can get quite complex. I would definitely recommend playing a bit with the
input channels on your board. Here’s what I would do, there are many other
approaches:
-
Set up a high speed CMOS biased gate limiter with an OCXO. Quick
approach is two 10K ohm resistors for bias (one to B+ one to ground), AC
couple the sine wave into the junction. Junction also goes to the gate
input.
-
Assume that the signal is good. (it may not be).
-
Compare the CMOS signal on one channel to your input amplifier on the
other channel.
-
Attenuate the signal to the input amplifier and see what happens.
Again, there are lots of different ways to do the same sort of thing. I
would not go overboard doing this with complicated circuits. You simply
want a way to figure out what the input circuits are doing.
Have Fun!
Bob
and follow the instructions there.
Hi
Thanks for the suggestion. I will do some experiments with the front
end :)
2014-12-25 4:32 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
> Hi
>
> Very interesting !! Thanks for sharing.
>
> As you can see from the Fluke schematics, the input amplifiers on counters
> can get quite complex. I would definitely recommend playing a bit with the
> input channels on your board. Here’s what I would do, there are many other
> approaches:
>
> 1) Set up a high speed CMOS biased gate limiter with an OCXO. Quick
> approach is two 10K ohm resistors for bias (one to B+ one to ground), AC
> couple the sine wave into the junction. Junction also goes to the gate
> input.
>
> 2) Assume that the signal is good. (it may not be).
>
> 3) Compare the CMOS signal on one channel to your input amplifier on the
> other channel.
>
> 4) Attenuate the signal to the input amplifier and see what happens.
>
> Again, there are *lots* of different ways to do the same sort of thing. I
> would not go overboard doing this with complicated circuits. You simply
> want a way to figure out what the input circuits are doing.
>
> Have Fun!
>
> Bob
>
>
> > On Dec 24, 2014, at 11:19 AM, Li Ang <lllaaa@gmail.com> wrote:
> >
> > http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current
> board.
> > I'm not a hardware guy, feel free to correct my mistakes. :)
> >
> >
> > http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of cnt90
> > aka pm6690
> >
> >
> > Happy holidays
> >
> >
> > Li Ang
> > _______________________________________________
> > time-nuts mailing list -- time-nuts@febo.com
> > To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> > and follow the instructions there.
>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>
BC
Bob Camp
Fri, Dec 26, 2014 2:12 PM
Hi
Don’t go to crazy on the front end. You can spend a year optimizing something like this. The objective is to see if the front end is a big problem now. It’s very easy to get to many things going on in a project. That makes it hard to complete.
All front end circuits will work better with worse with a 1 mV input than with a larger input signal. Some very common circuits have odd things (frequency doubling…) that happen as the input drops. Chains with a lot of gain can oscillate with certain combinations of input level and source impedance.
Some decisions you will eventually need to make:
Do you need a high input impedance counter input?
Most commercial counters have a >= 1 mega ohm input impedance capability. This lets you put an oscilloscope probe on the counter. It’s nice for probing around in a circuit. I have rarely used this feature. It’s much more convenient to take the output of the oscilloscope and feed it into the counter. That way the probe stays on the scope and you can see the signal you are probing as well as count it.
Do you need to deal with low frequency signals?
Things like pulse per second inputs are a TimeNut thing to look at. Most of the world does not try to count 1 Hz. Timing signals tend to be DC coupled. They often have odd duty cycles even if they are not low frequency. A DC coupled input channel implies a range of adjustable trigger levels. This can get very crazy very fast. A simple TTL compatible input that triggers at ~ 1 V and will accept 2 to 5V logic signals is an easy way to go. Is that enough?
Some decisions that commercial counter people get to make:
Do you need to deal with low level RF signals?
Do you need to deal with modulated RF signals?
Do you need to deal with microwave signals?
Do you need adjustable front end filtering to reject RF on your signals?
Do you need to tolerate 250V AC or 1KV DC on the counter input?
————
For now I’d think about the second set of decisions, but not worry about them. Even the two decisions in the first group are not all that important to make right now. They all have many sub decisions associated with them. One example is adding a negative power supply to allow a DC trigger at zero volts.
A very common solution: Build the counter with just logic level inputs. Keep things on the main board simple and easy to work with. Run that board with it’s own regulators. Get it running with 3.3V signals. Once that is done, build the input channel(s) on their own board(s). They will need their own regulators to keep noise down (regulators are cheap). You can optimize the input channel circuits as part of a separate project.
Bob
On Dec 26, 2014, at 8:21 AM, Li Ang lllaaa@gmail.com wrote:
Hi
Thanks for the suggestion. I will do some experiments with the front
end :)
2014-12-25 4:32 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi
Very interesting !! Thanks for sharing.
As you can see from the Fluke schematics, the input amplifiers on counters
can get quite complex. I would definitely recommend playing a bit with the
input channels on your board. Here’s what I would do, there are many other
approaches:
-
Set up a high speed CMOS biased gate limiter with an OCXO. Quick
approach is two 10K ohm resistors for bias (one to B+ one to ground), AC
couple the sine wave into the junction. Junction also goes to the gate
input.
-
Assume that the signal is good. (it may not be).
-
Compare the CMOS signal on one channel to your input amplifier on the
other channel.
-
Attenuate the signal to the input amplifier and see what happens.
Again, there are lots of different ways to do the same sort of thing. I
would not go overboard doing this with complicated circuits. You simply
want a way to figure out what the input circuits are doing.
Have Fun!
Bob
and follow the instructions there.
Hi
Don’t go to crazy on the front end. You can spend a year optimizing something like this. The objective is to see if the front end is a big problem now. It’s very easy to get to many things going on in a project. That makes it hard to complete.
All front end circuits will work better with worse with a 1 mV input than with a larger input signal. Some very common circuits have odd things (frequency doubling…) that happen as the input drops. Chains with a lot of gain can oscillate with certain combinations of input level and source impedance.
Some decisions you will eventually need to make:
Do you need a high input impedance counter input?
Most commercial counters have a >= 1 mega ohm input impedance capability. This lets you put an oscilloscope probe on the counter. It’s nice for probing around in a circuit. I have rarely used this feature. It’s *much* more convenient to take the output of the oscilloscope and feed it into the counter. That way the probe stays on the scope and you can *see* the signal you are probing as well as count it.
Do you need to deal with low frequency signals?
Things like pulse per second inputs are a TimeNut thing to look at. Most of the world does not try to count 1 Hz. Timing signals tend to be DC coupled. They often have odd duty cycles even if they are not low frequency. A DC coupled input channel implies a range of adjustable trigger levels. This can get very crazy very fast. A simple TTL compatible input that triggers at ~ 1 V and will accept 2 to 5V logic signals is an easy way to go. Is that enough?
------------
Some decisions that commercial counter people get to make:
Do you need to deal with low level RF signals?
Do you need to deal with modulated RF signals?
Do you need to deal with microwave signals?
Do you need adjustable front end filtering to reject RF on your signals?
Do you need to tolerate 250V AC or 1KV DC on the counter input?
————
For now I’d think about the second set of decisions, but not worry about them. Even the two decisions in the first group are not all that important to make right now. They all have many sub decisions associated with them. One example is adding a negative power supply to allow a DC trigger at zero volts.
A very common solution: Build the counter with just logic level inputs. Keep things on the main board simple and easy to work with. Run that board with it’s own regulators. Get it running with 3.3V signals. Once that is done, build the input channel(s) on their own board(s). They will need their own regulators to keep noise down (regulators are cheap). You can optimize the input channel circuits as part of a separate project.
Bob
> On Dec 26, 2014, at 8:21 AM, Li Ang <lllaaa@gmail.com> wrote:
>
> Hi
> Thanks for the suggestion. I will do some experiments with the front
> end :)
>
> 2014-12-25 4:32 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
>
>> Hi
>>
>> Very interesting !! Thanks for sharing.
>>
>> As you can see from the Fluke schematics, the input amplifiers on counters
>> can get quite complex. I would definitely recommend playing a bit with the
>> input channels on your board. Here’s what I would do, there are many other
>> approaches:
>>
>> 1) Set up a high speed CMOS biased gate limiter with an OCXO. Quick
>> approach is two 10K ohm resistors for bias (one to B+ one to ground), AC
>> couple the sine wave into the junction. Junction also goes to the gate
>> input.
>>
>> 2) Assume that the signal is good. (it may not be).
>>
>> 3) Compare the CMOS signal on one channel to your input amplifier on the
>> other channel.
>>
>> 4) Attenuate the signal to the input amplifier and see what happens.
>>
>> Again, there are *lots* of different ways to do the same sort of thing. I
>> would not go overboard doing this with complicated circuits. You simply
>> want a way to figure out what the input circuits are doing.
>>
>> Have Fun!
>>
>> Bob
>>
>>
>>> On Dec 24, 2014, at 11:19 AM, Li Ang <lllaaa@gmail.com> wrote:
>>>
>>> http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current
>> board.
>>> I'm not a hardware guy, feel free to correct my mistakes. :)
>>>
>>>
>>> http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of cnt90
>>> aka pm6690
>>>
>>>
>>> Happy holidays
>>>
>>>
>>> Li Ang
>>> _______________________________________________
>>> time-nuts mailing list -- time-nuts@febo.com
>>> To unsubscribe, go to
>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
>>> and follow the instructions there.
>>
>> _______________________________________________
>> time-nuts mailing list -- time-nuts@febo.com
>> To unsubscribe, go to
>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
>> and follow the instructions there.
>>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
LA
Li Ang
Sat, Dec 27, 2014 12:44 PM
Hi Bob,
You are right. My analog circuit skill is so limited, I need to be
realistic. I will make some modification to the circuit according to the
suggestions from you guys when new board is going to make. I've sent the
MV89A board to the factory and got 2 3db attenuators from minicircuit.
However, I'm still wondering why SRS/Agilent/Fluke dont use high speed
opamp(something like LMH6624). They all choose jfet + opamp to convert the
impedance.
2014-12-26 22:12 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi
Don’t go to crazy on the front end. You can spend a year optimizing
something like this. The objective is to see if the front end is a big
problem now. It’s very easy to get to many things going on in a project.
That makes it hard to complete.
All front end circuits will work better with worse with a 1 mV input than
with a larger input signal. Some very common circuits have odd things
(frequency doubling…) that happen as the input drops. Chains with a lot of
gain can oscillate with certain combinations of input level and source
impedance.
Some decisions you will eventually need to make:
Do you need a high input impedance counter input?
Most commercial counters have a >= 1 mega ohm input impedance capability.
This lets you put an oscilloscope probe on the counter. It’s nice for
probing around in a circuit. I have rarely used this feature. It’s much
more convenient to take the output of the oscilloscope and feed it into the
counter. That way the probe stays on the scope and you can see the signal
you are probing as well as count it.
Do you need to deal with low frequency signals?
Things like pulse per second inputs are a TimeNut thing to look at. Most
of the world does not try to count 1 Hz. Timing signals tend to be DC
coupled. They often have odd duty cycles even if they are not low
frequency. A DC coupled input channel implies a range of adjustable trigger
levels. This can get very crazy very fast. A simple TTL compatible input
that triggers at ~ 1 V and will accept 2 to 5V logic signals is an easy way
to go. Is that enough?
Some decisions that commercial counter people get to make:
Do you need to deal with low level RF signals?
Do you need to deal with modulated RF signals?
Do you need to deal with microwave signals?
Do you need adjustable front end filtering to reject RF on your signals?
Do you need to tolerate 250V AC or 1KV DC on the counter input?
————
For now I’d think about the second set of decisions, but not worry about
them. Even the two decisions in the first group are not all that important
to make right now. They all have many sub decisions associated with them.
One example is adding a negative power supply to allow a DC trigger at zero
volts.
A very common solution: Build the counter with just logic level inputs.
Keep things on the main board simple and easy to work with. Run that board
with it’s own regulators. Get it running with 3.3V signals. Once that is
done, build the input channel(s) on their own board(s). They will need
their own regulators to keep noise down (regulators are cheap). You can
optimize the input channel circuits as part of a separate project.
Bob
On Dec 26, 2014, at 8:21 AM, Li Ang lllaaa@gmail.com wrote:
Hi
Thanks for the suggestion. I will do some experiments with the front
end :)
2014-12-25 4:32 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi
Very interesting !! Thanks for sharing.
As you can see from the Fluke schematics, the input amplifiers on
can get quite complex. I would definitely recommend playing a bit with
input channels on your board. Here’s what I would do, there are many
approaches:
-
Set up a high speed CMOS biased gate limiter with an OCXO. Quick
approach is two 10K ohm resistors for bias (one to B+ one to ground), AC
couple the sine wave into the junction. Junction also goes to the gate
input.
-
Assume that the signal is good. (it may not be).
-
Compare the CMOS signal on one channel to your input amplifier on the
other channel.
-
Attenuate the signal to the input amplifier and see what happens.
Again, there are lots of different ways to do the same sort of thing.
would not go overboard doing this with complicated circuits. You simply
want a way to figure out what the input circuits are doing.
Have Fun!
Bob
aka pm6690
Happy holidays
Li Ang
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
and follow the instructions there.
and follow the instructions there.
Hi Bob,
You are right. My analog circuit skill is so limited, I need to be
realistic. I will make some modification to the circuit according to the
suggestions from you guys when new board is going to make. I've sent the
MV89A board to the factory and got 2 3db attenuators from minicircuit.
However, I'm still wondering why SRS/Agilent/Fluke dont use high speed
opamp(something like LMH6624). They all choose jfet + opamp to convert the
impedance.
2014-12-26 22:12 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
> Hi
>
> Don’t go to crazy on the front end. You can spend a year optimizing
> something like this. The objective is to see if the front end is a big
> problem now. It’s very easy to get to many things going on in a project.
> That makes it hard to complete.
>
> All front end circuits will work better with worse with a 1 mV input than
> with a larger input signal. Some very common circuits have odd things
> (frequency doubling…) that happen as the input drops. Chains with a lot of
> gain can oscillate with certain combinations of input level and source
> impedance.
>
> Some decisions you will eventually need to make:
>
> Do you need a high input impedance counter input?
>
> Most commercial counters have a >= 1 mega ohm input impedance capability.
> This lets you put an oscilloscope probe on the counter. It’s nice for
> probing around in a circuit. I have rarely used this feature. It’s *much*
> more convenient to take the output of the oscilloscope and feed it into the
> counter. That way the probe stays on the scope and you can *see* the signal
> you are probing as well as count it.
>
> Do you need to deal with low frequency signals?
>
> Things like pulse per second inputs are a TimeNut thing to look at. Most
> of the world does not try to count 1 Hz. Timing signals tend to be DC
> coupled. They often have odd duty cycles even if they are not low
> frequency. A DC coupled input channel implies a range of adjustable trigger
> levels. This can get very crazy very fast. A simple TTL compatible input
> that triggers at ~ 1 V and will accept 2 to 5V logic signals is an easy way
> to go. Is that enough?
>
> ------------
>
> Some decisions that commercial counter people get to make:
>
> Do you need to deal with low level RF signals?
>
> Do you need to deal with modulated RF signals?
>
> Do you need to deal with microwave signals?
>
> Do you need adjustable front end filtering to reject RF on your signals?
>
> Do you need to tolerate 250V AC or 1KV DC on the counter input?
>
> ————
>
> For now I’d think about the second set of decisions, but not worry about
> them. Even the two decisions in the first group are not all that important
> to make right now. They all have many sub decisions associated with them.
> One example is adding a negative power supply to allow a DC trigger at zero
> volts.
>
> A very common solution: Build the counter with just logic level inputs.
> Keep things on the main board simple and easy to work with. Run that board
> with it’s own regulators. Get it running with 3.3V signals. Once that is
> done, build the input channel(s) on their own board(s). They will need
> their own regulators to keep noise down (regulators are cheap). You can
> optimize the input channel circuits as part of a separate project.
>
> Bob
>
>
>
>
> > On Dec 26, 2014, at 8:21 AM, Li Ang <lllaaa@gmail.com> wrote:
> >
> > Hi
> > Thanks for the suggestion. I will do some experiments with the front
> > end :)
> >
> > 2014-12-25 4:32 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
> >
> >> Hi
> >>
> >> Very interesting !! Thanks for sharing.
> >>
> >> As you can see from the Fluke schematics, the input amplifiers on
> counters
> >> can get quite complex. I would definitely recommend playing a bit with
> the
> >> input channels on your board. Here’s what I would do, there are many
> other
> >> approaches:
> >>
> >> 1) Set up a high speed CMOS biased gate limiter with an OCXO. Quick
> >> approach is two 10K ohm resistors for bias (one to B+ one to ground), AC
> >> couple the sine wave into the junction. Junction also goes to the gate
> >> input.
> >>
> >> 2) Assume that the signal is good. (it may not be).
> >>
> >> 3) Compare the CMOS signal on one channel to your input amplifier on the
> >> other channel.
> >>
> >> 4) Attenuate the signal to the input amplifier and see what happens.
> >>
> >> Again, there are *lots* of different ways to do the same sort of thing.
> I
> >> would not go overboard doing this with complicated circuits. You simply
> >> want a way to figure out what the input circuits are doing.
> >>
> >> Have Fun!
> >>
> >> Bob
> >>
> >>
> >>> On Dec 24, 2014, at 11:19 AM, Li Ang <lllaaa@gmail.com> wrote:
> >>>
> >>> http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current
> >> board.
> >>> I'm not a hardware guy, feel free to correct my mistakes. :)
> >>>
> >>>
> >>> http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of
> cnt90
> >>> aka pm6690
> >>>
> >>>
> >>> Happy holidays
> >>>
> >>>
> >>> Li Ang
> >>> _______________________________________________
> >>> time-nuts mailing list -- time-nuts@febo.com
> >>> To unsubscribe, go to
> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> >>> and follow the instructions there.
> >>
> >> _______________________________________________
> >> time-nuts mailing list -- time-nuts@febo.com
> >> To unsubscribe, go to
> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> >> and follow the instructions there.
> >>
> > _______________________________________________
> > time-nuts mailing list -- time-nuts@febo.com
> > To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> > and follow the instructions there.
>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
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> and follow the instructions there.
>
LA
Li Ang
Sat, Dec 27, 2014 1:22 PM
Hi Bob,
Here is the data and test scheme.
It does not show much difference.
2014-12-26 22:12 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi
Don’t go to crazy on the front end. You can spend a year optimizing
something like this. The objective is to see if the front end is a big
problem now. It’s very easy to get to many things going on in a project.
That makes it hard to complete.
All front end circuits will work better with worse with a 1 mV input than
with a larger input signal. Some very common circuits have odd things
(frequency doubling…) that happen as the input drops. Chains with a lot of
gain can oscillate with certain combinations of input level and source
impedance.
Some decisions you will eventually need to make:
Do you need a high input impedance counter input?
Most commercial counters have a >= 1 mega ohm input impedance capability.
This lets you put an oscilloscope probe on the counter. It’s nice for
probing around in a circuit. I have rarely used this feature. It’s much
more convenient to take the output of the oscilloscope and feed it into the
counter. That way the probe stays on the scope and you can see the signal
you are probing as well as count it.
Do you need to deal with low frequency signals?
Things like pulse per second inputs are a TimeNut thing to look at. Most
of the world does not try to count 1 Hz. Timing signals tend to be DC
coupled. They often have odd duty cycles even if they are not low
frequency. A DC coupled input channel implies a range of adjustable trigger
levels. This can get very crazy very fast. A simple TTL compatible input
that triggers at ~ 1 V and will accept 2 to 5V logic signals is an easy way
to go. Is that enough?
Some decisions that commercial counter people get to make:
Do you need to deal with low level RF signals?
Do you need to deal with modulated RF signals?
Do you need to deal with microwave signals?
Do you need adjustable front end filtering to reject RF on your signals?
Do you need to tolerate 250V AC or 1KV DC on the counter input?
————
For now I’d think about the second set of decisions, but not worry about
them. Even the two decisions in the first group are not all that important
to make right now. They all have many sub decisions associated with them.
One example is adding a negative power supply to allow a DC trigger at zero
volts.
A very common solution: Build the counter with just logic level inputs.
Keep things on the main board simple and easy to work with. Run that board
with it’s own regulators. Get it running with 3.3V signals. Once that is
done, build the input channel(s) on their own board(s). They will need
their own regulators to keep noise down (regulators are cheap). You can
optimize the input channel circuits as part of a separate project.
Bob
On Dec 26, 2014, at 8:21 AM, Li Ang lllaaa@gmail.com wrote:
Hi
Thanks for the suggestion. I will do some experiments with the front
end :)
2014-12-25 4:32 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi
Very interesting !! Thanks for sharing.
As you can see from the Fluke schematics, the input amplifiers on
can get quite complex. I would definitely recommend playing a bit with
input channels on your board. Here’s what I would do, there are many
approaches:
-
Set up a high speed CMOS biased gate limiter with an OCXO. Quick
approach is two 10K ohm resistors for bias (one to B+ one to ground), AC
couple the sine wave into the junction. Junction also goes to the gate
input.
-
Assume that the signal is good. (it may not be).
-
Compare the CMOS signal on one channel to your input amplifier on the
other channel.
-
Attenuate the signal to the input amplifier and see what happens.
Again, there are lots of different ways to do the same sort of thing.
would not go overboard doing this with complicated circuits. You simply
want a way to figure out what the input circuits are doing.
Have Fun!
Bob
aka pm6690
Happy holidays
Li Ang
time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
and follow the instructions there.
and follow the instructions there.
Hi Bob,
Here is the data and test scheme.
It does not show much difference.
2014-12-26 22:12 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
> Hi
>
> Don’t go to crazy on the front end. You can spend a year optimizing
> something like this. The objective is to see if the front end is a big
> problem now. It’s very easy to get to many things going on in a project.
> That makes it hard to complete.
>
> All front end circuits will work better with worse with a 1 mV input than
> with a larger input signal. Some very common circuits have odd things
> (frequency doubling…) that happen as the input drops. Chains with a lot of
> gain can oscillate with certain combinations of input level and source
> impedance.
>
> Some decisions you will eventually need to make:
>
> Do you need a high input impedance counter input?
>
> Most commercial counters have a >= 1 mega ohm input impedance capability.
> This lets you put an oscilloscope probe on the counter. It’s nice for
> probing around in a circuit. I have rarely used this feature. It’s *much*
> more convenient to take the output of the oscilloscope and feed it into the
> counter. That way the probe stays on the scope and you can *see* the signal
> you are probing as well as count it.
>
> Do you need to deal with low frequency signals?
>
> Things like pulse per second inputs are a TimeNut thing to look at. Most
> of the world does not try to count 1 Hz. Timing signals tend to be DC
> coupled. They often have odd duty cycles even if they are not low
> frequency. A DC coupled input channel implies a range of adjustable trigger
> levels. This can get very crazy very fast. A simple TTL compatible input
> that triggers at ~ 1 V and will accept 2 to 5V logic signals is an easy way
> to go. Is that enough?
>
> ------------
>
> Some decisions that commercial counter people get to make:
>
> Do you need to deal with low level RF signals?
>
> Do you need to deal with modulated RF signals?
>
> Do you need to deal with microwave signals?
>
> Do you need adjustable front end filtering to reject RF on your signals?
>
> Do you need to tolerate 250V AC or 1KV DC on the counter input?
>
> ————
>
> For now I’d think about the second set of decisions, but not worry about
> them. Even the two decisions in the first group are not all that important
> to make right now. They all have many sub decisions associated with them.
> One example is adding a negative power supply to allow a DC trigger at zero
> volts.
>
> A very common solution: Build the counter with just logic level inputs.
> Keep things on the main board simple and easy to work with. Run that board
> with it’s own regulators. Get it running with 3.3V signals. Once that is
> done, build the input channel(s) on their own board(s). They will need
> their own regulators to keep noise down (regulators are cheap). You can
> optimize the input channel circuits as part of a separate project.
>
> Bob
>
>
>
>
> > On Dec 26, 2014, at 8:21 AM, Li Ang <lllaaa@gmail.com> wrote:
> >
> > Hi
> > Thanks for the suggestion. I will do some experiments with the front
> > end :)
> >
> > 2014-12-25 4:32 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
> >
> >> Hi
> >>
> >> Very interesting !! Thanks for sharing.
> >>
> >> As you can see from the Fluke schematics, the input amplifiers on
> counters
> >> can get quite complex. I would definitely recommend playing a bit with
> the
> >> input channels on your board. Here’s what I would do, there are many
> other
> >> approaches:
> >>
> >> 1) Set up a high speed CMOS biased gate limiter with an OCXO. Quick
> >> approach is two 10K ohm resistors for bias (one to B+ one to ground), AC
> >> couple the sine wave into the junction. Junction also goes to the gate
> >> input.
> >>
> >> 2) Assume that the signal is good. (it may not be).
> >>
> >> 3) Compare the CMOS signal on one channel to your input amplifier on the
> >> other channel.
> >>
> >> 4) Attenuate the signal to the input amplifier and see what happens.
> >>
> >> Again, there are *lots* of different ways to do the same sort of thing.
> I
> >> would not go overboard doing this with complicated circuits. You simply
> >> want a way to figure out what the input circuits are doing.
> >>
> >> Have Fun!
> >>
> >> Bob
> >>
> >>
> >>> On Dec 24, 2014, at 11:19 AM, Li Ang <lllaaa@gmail.com> wrote:
> >>>
> >>> http://www.qsl.net/bi7lnq/freqcnt_bi7lnq_v4.pdf this is my current
> >> board.
> >>> I'm not a hardware guy, feel free to correct my mistakes. :)
> >>>
> >>>
> >>> http://assets.fluke.com/manuals/6690____smeng0000.pdf schematic of
> cnt90
> >>> aka pm6690
> >>>
> >>>
> >>> Happy holidays
> >>>
> >>>
> >>> Li Ang
> >>> _______________________________________________
> >>> time-nuts mailing list -- time-nuts@febo.com
> >>> To unsubscribe, go to
> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> >>> and follow the instructions there.
> >>
> >> _______________________________________________
> >> time-nuts mailing list -- time-nuts@febo.com
> >> To unsubscribe, go to
> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> >> and follow the instructions there.
> >>
> > _______________________________________________
> > time-nuts mailing list -- time-nuts@febo.com
> > To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> > and follow the instructions there.
>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>
BC
Bob Camp
Sat, Dec 27, 2014 2:58 PM
Hi
(In reply to several posts. It’s easier for me this way)
Ok, that’s good news !!! (and useful data)
Your counter performance degraded a bit when you put in 5 db and not much when you put in 8 db.
It’s also maybe too good news. I suspect that cross talk between the channels may be impacting your results.
Next step is to try it with two independent sources and a bit more attenuation. When you try it with two sources, you need to attenuate first one source and then switch the attenuators to the other source. That will help you see if crosstalk from one channel is more of a problem than from the other channel.
One parts hint:
Cable TV attenuators are much cheaper than their fancy 50 ohm MIniCircuits cousins. They are also something you can pick up down at the corner electronics store. For this sort of testing they are perfectly fine to use. At this point in the testing the mismatch between 75 ohms and 50 ohms is not a big deal. You will need to adapt connectors, but you probably still will save money.
=======
Op-amps that have enough bandwidth and performance for a high input impedance counter input are rare items. They also are not cheap. Often they come as some sort of current feedback part with low(er) input impedance. If you want your counter to work to 300 MHz, it should accept a 300 MHz square wave. That might mean passing the third or even the fifth harmonic of the square wave. An input channel with 900 or 1500 MHz bandwidth is quite a challenge.
One very simple solution is to just grab a high speed comparator like the one used by Fluke / Pendulum (ADCMP565). Drive it directly with your input or clock. Make it your front end device. That’s not an ideal solution, but it will give you the bandwidth and a reasonable input impedance. It requires messy things like a negative supply or a “fake” ground (so would the op amp). It also has an ECL output that needs to be converted to match your FPGA ( hint: use the clock inputs, they are LVPECL compatible). Driving into the FPGA with a differential signal is probably needed to reduce crosstalk.
No matter how you do it, input channels are not an easy thing to do properly. Even on commercial counters, they often are easy to fool. Designing one is only the start. Fully testing it is equally complex.
=========
Do not underrate your skills in any way. You are doing far more on this project than any of the rest of the list members have done. We have talked and talked forever about these chips. We talk a lot about these ideas. We suggest lots of complex solutions to various possible problems (like the expensive comparator I suggested above). What we almost never do is actually build a counter. If we build something we don’t fully test it. I have never seen any list member share their results the way you have. I suspect that most of us (yes this includes me) are a bit to scared of the response.
Please do not stop your work. Keep letting us know how it is going. This is very exciting !!!
Bob
On Dec 27, 2014, at 8:22 AM, Li Ang lllaaa@gmail.com wrote:
Hi Bob,
Here is the data and test scheme.
It does not show much difference.
2014-12-26 22:12 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi
(In reply to several posts. It’s easier for me this way)
Ok, that’s good news !!! (and useful data)
Your counter performance degraded a bit when you put in 5 db and not much when you put in 8 db.
It’s also maybe *too* good news. I suspect that cross talk between the channels may be impacting your results.
Next step is to try it with two independent sources and a bit more attenuation. When you try it with two sources, you need to attenuate first one source and then switch the attenuators to the other source. That will help you see if crosstalk from one channel is more of a problem than from the other channel.
One parts hint:
Cable TV attenuators are much cheaper than their fancy 50 ohm MIniCircuits cousins. They are also something you can pick up down at the corner electronics store. For this sort of testing they are perfectly fine to use. At this point in the testing the mismatch between 75 ohms and 50 ohms is not a big deal. You will need to adapt connectors, but you probably still will save money.
=======
Op-amps that have enough bandwidth and performance for a high input impedance counter input are rare items. They also are not cheap. Often they come as some sort of current feedback part with low(er) input impedance. If you want your counter to work to 300 MHz, it should accept a 300 MHz square wave. That might mean passing the third or even the fifth harmonic of the square wave. An input channel with 900 or 1500 MHz bandwidth is quite a challenge.
One very simple solution is to just grab a high speed comparator like the one used by Fluke / Pendulum (ADCMP565). Drive it directly with your input or clock. Make it your front end device. That’s not an ideal solution, but it will give you the bandwidth and a reasonable input impedance. It requires messy things like a negative supply or a “fake” ground (so would the op amp). It also has an ECL output that needs to be converted to match your FPGA ( hint: use the clock inputs, they are LVPECL compatible). Driving into the FPGA with a differential signal is probably needed to reduce crosstalk.
No matter how you do it, input channels are *not* an easy thing to do properly. Even on commercial counters, they often are easy to fool. Designing one is only the start. Fully testing it is equally complex.
=========
Do not underrate your skills in any way. You are doing far more on this project than any of the rest of the list members have done. We have talked and talked forever about these chips. We talk a lot about these ideas. We suggest lots of complex solutions to various possible problems (like the expensive comparator I suggested above). What we almost never do is actually build a counter. If we build something we don’t fully test it. I have never seen any list member share their results the way you have. I suspect that most of us (yes this includes me) are a bit to scared of the response.
Please do not stop your work. Keep letting us know how it is going. This is very exciting !!!
Bob
> On Dec 27, 2014, at 8:22 AM, Li Ang <lllaaa@gmail.com> wrote:
>
> Hi Bob,
> Here is the data and test scheme.
> It does not show much difference.
>
> 2014-12-26 22:12 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
>
LA
Li Ang
Sun, Dec 28, 2014 2:19 PM
Hi Bob,
I did some test according to your suggestions. DUT is a symmetricom x72
rb oscillator. Also, I've tried signal generator as the DUT. R&S SMY01 is
not as good as HP8662A but that the best I've got. The signal geneator is
also using FE5650 as ref clock.
According to my test with the TDC today, this unit is not producing very
stable data.
I don't have accurate pulse generator, so this is how I test the TDC:
0) power the board with battery.
-
use FPGA to generate time pulse:
reg [15:0] shift;
always @(posedge refclk10M) begin
shift <= {shift[14:0], sw_gate};
end
assign tdc_start = shift[3];
assign tdc_stop1 = shift[5];
-
use MCU to pull down sw_gate, the FPGA sync it to refclk10M domain and
generate input signal for TDC.
-
use TDC to test the time betwen tdc_start and tdc_stop1
The result is in tdc_test.zip. number * 100ns = time between tdc_start and
tdc_stop1. (TDC highspeed clock is refclk10M/2).
There 2 issues from the test:
- As we can see from the data, the number is around 1.98x not 2.00x. So
there is about 2ns delay between tdc_start and tdc_stop1 for this simple
test code. If it is from the PCB trace and something inside FPGA, this part
should be a constant value at certain temperature. I can calculate it by
measuring 2 cycles and 3 cylces. My current code has not implement this
part, it should provide some improvement. 2ns time error for 1s gate, that
is something.
- For a 90ps TDC, I think the result should be something like +-0.001
cycle. But I get something like +-0.003 cycle. I do not know the reason for
now.
2014-12-27 22:58 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi
(In reply to several posts. It’s easier for me this way)
Ok, that’s good news !!! (and useful data)
Your counter performance degraded a bit when you put in 5 db and not much
when you put in 8 db.
It’s also maybe too good news. I suspect that cross talk between the
channels may be impacting your results.
Next step is to try it with two independent sources and a bit more
attenuation. When you try it with two sources, you need to attenuate first
one source and then switch the attenuators to the other source. That will
help you see if crosstalk from one channel is more of a problem than from
the other channel.
One parts hint:
Cable TV attenuators are much cheaper than their fancy 50 ohm MIniCircuits
cousins. They are also something you can pick up down at the corner
electronics store. For this sort of testing they are perfectly fine to use.
At this point in the testing the mismatch between 75 ohms and 50 ohms is
not a big deal. You will need to adapt connectors, but you probably still
will save money.
=======
Op-amps that have enough bandwidth and performance for a high input
impedance counter input are rare items. They also are not cheap. Often they
come as some sort of current feedback part with low(er) input impedance. If
you want your counter to work to 300 MHz, it should accept a 300 MHz square
wave. That might mean passing the third or even the fifth harmonic of the
square wave. An input channel with 900 or 1500 MHz bandwidth is quite a
challenge.
One very simple solution is to just grab a high speed comparator like the
one used by Fluke / Pendulum (ADCMP565). Drive it directly with your input
or clock. Make it your front end device. That’s not an ideal solution, but
it will give you the bandwidth and a reasonable input impedance. It
requires messy things like a negative supply or a “fake” ground (so would
the op amp). It also has an ECL output that needs to be converted to match
your FPGA ( hint: use the clock inputs, they are LVPECL compatible).
Driving into the FPGA with a differential signal is probably needed to
reduce crosstalk.
No matter how you do it, input channels are not an easy thing to do
properly. Even on commercial counters, they often are easy to fool.
Designing one is only the start. Fully testing it is equally complex.
=========
Do not underrate your skills in any way. You are doing far more on this
project than any of the rest of the list members have done. We have talked
and talked forever about these chips. We talk a lot about these ideas. We
suggest lots of complex solutions to various possible problems (like the
expensive comparator I suggested above). What we almost never do is
actually build a counter. If we build something we don’t fully test it. I
have never seen any list member share their results the way you have. I
suspect that most of us (yes this includes me) are a bit to scared of the
response.
Please do not stop your work. Keep letting us know how it is going. This
is very exciting !!!
Bob
On Dec 27, 2014, at 8:22 AM, Li Ang lllaaa@gmail.com wrote:
Hi Bob,
Here is the data and test scheme.
It does not show much difference.
2014-12-26 22:12 GMT+08:00 Bob Camp kb8tq@n1k.org:
Hi Bob,
I did some test according to your suggestions. DUT is a symmetricom x72
rb oscillator. Also, I've tried signal generator as the DUT. R&S SMY01 is
not as good as HP8662A but that the best I've got. The signal geneator is
also using FE5650 as ref clock.
According to my test with the TDC today, this unit is not producing very
stable data.
I don't have accurate pulse generator, so this is how I test the TDC:
0) power the board with battery.
1) use FPGA to generate time pulse:
reg [15:0] shift;
always @(posedge refclk10M) begin
shift <= {shift[14:0], sw_gate};
end
assign tdc_start = shift[3];
assign tdc_stop1 = shift[5];
2) use MCU to pull down sw_gate, the FPGA sync it to refclk10M domain and
generate input signal for TDC.
3) use TDC to test the time betwen tdc_start and tdc_stop1
The result is in tdc_test.zip. number * 100ns = time between tdc_start and
tdc_stop1. (TDC highspeed clock is refclk10M/2).
There 2 issues from the test:
1) As we can see from the data, the number is around 1.98x not 2.00x. So
there is about 2ns delay between tdc_start and tdc_stop1 for this simple
test code. If it is from the PCB trace and something inside FPGA, this part
should be a constant value at certain temperature. I can calculate it by
measuring 2 cycles and 3 cylces. My current code has not implement this
part, it should provide some improvement. 2ns time error for 1s gate, that
is something.
2) For a 90ps TDC, I think the result should be something like +-0.001
cycle. But I get something like +-0.003 cycle. I do not know the reason for
now.
2014-12-27 22:58 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
> Hi
>
> (In reply to several posts. It’s easier for me this way)
>
> Ok, that’s good news !!! (and useful data)
>
> Your counter performance degraded a bit when you put in 5 db and not much
> when you put in 8 db.
>
> It’s also maybe *too* good news. I suspect that cross talk between the
> channels may be impacting your results.
>
> Next step is to try it with two independent sources and a bit more
> attenuation. When you try it with two sources, you need to attenuate first
> one source and then switch the attenuators to the other source. That will
> help you see if crosstalk from one channel is more of a problem than from
> the other channel.
>
> One parts hint:
>
> Cable TV attenuators are much cheaper than their fancy 50 ohm MIniCircuits
> cousins. They are also something you can pick up down at the corner
> electronics store. For this sort of testing they are perfectly fine to use.
> At this point in the testing the mismatch between 75 ohms and 50 ohms is
> not a big deal. You will need to adapt connectors, but you probably still
> will save money.
>
> =======
>
> Op-amps that have enough bandwidth and performance for a high input
> impedance counter input are rare items. They also are not cheap. Often they
> come as some sort of current feedback part with low(er) input impedance. If
> you want your counter to work to 300 MHz, it should accept a 300 MHz square
> wave. That might mean passing the third or even the fifth harmonic of the
> square wave. An input channel with 900 or 1500 MHz bandwidth is quite a
> challenge.
>
> One very simple solution is to just grab a high speed comparator like the
> one used by Fluke / Pendulum (ADCMP565). Drive it directly with your input
> or clock. Make it your front end device. That’s not an ideal solution, but
> it will give you the bandwidth and a reasonable input impedance. It
> requires messy things like a negative supply or a “fake” ground (so would
> the op amp). It also has an ECL output that needs to be converted to match
> your FPGA ( hint: use the clock inputs, they are LVPECL compatible).
> Driving into the FPGA with a differential signal is probably needed to
> reduce crosstalk.
>
> No matter how you do it, input channels are *not* an easy thing to do
> properly. Even on commercial counters, they often are easy to fool.
> Designing one is only the start. Fully testing it is equally complex.
>
> =========
>
> Do not underrate your skills in any way. You are doing far more on this
> project than any of the rest of the list members have done. We have talked
> and talked forever about these chips. We talk a lot about these ideas. We
> suggest lots of complex solutions to various possible problems (like the
> expensive comparator I suggested above). What we almost never do is
> actually build a counter. If we build something we don’t fully test it. I
> have never seen any list member share their results the way you have. I
> suspect that most of us (yes this includes me) are a bit to scared of the
> response.
>
> Please do not stop your work. Keep letting us know how it is going. This
> is very exciting !!!
>
> Bob
>
> > On Dec 27, 2014, at 8:22 AM, Li Ang <lllaaa@gmail.com> wrote:
> >
> > Hi Bob,
> > Here is the data and test scheme.
> > It does not show much difference.
> >
> > 2014-12-26 22:12 GMT+08:00 Bob Camp <kb8tq@n1k.org>:
> >
>
> _______________________________________________
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>