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Re: [time-nuts] OCXO and fluctuations after EFC adjustment

HM
Hal Murray
Sat, Apr 11, 2020 8:22 PM

At this time, I will give my usual speech about IMHO the fact that since the
invention of the DDS on a chip, EFC should no longer be used  for high
performance oscillators.

That caught my attention.  Could you please say more.

A DDS introduces spurs.  They move around as you change the adjustment
parameters.

Are the spurs small enough that they are not a problem with most applications?
What applications do/don't get along with spurs?

What do spurs look like on an ADEV plot?

I think of a "DDS on a chip" as having a VCO/PLL up to some fairly high
frequency and some digital logic that brings that down to the target
frequency.  The high frequency means that the time step from N to N+1 cycles
is smaller.  But VCOs are noisy relative to a good crystal.  So in addition to
spurs, I'd expect more phase noise.

Am I on the right track?  What should I have asked?

--
These are my opinions.  I hate spam.

richard@karlquist.com said: > At this time, I will give my usual speech about IMHO the fact that since the > invention of the DDS on a chip, EFC should no longer be used for high > performance oscillators. That caught my attention. Could you please say more. A DDS introduces spurs. They move around as you change the adjustment parameters. Are the spurs small enough that they are not a problem with most applications? What applications do/don't get along with spurs? What do spurs look like on an ADEV plot? I think of a "DDS on a chip" as having a VCO/PLL up to some fairly high frequency and some digital logic that brings that down to the target frequency. The high frequency means that the time step from N to N+1 cycles is smaller. But VCOs are noisy relative to a good crystal. So in addition to spurs, I'd expect more phase noise. Am I on the right track? What should I have asked? -- These are my opinions. I hate spam.
BK
Bob kb8tq
Sat, Apr 11, 2020 8:44 PM

Hi

Spurs on an ADEV plot look like ripples in the curve. If you have a part
with good close in phase noise / good short tau ADEV, you probably
can see effects from spurs that  120 db down in the vicinity of 10 Hz.

Bob

On Apr 11, 2020, at 4:22 PM, Hal Murray hmurray@megapathdsl.net wrote:

richard@karlquist.com said:

At this time, I will give my usual speech about IMHO the fact that since the
invention of the DDS on a chip, EFC should no longer be used  for high
performance oscillators.

That caught my attention.  Could you please say more.

A DDS introduces spurs.  They move around as you change the adjustment
parameters.

Are the spurs small enough that they are not a problem with most applications?
What applications do/don't get along with spurs?

What do spurs look like on an ADEV plot?

I think of a "DDS on a chip" as having a VCO/PLL up to some fairly high
frequency and some digital logic that brings that down to the target
frequency.  The high frequency means that the time step from N to N+1 cycles
is smaller.  But VCOs are noisy relative to a good crystal.  So in addition to
spurs, I'd expect more phase noise.

Am I on the right track?  What should I have asked?

--
These are my opinions.  I hate spam.


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Hi Spurs on an ADEV plot look like ripples in the curve. If you have a part with good close in phase noise / good short tau ADEV, you probably can see effects from spurs that 120 db down in the vicinity of 10 Hz. Bob > On Apr 11, 2020, at 4:22 PM, Hal Murray <hmurray@megapathdsl.net> wrote: > > > richard@karlquist.com said: >> At this time, I will give my usual speech about IMHO the fact that since the >> invention of the DDS on a chip, EFC should no longer be used for high >> performance oscillators. > > That caught my attention. Could you please say more. > > A DDS introduces spurs. They move around as you change the adjustment > parameters. > > Are the spurs small enough that they are not a problem with most applications? > What applications do/don't get along with spurs? > > What do spurs look like on an ADEV plot? > > I think of a "DDS on a chip" as having a VCO/PLL up to some fairly high > frequency and some digital logic that brings that down to the target > frequency. The high frequency means that the time step from N to N+1 cycles > is smaller. But VCOs are noisy relative to a good crystal. So in addition to > spurs, I'd expect more phase noise. > > Am I on the right track? What should I have asked? > > > -- > These are my opinions. I hate spam. > > > > > _______________________________________________ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com > and follow the instructions there.
R(
Richard (Rick) Karlquist
Sat, Apr 11, 2020 9:01 PM

That caught my attention.  Could you please say more.

A DDS introduces spurs.  They move around as you change the adjustment
parameters.

Are the spurs small enough that they are not a problem with most applications?
What applications do/don't get along with spurs?

What do spurs look like on an ADEV plot?

I think of a "DDS on a chip" as having a VCO/PLL up to some fairly high
frequency and some digital logic that brings that down to the target
frequency.  The high frequency means that the time step from N to N+1 cycles
is smaller.  But VCOs are noisy relative to a good crystal.  So in addition to
spurs, I'd expect more phase noise.

Am I on the right track?  What should I have asked?

The last part of your post is way off track.  The first "D" in DDS
stands for direct.  PLL's are INdirect.  An architecture I
frequently see and do not recommend is to try to "clean up" a
DDS by using it to phase lock a VCXO.  As you say, the VCXO, etc
adds noise.  And it doesn't clean up close in spurs within
the loop bandwidth.

I presented a paper at FCS in 1995 or 1996 about combining
a DDS with a "direct synthesizer" derived from the famous
HP5100 architecture.  This multi stage system reduces DDS spurs
by 20 dB or so per stage.

The 5071A has a DDS designed from scratch by the brilliant
physicist Robin Giffard that produced a very clean spectrum.
He went beyond the commercial DDS's.

Keysight sells a very high end Arbitrary Waveform Generator
that is essentially a DDS that goes up to 5 or 10 GHz.  It
is all on one custom chip.  When I retired, they were still
planning to add an 8 GHz whispering gallery oscillator as
a time base.  BTW, that oscillator did have EFC so it could
be locked to a 10 MHz reference.  However, the way it worked
was that they changed the temperature of the resonator oven.
So it doesn't break my "rule".

Rick

> That caught my attention. Could you please say more. > > A DDS introduces spurs. They move around as you change the adjustment > parameters. > > Are the spurs small enough that they are not a problem with most applications? > What applications do/don't get along with spurs? > > What do spurs look like on an ADEV plot? > > I think of a "DDS on a chip" as having a VCO/PLL up to some fairly high > frequency and some digital logic that brings that down to the target > frequency. The high frequency means that the time step from N to N+1 cycles > is smaller. But VCOs are noisy relative to a good crystal. So in addition to > spurs, I'd expect more phase noise. > > Am I on the right track? What should I have asked? The last part of your post is way off track. The first "D" in DDS stands for direct. PLL's are INdirect. An architecture I frequently see and do not recommend is to try to "clean up" a DDS by using it to phase lock a VCXO. As you say, the VCXO, etc adds noise. And it doesn't clean up close in spurs within the loop bandwidth. I presented a paper at FCS in 1995 or 1996 about combining a DDS with a "direct synthesizer" derived from the famous HP5100 architecture. This multi stage system reduces DDS spurs by 20 dB or so per stage. The 5071A has a DDS designed from scratch by the brilliant physicist Robin Giffard that produced a very clean spectrum. He went beyond the commercial DDS's. Keysight sells a very high end Arbitrary Waveform Generator that is essentially a DDS that goes up to 5 or 10 GHz. It is all on one custom chip. When I retired, they were still planning to add an 8 GHz whispering gallery oscillator as a time base. BTW, that oscillator did have EFC so it could be locked to a 10 MHz reference. However, the way it worked was that they changed the temperature of the resonator oven. So it doesn't break my "rule". Rick