Hi, I am interested in implementing a relatively simple repeater application on the X310 and E310. I ran the Ettus rfnoc_radio_loopback example and this is nearly a perfect fit for the functionality I want. However, I am wondering how my application can intelligently set the Rx Gain & Tx Gain. Actually, the Tx gain is easy: I can leave it fixed or I can change it inversely with the Rx gain to maintain constant loop gain. But, the Rx Gain I would like to set based on input signal power. I'm not thinking of a fast AGC or even logic residing on the FPGA at all. I'm thinking more along the lines of the host PC occasionally querying an "rssi" or other digital power estimate and then changing the Rx gain in response. I don't care about actual power levels - I just want to maximize the digital dynamic range. I know that I can implement a custom RFNoC block that simply passes samples through while computing this estimate such that it can be queried with a register read. But, before doing so, I'm wondering if something already exists such that I wouldn't have to do so. Rob

Dear Community, I am facing an issue with UHD 3.15.0 and USRP N310 since, sometimes, the application (OAI gNB) does not start and returns this error: [ERROR] [UHD] Exception caught in safe-call. in ctrl_iface_impl<_endianness>::~ctrl_iface_impl() [with uhd::endianness_t _endianness = uhd::ENDIANNESS_BIG] at /home/smarty/repo/uhd/host/lib/rfnoc/ctrl_iface.cpp:50 this->send_cmd_pkt(0, 0, true); -> EnvironmentError: IOError: Block ctrl (CE_00_Port_30) no response packet - AssertionError: bool(buff) in uint64_t ctrl_iface_impl<_endianness>::wait_for_ack(bool, double) [with uhd::endianness_t _endianness = uhd::ENDIANNESS_BIG; uint64_t = long unsigned int] at /home/smarty/repo/uhd/host/lib/rfnoc/ctrl_iface.cpp:151 [ERROR] [MPMD] Failure during block enumeration: EnvironmentError: IOError: Block ctrl (CE_00_Port_30) no response packet - AssertionError: bool(buff) in uint64_t ctrl_iface_impl<_endianness>::wait_for_ack(bool, double) [with uhd::endianness_t _endianness = uhd::ENDIANNESS_BIG; uint64_t = long unsigned int] at /home/smarty/repo/uhd/host/lib/rfnoc/ctrl_iface.cpp:151 terminate called after throwing an instance of 'uhd::runtime_error'   what():  RuntimeError: Failed to run enumerate_rfnoc_blocks() I have noticed this error after I started the development with MIMO. Rebooting the USRP resolves the issue but I would like to run the application without rebooting the USRP every time. Could you please provide me more info about this behavior? Thank you. Best Regards, Federico Civerchia

Hey Rob: If you use GNURadio, The probe signal block can take in a stream and the function probe block can poll The level on a time interval that you set in the block. Then you can use that changing variable elsewhere in the flowgraph to adjust the gain. <end transmission> > On Sep 1, 2022, at 10:46, Rob Kossler <rkossler@nd.edu> wrote: > >  > Hi, > I am interested in implementing a relatively simple repeater application on the X310 and E310. I ran the Ettus rfnoc_radio_loopback example and this is nearly a perfect fit for the functionality I want. However, I am wondering how my application can intelligently set the Rx Gain & Tx Gain. Actually, the Tx gain is easy: I can leave it fixed or I can change it inversely with the Rx gain to maintain constant loop gain. But, the Rx Gain I would like to set based on input signal power. > > I'm not thinking of a fast AGC or even logic residing on the FPGA at all. I'm thinking more along the lines of the host PC occasionally querying an "rssi" or other digital power estimate and then changing the Rx gain in response. I don't care about actual power levels - I just want to maximize the digital dynamic range. > > I know that I can implement a custom RFNoC block that simply passes samples through while computing this estimate such that it can be queried with a register read. But, before doing so, I'm wondering if something already exists such that I wouldn't have to do so. > Rob > _______________________________________________ > USRP-users mailing list -- usrp-users@lists.ettus.com > To unsubscribe send an email to usrp-users-leave@lists.ettus.com

Thanks Paul, After re-reading my original email, it was a bit misleading. The streaming samples are never coming to the host - they are just looped from Rx to Tx on the FPGA. Thus, I can't determine the digital power on the host. I'm guessing that the probe signal block you mentioned operates on the host rather than the FPGA. I'm looking for some simple power detector that may be part of the RFNoC radio block or DDC block that I could query occasionally from the host to determine the digital signal power level. Rob On Thu, Sep 1, 2022 at 1:39 PM Paul Atreides <maud.dib1984@gmail.com> wrote: > Hey Rob: > If you use GNURadio, The probe signal block can take in a stream and the > function probe block can poll The level on a time interval that you set in > the block. Then you can use that changing variable elsewhere in the > flowgraph to adjust the gain. > > <end transmission> > > > On Sep 1, 2022, at 10:46, Rob Kossler <rkossler@nd.edu> wrote: > > > >  > > Hi, > > I am interested in implementing a relatively simple repeater application > on the X310 and E310. I ran the Ettus rfnoc_radio_loopback example and this > is nearly a perfect fit for the functionality I want. However, I am > wondering how my application can intelligently set the Rx Gain & Tx Gain. > Actually, the Tx gain is easy: I can leave it fixed or I can change it > inversely with the Rx gain to maintain constant loop gain. But, the Rx > Gain I would like to set based on input signal power. > > > > I'm not thinking of a fast AGC or even logic residing on the FPGA at > all. I'm thinking more along the lines of the host PC occasionally querying > an "rssi" or other digital power estimate and then changing the Rx gain in > response. I don't care about actual power levels - I just want to maximize > the digital dynamic range. > > > > I know that I can implement a custom RFNoC block that simply passes > samples through while computing this estimate such that it can be queried > with a register read. But, before doing so, I'm wondering if something > already exists such that I wouldn't have to do so. > > Rob > > _______________________________________________ > > USRP-users mailing list -- usrp-users@lists.ettus.com > > To unsubscribe send an email to usrp-users-leave@lists.ettus.com >

Oh ok, yes. I was a bit confused when I read it, but Now I understand. Yes you would have to have sample streaming to the host. I believe the FFT block has a magnitude output that you could query. It’s been a while since I looked at the code, but it was talked about at GRcon last year as a good candidate for a simple energy detector, obviously you said you wouldn’t need to detect anything so the magnitude of a signal bin vs noise bin could help find dynamic range. I’m assuming you have a known signal frequency and a known frequency which is unoccupied (noise only). <end transmission> > On Sep 1, 2022, at 15:26, Rob Kossler <rkossler@nd.edu> wrote: > >  > Thanks Paul, > After re-reading my original email, it was a bit misleading. The streaming samples are never coming to the host - they are just looped from Rx to Tx on the FPGA. Thus, I can't determine the digital power on the host. I'm guessing that the probe signal block you mentioned operates on the host rather than the FPGA. I'm looking for some simple power detector that may be part of the RFNoC radio block or DDC block that I could query occasionally from the host to determine the digital signal power level. > Rob > >> On Thu, Sep 1, 2022 at 1:39 PM Paul Atreides <maud.dib1984@gmail.com> wrote: >> Hey Rob: >> If you use GNURadio, The probe signal block can take in a stream and the function probe block can poll The level on a time interval that you set in the block. Then you can use that changing variable elsewhere in the flowgraph to adjust the gain. >> >> <end transmission> >> >> > On Sep 1, 2022, at 10:46, Rob Kossler <rkossler@nd.edu> wrote: >> > >> >  >> > Hi, >> > I am interested in implementing a relatively simple repeater application on the X310 and E310. I ran the Ettus rfnoc_radio_loopback example and this is nearly a perfect fit for the functionality I want. However, I am wondering how my application can intelligently set the Rx Gain & Tx Gain. Actually, the Tx gain is easy: I can leave it fixed or I can change it inversely with the Rx gain to maintain constant loop gain. But, the Rx Gain I would like to set based on input signal power. >> > >> > I'm not thinking of a fast AGC or even logic residing on the FPGA at all. I'm thinking more along the lines of the host PC occasionally querying an "rssi" or other digital power estimate and then changing the Rx gain in response. I don't care about actual power levels - I just want to maximize the digital dynamic range. >> > >> > I know that I can implement a custom RFNoC block that simply passes samples through while computing this estimate such that it can be queried with a register read. But, before doing so, I'm wondering if something already exists such that I wouldn't have to do so. >> > Rob >> > _______________________________________________ >> > USRP-users mailing list -- usrp-users@lists.ettus.com >> > To unsubscribe send an email to usrp-users-leave@lists.ettus.com