diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index db5de52..3241220 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -80,6 +80,7 @@ const double ad9361_device_t::AD9361_MAX_GAIN = 89.75; const double ad9361_device_t::AD9361_MAX_CLOCK_RATE = 61.44e6; // Max bandwdith is due to filter rolloff in analog filter stage const double ad9361_device_t::AD9361_RECOMMENDED_MAX_BANDWIDTH = 56e6; +const double ad9361_device_t::AD9361_CAL_VALID_WINDOW = 100e6; /* Program either the RX or TX FIR filter. * @@ -228,14 +229,10 @@ void ad9361_device_t::_calibrate_lock_bbpll() _io_iface->poke8(0x04d, 0x05); /* Wait for BBPLL lock. */ - size_t count = 0; + boost::system_time t = boost::get_system_time(); while (!(_io_iface->peek8(0x05e) & 0x80)) { - if (count > 1000) { + if (boost::get_system_time() - t > boost::posix_time::milliseconds(2000)) throw uhd::runtime_error("[ad9361_device_t] BBPLL not locked"); - break; - } - count++; - boost::this_thread::sleep(boost::posix_time::milliseconds(2)); } } @@ -252,28 +249,20 @@ void ad9361_device_t::_calibrate_synth_charge_pumps() } /* Calibrate the RX synthesizer charge pump. */ - size_t count = 0; _io_iface->poke8(0x23d, 0x04); + boost::system_time t = boost::get_system_time(); while (!(_io_iface->peek8(0x244) & 0x80)) { - if (count > 5) { + if (boost::get_system_time() - t > boost::posix_time::milliseconds(5)) throw uhd::runtime_error("[ad9361_device_t] RX charge pump cal failure"); - break; - } - count++; - boost::this_thread::sleep(boost::posix_time::milliseconds(1)); } _io_iface->poke8(0x23d, 0x00); /* Calibrate the TX synthesizer charge pump. */ - count = 0; _io_iface->poke8(0x27d, 0x04); + t = boost::get_system_time(); while (!(_io_iface->peek8(0x284) & 0x80)) { - if (count > 5) { + if (boost::get_system_time() - t > boost::posix_time::milliseconds(5)) throw uhd::runtime_error("[ad9361_device_t] TX charge pump cal failure"); - break; - } - count++; - boost::this_thread::sleep(boost::posix_time::milliseconds(1)); } _io_iface->poke8(0x27d, 0x00); } @@ -318,15 +307,11 @@ double ad9361_device_t::_calibrate_baseband_rx_analog_filter() _io_iface->poke8(0x1e3, 0x02); /* Run the calibration! */ - size_t count = 0; _io_iface->poke8(0x016, 0x80); + boost::system_time t = boost::get_system_time(); while (_io_iface->peek8(0x016) & 0x80) { - if (count > 100) { + if (boost::get_system_time() - t > boost::posix_time::milliseconds(100)) throw uhd::runtime_error("[ad9361_device_t] RX baseband filter cal FAILURE"); - break; - } - count++; - boost::this_thread::sleep(boost::posix_time::milliseconds(1)); } /* Disable RX1 & RX2 filter tuners. */ @@ -365,16 +350,11 @@ double ad9361_device_t::_calibrate_baseband_tx_analog_filter() _io_iface->poke8(0x0ca, 0x22); /* Calibrate! */ - size_t count = 0; _io_iface->poke8(0x016, 0x40); + boost::system_time t = boost::get_system_time(); while (_io_iface->peek8(0x016) & 0x40) { - if (count > 100) { + if (boost::get_system_time() - t > boost::posix_time::milliseconds(100)) throw uhd::runtime_error("[ad9361_device_t] TX baseband filter cal FAILURE"); - break; - } - - count++; - boost::this_thread::sleep(boost::posix_time::milliseconds(1)); } /* Disable the filter tuner. */ @@ -662,15 +642,11 @@ void ad9361_device_t::_calibrate_baseband_dc_offset() _io_iface->poke8(0x194, 0x01); // More calibration settings /* Start that calibration, baby. */ - size_t count = 0; _io_iface->poke8(0x016, 0x01); + boost::system_time t = boost::get_system_time(); while (_io_iface->peek8(0x016) & 0x01) { - if (count > 100) { + if (boost::get_system_time() - t > boost::posix_time::milliseconds(500)) throw uhd::runtime_error("[ad9361_device_t] Baseband DC Offset Calibration Failure"); - break; - } - count++; - boost::this_thread::sleep(boost::posix_time::milliseconds(5)); } } @@ -696,15 +672,11 @@ void ad9361_device_t::_calibrate_rf_dc_offset() _io_iface->poke8(0x189, 0x30); /* Run the calibration! */ - size_t count = 0; _io_iface->poke8(0x016, 0x02); + boost::system_time t = boost::get_system_time(); while (_io_iface->peek8(0x016) & 0x02) { - if (count > 100) { + if (boost::get_system_time() - t > boost::posix_time::milliseconds(5000)) throw uhd::runtime_error("[ad9361_device_t] RF DC Offset Calibration Failure"); - break; - } - count++; - boost::this_thread::sleep(boost::posix_time::milliseconds(50)); } } @@ -781,15 +753,11 @@ void ad9361_device_t::_tx_quadrature_cal_routine() { _calibrate_rf_dc_offset(); /* Now, calibrate the TX quadrature! */ - size_t count = 0; _io_iface->poke8(0x016, 0x10); + boost::system_time t = boost::get_system_time(); while (_io_iface->peek8(0x016) & 0x10) { - if (count > 100) { + if (boost::get_system_time() - t > boost::posix_time::milliseconds(1000)) throw uhd::runtime_error("[ad9361_device_t] TX Quadrature Calibration Failure"); - break; - } - count++; - boost::this_thread::sleep(boost::posix_time::milliseconds(10)); } } @@ -1184,10 +1152,16 @@ double ad9361_device_t::_tune_helper(direction_t direction, const double value) _io_iface->poke8(0x005, _regs.vcodivs); /* Lock the PLL! */ - boost::this_thread::sleep(boost::posix_time::milliseconds(2)); - if ((_io_iface->peek8(0x247) & 0x02) == 0) { - throw uhd::runtime_error("[ad9361_device_t] RX PLL NOT LOCKED"); - } +// boost::this_thread::sleep(boost::posix_time::milliseconds(2)); +// if ((_io_iface->peek8(0x247) & 0x02) == 0) { +// throw uhd::runtime_error("[ad9361_device_t] RX PLL NOT LOCKED"); +// } +boost::system_time t = boost::get_system_time(); +while ((_io_iface->peek8(0x247) & 0x02) == 0) +{ + if (boost::get_system_time() - t > boost::posix_time::milliseconds(2)) + throw uhd::runtime_error("[ad9361_device_t] RX PLL NOT LOCKED"); +} _rx_freq = actual_lo; @@ -1225,10 +1199,16 @@ double ad9361_device_t::_tune_helper(direction_t direction, const double value) _io_iface->poke8(0x005, _regs.vcodivs); /* Lock the PLL! */ - boost::this_thread::sleep(boost::posix_time::milliseconds(2)); - if ((_io_iface->peek8(0x287) & 0x02) == 0) { - throw uhd::runtime_error("[ad9361_device_t] TX PLL NOT LOCKED"); - } +// boost::this_thread::sleep(boost::posix_time::milliseconds(2)); +// if ((_io_iface->peek8(0x287) & 0x02) == 0) { +// throw uhd::runtime_error("[ad9361_device_t] TX PLL NOT LOCKED"); +// } +boost::system_time t = boost::get_system_time(); +while ((_io_iface->peek8(0x287) & 0x02) == 0) +{ + if (boost::get_system_time() - t > boost::posix_time::milliseconds(2)) + throw uhd::runtime_error("[ad9361_device_t] TX PLL NOT LOCKED"); +} _tx_freq = actual_lo; @@ -1808,17 +1788,18 @@ void ad9361_device_t::set_active_chains(bool tx1, bool tx2, bool rx1, bool rx2) double ad9361_device_t::tune(direction_t direction, const double value) { boost::lock_guard lock(_mutex); + double last_cal_freq; if (direction == RX) { if (freq_is_nearly_equal(value, _req_rx_freq)) { return _rx_freq; } - + last_cal_freq = _last_rx_cal_freq; } else if (direction == TX) { if (freq_is_nearly_equal(value, _req_tx_freq)) { return _tx_freq; } - + last_cal_freq = _last_tx_cal_freq; } else { throw uhd::runtime_error("[ad9361_device_t] [tune] INVALID_CODE_PATH"); } @@ -1843,9 +1824,22 @@ double ad9361_device_t::tune(direction_t direction, const double value) /* Update the gain settings. */ _reprogram_gains(); - /* Run the calibration algorithms. */ - _calibrate_tx_quadrature(); - _calibrate_rx_quadrature(); + /* + * Only run the following calibrations if we are more than 100MHz away + * from the previous Tx or Rx calibration point. Leave out single shot + * Rx quadrature unless Rx quad-cal is disabled. + */ + if (std::abs(last_cal_freq - tune_freq) > AD9361_CAL_VALID_WINDOW) { + /* Run the calibration algorithms. */ + if (direction == RX) { + _calibrate_rf_dc_offset(); + _calibrate_rx_quadrature(); + _last_rx_cal_freq = tune_freq; + } else { + _calibrate_tx_quadrature(); + _last_tx_cal_freq = tune_freq; + } + } /* If we were in the FDD state, return it now. */ if (not_in_alert) { diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index 71ce78d..3e15756 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -73,6 +73,7 @@ public: static const double AD9361_MAX_GAIN; static const double AD9361_MAX_CLOCK_RATE; static const double AD9361_RECOMMENDED_MAX_BANDWIDTH; + static const double AD9361_CAL_VALID_WINDOW; private: //Methods void _program_fir_filter(direction_t direction, int num_taps, boost::uint16_t *coeffs); @@ -115,6 +116,7 @@ private: //Members ad9361_io::sptr _io_iface; //Intermediate state double _rx_freq, _tx_freq, _req_rx_freq, _req_tx_freq; + double _last_rx_cal_freq, _last_tx_cal_freq; //! Current baseband sampling rate (this is the actual rate the device is // is running at) double _baseband_bw;