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    <div class="moz-cite-prefix">On 03/22/2019 10:40 AM, Janos
      Buttgereit via USRP-users wrote:<br>
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      cite="mid:FC02FCC9-E41A-45EE-BEFE-12F679091D26@fh-muenster.de"
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      Thank you for the quick reply, that did the trick, at least half
      way.†
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      <div class="">Now Iím struggling with the random 180į phase offset
        between the front end pairs, obviously generated by the†AD9371
        chip according to my research. Is there any best-practice in
        detecting this phase shift that does not involve an additional
        reference signal source?<br class="">
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    </blockquote>
    Correction by analysis of the RX stream is the way it is done.†† <br>
    <br>
    In the specific case of 180deg, one "guess" at cross-correlating the
    channels will produce a louder cross product than the other--you
    only<br>
    † have two guesses that you need to make.<br>
    <br>
    It is generally exceedingly difficult to make a collection of N PLL
    synthesized LOs all have zero relative phase offset, unless those
    synthesizers<br>
    † have "special features" to allow phase-resynch.<br>
    <br>
    So, a lot of applications simply have algorithms for dealing with
    achieving phase alignment within the RX processing.<br>
    <br>
    <br>
    <blockquote
      cite="mid:FC02FCC9-E41A-45EE-BEFE-12F679091D26@fh-muenster.de"
      type="cite">
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            <div class="">Am 22.03.2019 um 14:17 schrieb Marcus D. Leech
              via USRP-users <<a moz-do-not-send="true"
                href="mailto:usrp-users@lists.ettus.com" class="">usrp-users@lists.ettus.com</a>>:</div>
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            <div class=""><span style="caret-color: rgb(0, 0, 0);
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                !important;" class="">On 03/22/2019 05:31 AM, Janos
                Buttgereit via USRP-users wrote:</span><br
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              <blockquote type="cite" style="font-family: Helvetica;
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                class="">Hi,<br class="">
                <br class="">
                after having struggled a lot with network config issues
                I finally got out N310 up and running. We chosed it for
                an application that needs perfectly constant phases
                between all four channels to build up DOA estimation
                applications.<br class="">
                <br class="">
                Iíve set up an N210 as a signal source, outputting a
                sine round about 1.5GHz feeding a 4-way splitter that
                than feeds all four input channels of the N310. A
                Rhode&Schwarz signal generator outputting a 3GHz
                sine wave feeds a two way splitter that is connected to
                both external rx LO inputs.<br class="">
                <br class="">
                From this setup I expect all four channels to maybe have
                a static phase offset that does not change over time.
                However, it can be noticed that the pairs of channels 0
                and 1 and the pairs of channels 2 and 3 show those
                behavior but both pairs drift against each other over
                time. Any idea of what could be wrong with this setup?<br
                  class="">
                <br class="">
                I attached the GNURadio flow graph for this setup.<br
                  class="">
                <br class="">
                Thanks in Advance!<br class="">
                †<br class="">
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              <span style="caret-color: rgb(0, 0, 0); font-family:
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                !important;" class="">Change the "Sync" option to
                "Unknown PPS". ††Why this is required is a bit of a
                mystery, but another user experienced the same issue.</span><br
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              <br style="caret-color: rgb(0, 0, 0); font-family:
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                font-variant-caps: normal; font-weight: normal;
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              <span style="caret-color: rgb(0, 0, 0); font-family:
                Helvetica; font-size: 12px; font-style: normal;
                font-variant-caps: normal; font-weight: normal;
                letter-spacing: normal; text-align: start; text-indent:
                0px; text-transform: none; white-space: normal;
                word-spacing: 0px; -webkit-text-stroke-width: 0px;
                text-decoration: none; float: none; display: inline
                !important;" class="">The N310 is conceptually two
                radios in a single box, and each radio within the FPGA
                has its own "timekeeper". †For some reason, unless those</span><br
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              <span style="caret-color: rgb(0, 0, 0); font-family:
                Helvetica; font-size: 12px; font-style: normal;
                font-variant-caps: normal; font-weight: normal;
                letter-spacing: normal; text-align: start; text-indent:
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                !important;" class="">†"timekeepers" are started
                synchronized with each other, sample timestamps drift
                relative to one another. †This should not be the case,
                but</span><br style="caret-color: rgb(0, 0, 0);
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              <span style="caret-color: rgb(0, 0, 0); font-family:
                Helvetica; font-size: 12px; font-style: normal;
                font-variant-caps: normal; font-weight: normal;
                letter-spacing: normal; text-align: start; text-indent:
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                word-spacing: 0px; -webkit-text-stroke-width: 0px;
                text-decoration: none; float: none; display: inline
                !important;" class="">†it appears to be.</span><br
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      <pre wrap="">_______________________________________________
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