<div dir="ltr"><div dir="ltr"><div dir="ltr"><div>uhd_probe seems good, but same error in GNU Radio.. (RuntimeError: RuntimeError: Expected FPGA compatibility number 14, but got 16:)<br></div><div><br></div><div>$ uhd_usrp_probe <br>[INFO] [UHD] linux; GNU C++ version 7.3.0; Boost_106501; UHD_3.15.0.git-60-g98d2572a<br>[INFO] [B200] Loading firmware image: /usr/local/share/uhd/images/usrp_b200_fw.hex...<br>[INFO] [B200] Detected Device: B200<br>[INFO] [B200] Loading FPGA image: /usr/local/share/uhd/images/usrp_b200_fpga.bin...<br>[INFO] [B200] Operating over USB 2.<br>[INFO] [B200] Detecting internal GPSDO.... <br>[INFO] [GPS] No GPSDO found<br>[INFO] [B200] Initialize CODEC control...<br>[INFO] [B200] Initialize Radio control...<br>[INFO] [B200] Performing register loopback test... <br>[INFO] [B200] Register loopback test passed<br>[INFO] [B200] Setting master clock rate selection to 'automatic'.<br>[INFO] [B200] Asking for clock rate 16.000000 MHz... <br>[INFO] [B200] Actually got clock rate 16.000000 MHz.<br>  _____________________________________________________<br> /<br>|       Device: B-Series Device<br>|     _____________________________________________________<br>|    /<br>|   |       Mboard: B200<br>|   |   revision: 5<br>|   |   product: 30739<br>|   |   serial: 3141FB6<br>|   |   name: NI2900<br>|   |   FW Version: 8.0<br>|   |   FPGA Version: 16.0<br>|   |   <br>|   |   Time sources:  none, internal, external, gpsdo<br>|   |   Clock sources: internal, external, gpsdo<br>|   |   Sensors: ref_locked<br>|   |     _____________________________________________________<br>|   |    /<br>|   |   |       RX DSP: 0<br>|   |   |   <br>|   |   |   Freq range: -8.000 to 8.000 MHz<br>|   |     _____________________________________________________<br>|   |    /<br>|   |   |       RX Dboard: A<br>|   |   |     _____________________________________________________<br>|   |   |    /<br>|   |   |   |       RX Frontend: A<br>|   |   |   |   Name: FE-RX1<br>|   |   |   |   Antennas: TX/RX, RX2<br>|   |   |   |   Sensors: temp, rssi, lo_locked<br>|   |   |   |   Freq range: 50.000 to 6000.000 MHz<br>|   |   |   |   Gain range PGA: 0.0 to 76.0 step 1.0 dB<br>|   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz<br>|   |   |   |   Connection Type: IQ<br>|   |   |   |   Uses LO offset: No<br>|   |   |     _____________________________________________________<br>|   |   |    /<br>|   |   |   |       RX Codec: A<br>|   |   |   |   Name: B200 RX dual ADC<br>|   |   |   |   Gain Elements: None<br>|   |     _____________________________________________________<br>|   |    /<br>|   |   |       TX DSP: 0<br>|   |   |   <br>|   |   |   Freq range: -8.000 to 8.000 MHz<br>|   |     _____________________________________________________<br>|   |    /<br>|   |   |       TX Dboard: A<br>|   |   |     _____________________________________________________<br>|   |   |    /<br>|   |   |   |       TX Frontend: A<br>|   |   |   |   Name: FE-TX1<br>|   |   |   |   Antennas: TX/RX<br>|   |   |   |   Sensors: temp, lo_locked<br>|   |   |   |   Freq range: 50.000 to 6000.000 MHz<br>|   |   |   |   Gain range PGA: 0.0 to 89.8 step 0.2 dB<br>|   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz<br>|   |   |   |   Connection Type: IQ<br>|   |   |   |   Uses LO offset: No<br>|   |   |     _____________________________________________________<br>|   |   |    /<br>|   |   |   |       TX Codec: A<br>|   |   |   |   Name: B200 TX dual DAC<br>|   |   |   |   Gain Elements: None<br><br></div></div></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">Le sam. 9 mars 2019 à 20:24, Marcus D. Leech via USRP-users <<a href="mailto:usrp-users@lists.ettus.com">usrp-users@lists.ettus.com</a>> a écrit :<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
  
    
  
  <div bgcolor="#FFFFFF">
    <div class="gmail-m_1781096193594512546moz-cite-prefix">On 03/09/2019 02:00 PM, Thomas
      Lavarenne via USRP-users wrote:<br>
    </div>
    <blockquote type="cite">
      <div dir="ltr">
        <div dir="ltr">
          <div>Yes, it worked, but the script were on
            /usr/lib/uhd/utils/ and same error...<br>
          </div>
          <div><br>
          </div>
          <div>sudo /usr/lib/uhd/utils/uhd_images_downloader.py<br>
            [sudo] Mot de passe de user :         <br>
            [INFO] Images destination: /usr/share/uhd/images<br>
            [INFO] Target usrp1_b100_fw_default is up to date.<br>
            [INFO] Target x3xx_x310_fpga_default is up to date.<br>
            [INFO] Target usrp2_n210_fpga_default is up to date.<br>
            [INFO] Target n230_n230_fpga_default is up to date.<br>
            [INFO] Target usrp1_b100_fpga_default is up to date.<br>
            [INFO] Target b2xx_b200_fpga_default is up to date.<br>
            [INFO] Target usrp2_n200_fpga_default is up to date.<br>
            [INFO] Target e3xx_e320_fpga_default is up to date.<br>
            [INFO] Target n3xx_n310_fpga_default is up to date.<br>
            [INFO] Target b2xx_b205mini_fpga_default is up to date.<br>
            [INFO] Target x3xx_x300_fpga_default is up to date.<br>
            [INFO] Target octoclock_octoclock_fw_default is up to date.<br>
            [INFO] Target usrp2_usrp2_fw_default is up to date.<br>
            [INFO] Target usrp2_n200_fw_default is up to date.<br>
            [INFO] Target usrp2_usrp2_fpga_default is up to date.<br>
            [INFO] Target b2xx_common_fw_default is up to date.<br>
            [INFO] Target b2xx_b200mini_fpga_default is up to date.<br>
            [INFO] Target usrp1_usrp1_fpga_default is up to date.<br>
            [INFO] Target usb_common_windrv_default is up to date.<br>
            [INFO] Target usrp2_n210_fw_default is up to date.<br>
            [INFO] Target n3xx_n300_fpga_default is up to date.<br>
            [INFO] Target e3xx_e310_fpga_default is up to date.<br>
            [INFO] Target b2xx_b210_fpga_default is up to date.<br>
            <br>
          </div>
        </div>
      </div>
      <br>
    </blockquote>
    Your 2900 has an image that is newer than your host-side firmware. 
    Power-cycle it, and try the uhd_usrp_probe again.<br>
    <br>
    <br>
    <blockquote type="cite">
      <div class="gmail_quote">
        <div dir="ltr" class="gmail_attr">Le sam. 9 mars 2019 à 19:58,
          Brian Padalino <<a href="mailto:bpadalino@gmail.com" target="_blank">bpadalino@gmail.com</a>>
          a écrit :<br>
        </div>
        <blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
          <div dir="ltr">
            <div dir="ltr">
              <div class="gmail_quote">
                <div dir="ltr" class="gmail_attr">On Sat, Mar 9, 2019 at
                  1:45 PM Thomas Lavarenne via USRP-users <<a href="mailto:usrp-users@lists.ettus.com" target="_blank">usrp-users@lists.ettus.com</a>>
                  wrote:<br>
                </div>
                <blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
                  <div dir="ltr">
                    <div>Hello,</div>
                    <div>I'm new here and pretty new with usrp. I'm
                      trying to use usrp-2900 with GNU Radio and Ubuntu
                      18.04, but i have this problem (latest driver uhd
                      from source):<br>
                    </div>
                    <div><br>
                    </div>
                    <div>
                      <div>'''<br>
                      </div>
                      <div>linux; GNU C++ version 7.3.0; Boost_106501;
                        UHD_003.010.003.000-0-unknown<br>
                        <br>
                        -- Loading firmware image:
                        /usr/share/uhd/images/usrp_b200_fw.hex...<br>
                        -- Detected Device: B200<br>
                        -- Loading FPGA image:
                        /usr/share/uhd/images/usrp_b200_fpga.bin... done<br>
                        -- Operating over USB 3.<br>
                        Traceback (most recent call last):<br>
                          File "/home/user/top_block.py", line 166, in
                        <module><br>
                            main()<br>
                          File "/home/user/top_block.py", line 154, in
                        main<br>
                            tb = top_block_cls()<br>
                          File "/home/user/top_block.py", line 78, in
                        __init__<br>
                            channels=range(1),<br>
                          File
                        "/usr/lib/python2.7/dist-packages/gnuradio/uhd/__init__.py",
                        line 122, in constructor_interceptor<br>
                            return old_constructor(*args)<br>
                          File
                        "/usr/lib/python2.7/dist-packages/gnuradio/uhd/uhd_swig.py",
                        line 2683, in make<br>
                            return _uhd_swig.usrp_source_make(*args)<br>
                        <b>RuntimeError: RuntimeError: Expected FPGA
                          compatibility number 14, but got 16:<br>
                          The FPGA build is not compatible with the host
                          code build.</b><br>
                        Please run:<br>
                        <br>
 "/usr/lib/x86_64-linux-gnu/uhd/utils/uhd_images_downloader.py"<br>
                        <br>
                        >>> Done</div>
                      <div>''''</div>
                      <div>Any ideas accepted!</div>
                    </div>
                  </div>
                </blockquote>
                <div><br>
                </div>
                <div>Have you tried running:</div>
                <div><br>
                </div>
                <div>  $
                  sudo /usr/lib/x86_64-linux-gnu/uhd/utils/uhd_images_downloader.py</div>
                <div><br>
                </div>
                <div>As the message suggests?</div>
                <div><br>
                </div>
                <div>Brian</div>
              </div>
            </div>
          </div>
        </blockquote>
      </div>
      <br>
      <fieldset class="gmail-m_1781096193594512546mimeAttachmentHeader"></fieldset>
      <br>
      <pre>_______________________________________________
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</pre>
    </blockquote>
    <br>
  </div>

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