[USRP-users] AD936x disable DC offset removal

David Carsenat carsenat at gmail.com
Sun Jul 26 14:59:12 EDT 2020

I have tried that, but I see 2 issues (but perhaps I'm wrong) :
- I need 25 Mhz of BW so if I want to push the LO outside, I need to have a
sample rate of 50 MHz --> difficult to have Tx / Rx loopback.
- I have tried to set the master clock rate at 60 MHz, the DDC offset at 25
MHz, and a sample rate at 25 MHz. I thought that it could work but I have a
cutoff frequency at 12.5 MHz ...


Le dim. 26 juil. 2020 à 20:49, Marcus D. Leech <patchvonbraun at gmail.com> a
écrit :

> On 07/26/2020 02:36 PM, David Carsenat wrote:
> > What a fast response ! Many thanks. But what do you mean by offset
> > tuning ?
> >
> > For example at a time, I can have a signal at F0rx and at another time
> > at F0rx + df. Always with some Signal at F0rx. The RX DC offset
> > correction will disturb the Signal for the second example.
> > The signal can hop.
> You can have the hardware offset the LO by some suitable amount, so that
> the LO actually sits at the edge of your bandwidth, for example.
> See the two-step tuning process here:
> https://files.ettus.com/manual/page_general.html
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