[USRP-users] Converting my e310 RFNOC Block from 1 stream to 2 streams (2 input/output ports)

Andrew Payne wandrewp at gmail.com
Wed Jan 29 12:59:27 EST 2020


Hello,

I have a working single-channel rfnoc fpga design file for the e310.
I am using the axi wrapper with simple mode enabled.  Using the UHD
xml files instead of c++.  2 settings registers.  Got it setup using
GNURadio. For a while I was running my flowgraph as 2 single stream
blocks (also building an FPGA image with 2 identical RFNOC blocks)
doing the same thing, but I decided to consolidate it to 1 block that
always has 2 streams.  uhd_usrp_probe successfully finds the block
port, BUT a weird thing is that there is no longer a message
indicating no block controller was found... (i might have edited the
noc_block_impl.cc or ctrl file but I do not know).  How can I make
sure it's just the UHD xml file that's chosen?

I'm in the process of converting it to 2 streams, and that's where I
am getting hung up.  When running the GRC file I now only have
timeouts on channel 0, where I haven't had them before.

I've based my conversion on the noc_block_ddc design since that one
can do 2 channels.  So beyond that I have updated my UHD XML file and
the Gnuradio XML file.  Some notable things I have changed:

UHD XML file:
1. added 2 more sink/source ports so I now have in0, in1, out0, out1.
2. added 2 more arg blocks to the 2 I already had (2 settings
registers but they apply to 2 ports, so 4 total arg blocks now).

Verilog design file:
Updated closely following noc_block_ddc, generating 2 axi wrappers and
user IP, etc.  Made sure to change rb_stb to 2'b11 for the noc_shell
input paramter.

Any guidance is helpful.

Thanks,
Andrew



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