[USRP-users] 12 bits I/Q samples

Arash Jafari arash.jafari.telecom at gmail.com
Tue Jan 21 05:06:04 EST 2020


Hello Everybody,

according to FPGA implementation of my board which a USRP-b200, the Least
significant 4bits of I or Q samples are always 0 (0x???0), which in turn
means the recorded sample as short complex 16 bits (sc16) cpu format should
have four zero at LSB.
But almost 10% of recorded samples do not obey this rule!!!!
Any comment is highly appreciated!

Kind regards,

-- 

Dipl.-Ing. Arash Jafari

Phone: +43 650 844 3617
E-mail: arash.jafari.telecom at gmail.com
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/attachments/20200121/05f83144/attachment.html>


More information about the USRP-users mailing list