[USRP-users] N310: Channel pairs are drifting in phase whith external LO setup
Marcus D. Leech
patchvonbraun at gmail.com
Fri Mar 22 10:46:52 EDT 2019
On 03/22/2019 10:40 AM, Janos Buttgereit via USRP-users wrote:
> Thank you for the quick reply, that did the trick, at least half way.
> Now I’m struggling with the random 180° phase offset between the front
> end pairs, obviously generated by the AD9371 chip according to my
> research. Is there any best-practice in detecting this phase shift
> that does not involve an additional reference signal source?
Correction by analysis of the RX stream is the way it is done.
In the specific case of 180deg, one "guess" at cross-correlating the
channels will produce a louder cross product than the other--you only
have two guesses that you need to make.
It is generally exceedingly difficult to make a collection of N PLL
synthesized LOs all have zero relative phase offset, unless those
have "special features" to allow phase-resynch.
So, a lot of applications simply have algorithms for dealing with
achieving phase alignment within the RX processing.
>> Am 22.03.2019 um 14:17 schrieb Marcus D. Leech via USRP-users
>> <usrp-users at lists.ettus.com <mailto:usrp-users at lists.ettus.com>>:
>> On 03/22/2019 05:31 AM, Janos Buttgereit via USRP-users wrote:
>>> after having struggled a lot with network config issues I finally
>>> got out N310 up and running. We chosed it for an application that
>>> needs perfectly constant phases between all four channels to build
>>> up DOA estimation applications.
>>> I’ve set up an N210 as a signal source, outputting a sine round
>>> about 1.5GHz feeding a 4-way splitter that than feeds all four input
>>> channels of the N310. A Rhode&Schwarz signal generator outputting a
>>> 3GHz sine wave feeds a two way splitter that is connected to both
>>> external rx LO inputs.
>>> From this setup I expect all four channels to maybe have a static
>>> phase offset that does not change over time. However, it can be
>>> noticed that the pairs of channels 0 and 1 and the pairs of channels
>>> 2 and 3 show those behavior but both pairs drift against each other
>>> over time. Any idea of what could be wrong with this setup?
>>> I attached the GNURadio flow graph for this setup.
>>> Thanks in Advance!
>> Change the "Sync" option to "Unknown PPS". Why this is required is
>> a bit of a mystery, but another user experienced the same issue.
>> The N310 is conceptually two radios in a single box, and each radio
>> within the FPGA has its own "timekeeper". For some reason, unless those
>> "timekeepers" are started synchronized with each other, sample
>> timestamps drift relative to one another. This should not be the
>> case, but
>> it appears to be.
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>> USRP-users at lists.ettus.com <mailto:USRP-users at lists.ettus.com>
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