[USRP-users] different phase difference using splitter on each run

Koyel Das (Vehere) koyel.das at vehere.com
Tue Mar 5 23:17:04 EST 2019

So basically I have to insert the following line


before the code where I need timed operations and then at the end of the code I insert



Koyel Das
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From: Marcus D. Leech <patchvonbraun at gmail.com>
Sent: Wednesday, March 6, 2019 9:22:22 AM
To: Koyel Das (Vehere); 'USRP-users at lists.ettus.com'
Subject: Re: [USRP-users] different phase difference using splitter on each run

On 03/05/2019 10:41 PM, Koyel Das (Vehere) wrote:

The timed commands are as follows in rx_multisamples.cpp


        //This is not a true time lock, the devices will be off by a few RTT.

        //Rather, this is just to allow for demonstration of the code below.



        else if (sync == "pps"){



        boost::this_thread::sleep(boost::posix_time::seconds(1)); //wait for pps sync pulse


        else if (sync == "mimo"){

        UHD_ASSERT_THROW(usrp->get_num_mboards() == 2);

        //make mboard 1 a slave over the MIMO Cable

        usrp->set_clock_source("mimo", 1);

        usrp->set_time_source("mimo", 1);

        //set time on the master (mboard 0)

        usrp->set_time_now(uhd::time_spec_t(0.0), 0);

        //sleep a bit while the slave locks its time to the master



1. "now", 2 ."pps" and 3. "mimo"

I was using "now" but still I don't get same phase difference in each run. Is there any other time command that I have to use or what do I have to set?

Ah!  You have a misunderstanding about what I mean by "timed commands".

See the "test_timed_commands" example in the source code tree.

See also the documentation here:


Basically, you need to make sure that all the devices agree on what time it is (if you have only one device, this is "easy").  Once you have that,
  THEN, you need to make sure that all the RF synthesizer tuning happens at precisely the same instant, so that the re-synch feature
  (if the device has one) can be triggered at exactly the same time.

Without that, the synthesizers are free to "lock" at any phase-angle with respect to the reference clock, and further the reference
  divider in a synthesizer is guaranteed to be in the same state across all synthesizers, even when they're using the same
  reference clock.  This is what the "resynch" hardware signal is all about, and what the set_command_time()/clear_command_time()
  API is all about.

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