[USRP-users] Fwd: Removing DC offset on USRP B200

Oliver Wayne olivergwayne at gmail.com
Mon Oct 30 14:54:37 EDT 2017


When I run perf top, I get libuhd.so.3.11 and libc-2.23.so taking up about
15% and 21% respectively, rising over time. This is at 10Msps. any
thoughts? I've tried a few other things like setting otw_format=sc12 and
setting the frame size higher, but I haven't had any success.

On Tue, Oct 24, 2017 at 3:42 PM, <mleech at ripnet.com> wrote:

> You could perhaps do a "perf top" and see what's consuming time.
>
> The Gnu Radio signal source blocks are not screamingly efficient, so it
> may be that they just aren't keeping up, although at 4Msps, you wouldn't
> expect them to be too stressed.
>
>
>
>
>
>
> On 2017-10-24 15:12, Oliver Wayne via USRP-users wrote:
>
> Apologies for not forwarding to the full list. I'm attempting to run the
> attached flowgraph with the following hardware, but getting underflows.
>
> I have 8 GB of RAM, so don't think that's a problem. Running lspci | grep
> -i usb, I get the following output
>
> 00:1a.0 USB controller: Intel Corporation 6 Series/C200 Series Chipset
> Family USB Enhanced Host Controller #2 (rev 04)
> 00:1d.0 USB controller: Intel Corporation 6 Series/C200 Series Chipset
> Family USB Enhanced Host Controller #1 (rev 04)
>
> I've attached a copy of cpuinfo.
>
> Thanks!
>
>
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>
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