[USRP-users] Removing DC offset on USRP B200

Oliver Wayne olivergwayne at gmail.com
Mon Oct 16 21:06:22 EDT 2017

How would I then include negative numbers on the Verilog side to kill the
offset? I'm a bit more comfortable with fpga design than with SDR, so for
testing purposes I'd prefer to do it that way.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/attachments/20171016/160f2062/attachment-0002.html>

More information about the USRP-users mailing list