[USRP-users] Posible error in b200 documentation
Marcus D. Leech
mleech at ripnet.com
Thu Nov 30 15:13:42 EST 2017
On 11/30/2017 03:04 PM, Francisco Albani via USRP-users wrote:
> In *"Changing the Master Clock Rate"* (
> https://files.ettus.com/manual/page_usrp_b200.html#b200_mcr ) I see this:
> /[...] The clock rate can be set to any value between 5 MHz and 61.44
> MHz [...]/
> But I found that to be false, and able to lower the
> *master_clock_rate* down to *220 kHz*:
> uhd_usrp_probe --args="master_clock_rate=220e3"
> linux; GNU C++ version 4.9.2; Boost_105500; UHD_003.009.HEAD-0-g43639b7a
> -- Detected Device: B200
> -- Operating over USB 3.
> -- Initialize CODEC control...
> -- Initialize Radio control...
> -- Performing register loopback test... pass
> -- Performing CODEC loopback test... pass
> -- Asking for clock rate 0.220000 MHz...
> -- Actually got clock rate 0.220000 MHz.
> -- Performing timer loopback test... pass
> I also tried lowering it to 2 MHz inside a working tx application (with an external demodulator) and went fine.
> Hope it helps.
I could be wrong, but I'm not certain that the AD9361 anti-alias filters
inside the chip will work properly at those very-low clock rates, which
is why 5MHz
is specified as the lower bound.
Keep in mind that you can set any sample-rate that is an integer
fraction of the master clock rate, so even with a master clock rate of
5MHz, you can
still ask for (properly decimated) sample rates well below that.
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