[USRP-users] using uhd 4.0 on e3xx

Jack Ziegler jackalak at gmail.com
Fri Nov 17 13:43:14 EST 2017


Hello,

I've followed the directions as specified here :
https://kb.ettus.com/Software_Development_on_the_E310_and_E312
to cross compile uhd for the e310 such that I can use RFNOC
Everything looks good until I get to here.  I'm new to the e310 and rfnoc
so any advice on how to proceed would be appreciated.

Thank you!

Jack

root at ettus-e3xx-sg3:~/e3xx# uhd_usrp_probe
[INFO] [UHDlinux; GNU C++ version 4.9.2; Boost_105700;
UHD_4.0.0.rfnoc-devel-409-gec9138eb]
[INFO] [E300] Loading FPGA image:
/home/root/e3xx/usr/share/uhd/images/usrp_e310_fpga_sg3.bit...
[INFO] [E300] FPGA image loaded
[INFO] [E300] Initializing core control (global registers)...

[INFO] [E300] Performing register loopback test...
[INFO] [E300] Register loopback test passed
[INFO] [RFNOC RADIO] Register loopback test passed
[INFO] [RFNOC RADIO] Register loopback test passed
[WARNING] [RFNOC] [0/fosphor_0] defines 2 input buffer sizes, but 1 input
ports
[INFO] [AD936X] Performing CODEC loopback test...
[INFO] [AD936X] CODEC loopback test passed
[INFO] [AD936X] Performing CODEC loopback test...
[INFO] [AD936X] CODEC loopback test passed
[INFO] [CORES] Performing timer loopback test...
[INFO] [CORES] Timer loopback test passed
  _____________________________________________________
 /
|       Device: E-Series Device
|     _____________________________________________________
|    /
|   |       Mboard: E3XX
|   |   product: 30675
|   |   revision: 6
|   |   serial: 312A0B0
|   |   mac-addr: 00:80:2f:17:a4:ff
|   |   FPGA Version: 255.0
|   |   FPGA git hash: f764326-dirty
|   |   RFNoC capable: Yes
|   |
|   |   Time sources:  none, internal, external
|   |   Clock sources: internal
|   |   Sensors: temp, ref_locked
|   |     _____________________________________________________
|   |    /
|   |   |       RX DSP: 0
|   |   |
|   |   |   Freq range: 0.000 to 0.000 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       RX DSP: 1
|   |   |
|   |   |   Freq range: 0.000 to 0.000 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: A
|   |   |   ID: E310 MIMO XCVR (0x0110)
|   |   |   Serial: 3125AFD
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: A
|   |   |   |   Name: FE-RX2
|   |   |   |   Antennas: TX/RX, RX2
|   |   |   |   Sensors: temp, rssi, lo_locked
|   |   |   |   Freq range: 50.000 to 6000.000 MHz
|   |   |   |   Gain range PGA: 0.0 to 76.0 step 1.0 dB
|   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: B
|   |   |   |   Name: FE-RX1
|   |   |   |   Antennas: TX/RX, RX2
|   |   |   |   Sensors: temp, rssi, lo_locked
|   |   |   |   Freq range: 50.000 to 6000.000 MHz
|   |   |   |   Gain range PGA: 0.0 to 76.0 step 1.0 dB
|   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: A
|   |   |   |   Name: E3x0 RX dual ADC
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       TX DSP: 0
|   |   |
|   |   |   Freq range: 0.000 to 0.000 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       TX DSP: 1
|   |   |
|   |   |   Freq range: 0.000 to 0.000 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       TX Dboard: A
|   |   |   ID: E310 MIMO XCVR (0x0110)
|   |   |   Serial: 3125AFD
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: A
|   |   |   |   Name: FE-TX2
|   |   |   |   Antennas: TX/RX
|   |   |   |   Sensors: temp, lo_locked
|   |   |   |   Freq range: 50.000 to 6000.000 MHz
|   |   |   |   Gain range PGA: 0.0 to 89.8 step 0.2 dB
|   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: B
|   |   |   |   Name: FE-TX1
|   |   |   |   Antennas: TX/RX
|   |   |   |   Sensors: temp, lo_locked
|   |   |   |   Freq range: 50.000 to 6000.000 MHz
|   |   |   |   Gain range PGA: 0.0 to 89.8 step 0.2 dB
|   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Codec: A
|   |   |   |   Name: E3x0 TX dual DAC
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       RFNoC blocks on this device:
|   |   |
|   |   |   * Radio_0
|   |   |   * FIFO_0
|   |   |   * Window_0
|   |   |   * FFT_0
|   |   |   * fosphor_0
|   |   |   * FIFO_1
|   |   |   * FIR_0

[INFO] [E300] Loading FPGA image:
/home/root/e3xx/usr/share/uhd/images/usrp_e3xx_fpga_idle_sg3.bit...
[INFO] [E300] FPGA image loaded
[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

[ERROR] [UHD] Exception caught in safe-call.
  in virtual ctrl_iface_impl::~ctrl_iface_impl()
  at /home/jackalak/e3xx/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
  in typename T::sptr e300_transport::get_buff(double) [with T =
uhd::transport::managed_send_buffer; typename T::sptr =
boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
  at /home/jackalak/e3xx/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257

root at ettus-e3xx-sg3:~/e3xx#
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