[USRP-users] Fwd: USRP2 schematic vs. FPGA source discrepancy

Michał Wróbel michal.a.wrobel at gmail.com
Sat Nov 4 08:37:31 EDT 2017


Dear usrp-users,

Maybe you've got the answer to my question below.

Thanks,
Michał

---------- Forwarded message ----------
From: Michał Wróbel <michal.a.wrobel at gmail.com>
Date: 2017-10-28 19:32 GMT+02:00
Subject: USRP2 schematic vs. FPGA source discrepancy
To: support at ettus.com


Dear Ettus Research support team,

I am considering customizing USRP2 FPGA contents, however there seems to be
a discrepancy between USRP2 schematics
<https://files.ettus.com/schematics/usrp2/usrp2.pdf> and FPGA constraints
file
<https://github.com/EttusResearch/fpga/blob/maint/usrp2/top/USRP2/u2_rev3.ucf>.
On the schematics the pin V15 is connected to S1 switch, while the
constraints file attaches this pin to PHY_CLK signal. Is it possible that
the schematics and the constraints file are for different revisions of
USRP2 hardware?

Judging from the filename I presume the FPGA constraints file is for
"revision 3". Which hardware revision do the schematics describe? Where can
I find schematics and FPGA constraints file for "USRP2 Rev 4.0", which I
own?

Thank you in advance,
Michał Wróbel
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