[USRP-users] Is it possible to manually configure any filter in AD/FPGA
bares at gradiant.org
Fri Nov 3 06:34:29 EDT 2017
No, I'm pretty confident about what UHD can do. The thing is we need to
tweak with FPGA design to alleviate some cpu load in our host and do some
We'd like the AD to just decimate by a factor of 8 (61.44 -> 7.68 MHz) and
also be able to configure its channel BW. And at the same time we'd like to
configure our software application to receive a datarate of about 250 KHz.
Decimation and filtering to adapt AD->SW datarates would be done by us
within the FPGA.
But as far as I understand, if I use uhd drivers to set a rx_datarate of
250 KSPS in SW, AD and FPGA filter configuration would be automatically
chosen. I just want to override it.
Hope this makes sense and there is a way to do it.
2017-11-02 20:46 GMT+01:00 Marcus D. Leech via USRP-users <
usrp-users at lists.ettus.com>:
> On 11/02/2017 02:04 PM, Brais Ares via USRP-users wrote:
> Hello everybody,
> We've just acquired a B210 USRP and *we'd like to know if it's possible
> to customize AD filters and FPGA filters* (bandwidth,
> decimation/interpolation factors, and so on).
> Among UHD drivers I only found this:
> - *virtual void uhd::usrp::multi_usrp::set_filter*
> But I'm not sure it would serve that purpose.
> Could anyone told me if this is even possible or maybe point me in the
> right direction?
> You're asking this because you're not confident that UHD can give you the
> sample rate you need? The B210 has very-flexible master-clock rate, and
> combined with the existing re-samplers in the existing FPGA codebase, can
> give you pretty much any sample rate you want.
> USRP-users mailing list
> USRP-users at lists.ettus.com
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