[USRP-users] Filling gaps resulting from overruns, issue with (probably) power saving in USRP B210
246tnt at gmail.com
Tue Mar 29 11:36:06 EDT 2016
> Nobody is answering so maybe I'll ask a shorter question:
> There is a mechanism in the B210 FPGA that is turning off receiving
> chain when nothing is streamed to the PC. It is also turning off the
> receiving chain on any buffer overrun in the USRP and this isn't a
> feature but a bug.
I never heard of such a mechanism and it would be non-trivial to
implement so I somehow doubt it exists because I don't see why would
anyone have ever taken the time to implement that given there is no
advantages to it anyway ...
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