[USRP-users] X300: DRAM FIFO 0 BIST failed!

Serge Malo serge.malo at skydelsolutions.com
Wed Mar 23 14:28:42 EDT 2016


Hi all,

I'm using X300s, with UHD 3.10 and HG image
(uhd-images_003.010.git-118-g6c5d59cb).
Generally, everything works fine, but I see the following error (about 1
time out of 4) only on one specific X300 (S/N 30A58F5, P/N 156485D):
Error: RuntimeError: DRAM FIFO 0 BIST failed!

The error happens when making the multi_usrp object.
I know that those FPGA images are BETA, but I am suspecting a defect with
this X300.
Is there anything I could try to fix/avoid this problem? Or should I try to
contact support to initiate a RMA request?

Complete output:
tx_waveforms.exe --args addr=192.168.40.2 --rate 2500000 --freq 1e9
--channels 0,1 --ref=external
Win32; Microsoft Visual C++ version 12.0; Boost_105500;
UHD_003.010.git-119-g42a3eeb6


Creating the usrp device with: addr=192.168.40.2...
-- X300 initialization sequence...
-- Determining maximum frame size... 8000 bytes.
-- Setup basic communication...
-- Loading values from EEPROM...
-- Setup RF frontend clocking...
-- Radio 1x clock:200
Error: RuntimeError: DRAM FIFO 0 BIST failed!


Best regards,
Serge.



-- 
*Serge Malo *
CDO & Co-founder, Skydel Solutions
Cell: 1-514-294-4017
www.skydelsolutions.com
Twitter: @skydelsol <https://twitter.com/skydelsol>
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