[USRP-users] ISE and B210

liu Jong jongliu1987 at gmail.com
Wed Mar 9 02:36:30 EST 2016

Ian and Marcus,
thank you for your so useful  information.

2016-03-09 15:11 GMT+08:00 Ian Buckley via USRP-users <
usrp-users at lists.ettus.com>:

> Jon,
> There's a little room left in the B210 FPGA in UHD3.9.3 but not a huge
> amount, I pretty much tripled the number of DSP's used when UHD
> transitioned to UHD3.9.x from 3.8.
> Build it yourself with the supplied makefiles to see the numbers, it will
> be good practice before you start customizing things.
> It's not particularly hard to free up space for custom design work in
> B210. There are 2 parameters passed into "radio_legacy" that allow you to
> revert the style of DDC/DUC's used internally to the N210 design rather
> than X300 design freeing more than half the available DSP's in the device :
> Define these as 0 for old style smaller DDC's and DUC's:
> There are other quick tricks also:
> I just built a dual DDC channelized version of B210 for a commercial
> project by stripping out the TX DUC's to make space for the extra RX DDC's.
> If your application is SISO then gut the second channel of all its DDC and
> DUC.
> If you need more RAM, then try tuning the parameters provided that control
> the size of packet buffering FIFO's
> The FPGA design is designed to try to meet the needs of 95% of typical
> users, which means in most applications something thats been speculatively
> provided is not actually being used and can be removed.
> -Ian
> On Tue, Mar 8, 2016 at 8:05 PM, Marcus D. Leech via USRP-users <
> usrp-users at lists.ettus.com> wrote:
>> On 03/08/2016 10:41 PM, liu Jong via USRP-users wrote:
>>> Dear all,
>>>            From the ettus manual,we know the B210 FPGA development used
>>> in ISE14.7,which on ubuntu or windows is all OK?
>>>            Another question,how much free FPGA space on the B210 is left
>>> ,which is very important for us.
>>>  thank you for your reply.
>>> best regards
>>> Jon
>>> Ettus does all their FPGA development on a Linux platform, with
>> Makefiles, etc, so that the process is reproducible, you can certainly use
>>   Windows-based Xylinx tooling, but Ettus does everything on Linux.
>> I don't know exact numbers off the top of my head but the B210 FPGA is
>> fairly full, you'd likely have to remove things to get custom
>>   designs to fit.
>> _______________________________________________
>> USRP-users mailing list
>> USRP-users at lists.ettus.com
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
> _______________________________________________
> USRP-users mailing list
> USRP-users at lists.ettus.com
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/attachments/20160309/0f799f37/attachment-0002.html>

More information about the USRP-users mailing list